From mboxrd@z Thu Jan 1 00:00:00 1970 From: Jeff Law Subject: Re: [RFC][PATCH 0/5] arch: atomic rework Date: Tue, 25 Feb 2014 20:32:38 -0700 Message-ID: <530D6056.40305@redhat.com> References: <20140223063426.GT4250@linux.vnet.ibm.com> <20140224172110.GO8264@linux.vnet.ibm.com> <20140224185341.GU8264@linux.vnet.ibm.com> <20140224223701.GC8264@linux.vnet.ibm.com> <20140226001558.GY8264@linux.vnet.ibm.com> Mime-Version: 1.0 Content-Type: text/plain; charset=ISO-8859-1; format=flowed Content-Transfer-Encoding: 7bit Return-path: List-Unsubscribe: List-Archive: List-Post: List-Help: Sender: gcc-owner@gcc.gnu.org In-Reply-To: <20140226001558.GY8264@linux.vnet.ibm.com> To: paulmck@linux.vnet.ibm.com, Linus Torvalds Cc: Torvald Riegel , Will Deacon , Peter Zijlstra , Ramana Radhakrishnan , David Howells , "linux-arch@vger.kernel.org" , "linux-kernel@vger.kernel.org" , "akpm@linux-foundation.org" , "mingo@kernel.org" , "gcc@gcc.gnu.org" List-Id: linux-arch.vger.kernel.org On 02/25/14 17:15, Paul E. McKenney wrote: >> I have for the last several years been 100% convinced that the Intel >> memory ordering is the right thing, and that people who like weak >> memory ordering are wrong and should try to avoid reproducing if at >> all possible. But given that we have memory orderings like power and >> ARM, I don't actually see a sane way to get a good strong ordering. >> You can teach compilers about cases like the above when they actually >> see all the code and they could poison the value chain etc. But it >> would be fairly painful, and once you cross object files (or even just >> functions in the same compilation unit, for that matter), it goes from >> painful to just "ridiculously not worth it". > > And I have indeed seen a post or two from you favoring stronger memory > ordering over the past few years. ;-) I couldn't agree more. > > Are ARM and Power really the bad boys here? Or are they instead playing > the role of the canary in the coal mine? That's a question I've been struggling with recently as well. I suspect they (arm, power) are going to be the outliers rather than the canary. While the weaker model may give them some advantages WRT scalability, I don't think it'll ultimately be enough to overcome the difficulty in writing correct low level code for them. Regardless, they're here and we have to deal with them. Jeff From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mx1.redhat.com ([209.132.183.28]:5893 "EHLO mx1.redhat.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751114AbaBZDdN (ORCPT ); Tue, 25 Feb 2014 22:33:13 -0500 Message-ID: <530D6056.40305@redhat.com> Date: Tue, 25 Feb 2014 20:32:38 -0700 From: Jeff Law MIME-Version: 1.0 Subject: Re: [RFC][PATCH 0/5] arch: atomic rework References: <20140223063426.GT4250@linux.vnet.ibm.com> <20140224172110.GO8264@linux.vnet.ibm.com> <20140224185341.GU8264@linux.vnet.ibm.com> <20140224223701.GC8264@linux.vnet.ibm.com> <20140226001558.GY8264@linux.vnet.ibm.com> In-Reply-To: <20140226001558.GY8264@linux.vnet.ibm.com> Content-Type: text/plain; charset=ISO-8859-1; format=flowed Content-Transfer-Encoding: 7bit Sender: linux-arch-owner@vger.kernel.org List-ID: To: paulmck@linux.vnet.ibm.com, Linus Torvalds Cc: Torvald Riegel , Will Deacon , Peter Zijlstra , Ramana Radhakrishnan , David Howells , "linux-arch@vger.kernel.org" , "linux-kernel@vger.kernel.org" , "akpm@linux-foundation.org" , "mingo@kernel.org" , "gcc@gcc.gnu.org" Message-ID: <20140226033238.92axlvNvt9vvCLRZleMTtuECDw6EkezSmMwVja85Lto@z> On 02/25/14 17:15, Paul E. McKenney wrote: >> I have for the last several years been 100% convinced that the Intel >> memory ordering is the right thing, and that people who like weak >> memory ordering are wrong and should try to avoid reproducing if at >> all possible. But given that we have memory orderings like power and >> ARM, I don't actually see a sane way to get a good strong ordering. >> You can teach compilers about cases like the above when they actually >> see all the code and they could poison the value chain etc. But it >> would be fairly painful, and once you cross object files (or even just >> functions in the same compilation unit, for that matter), it goes from >> painful to just "ridiculously not worth it". > > And I have indeed seen a post or two from you favoring stronger memory > ordering over the past few years. ;-) I couldn't agree more. > > Are ARM and Power really the bad boys here? Or are they instead playing > the role of the canary in the coal mine? That's a question I've been struggling with recently as well. I suspect they (arm, power) are going to be the outliers rather than the canary. While the weaker model may give them some advantages WRT scalability, I don't think it'll ultimately be enough to overcome the difficulty in writing correct low level code for them. Regardless, they're here and we have to deal with them. Jeff