From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mx1.redhat.com ([66.187.233.31]:52622 "EHLO mx1.redhat.com") by vger.kernel.org with ESMTP id S965063AbWH2QZ3 (ORCPT ); Tue, 29 Aug 2006 12:25:29 -0400 From: David Howells In-Reply-To: <20060829162055.GA31159@linux-mips.org> References: <20060829162055.GA31159@linux-mips.org> <44F395DE.10804@yahoo.com.au> <1156750249.3034.155.camel@laptopd505.fenrus.org> <11861.1156845927@warthog.cambridge.redhat.com> Subject: Re: Why Semaphore Hardware-Dependent? Date: Tue, 29 Aug 2006 17:25:02 +0100 Message-ID: <5878.1156868702@warthog.cambridge.redhat.com> Sender: linux-arch-owner@vger.kernel.org To: Ralf Baechle Cc: Christoph Lameter , David Howells , Nick Piggin , Arjan van de Ven , Dong Feng , ak@suse.de, Paul Mackerras , linux-kernel@vger.kernel.org, linux-arch@vger.kernel.org List-ID: Ralf Baechle wrote: > > Which arches do not support cmpxchg? > > MIPS, Alpha - probably any pure RISC load/store architecture. Some of these have LL/SC or equivalent instead, but ARM5 and before, FRV, M68K before 68020 to name but a few. And anything that implements CMPXCHG with spinlocks is a really bad candidate for CMPXCHG-based rwsems. David