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Tue, 14 Jan 2025 05:30:33 -0500 (EST) X-Mailer: MessagingEngine.com Webmail Interface Precedence: bulk X-Mailing-List: linux-arch@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Date: Tue, 14 Jan 2025 11:30:12 +0100 From: "Arnd Bergmann" To: "Jiaxun Yang" , "Geert Uytterhoeven" Cc: =?UTF-8?Q?Mateusz_Jo=C5=84czyk?= , "linux-mips@vger.kernel.org" , Linux-Arch , linux-kernel@vger.kernel.org, "Baoquan He" , "Thomas Bogendoerfer" , "Alexandre Belloni" , regressions@lists.linux.dev Message-Id: <599d4ef2-38dc-431f-a65d-c76fc81f02b3@app.fastmail.com> In-Reply-To: <12aa35c3-3f74-40bf-9fa1-7540aa4292c3@app.fastmail.com> References: <90b5b76d-25b6-4cdc-91ed-07ac930dc519@o2.pl> <99f75c66-4c2d-45dc-a808-b5ba440c7551@app.fastmail.com> <12aa35c3-3f74-40bf-9fa1-7540aa4292c3@app.fastmail.com> Subject: Re: [REGRESSION] mipsel: no RTC CMOS on the Malta platform in QEMU Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: quoted-printable On Tue, Jan 14, 2025, at 11:09, Jiaxun Yang wrote: > =E5=9C=A82025=E5=B9=B41=E6=9C=8814=E6=97=A5=E4=B8=80=E6=9C=88 =E4=B8=8A= =E5=8D=888:02=EF=BC=8CGeert Uytterhoeven=E5=86=99=E9=81=93=EF=BC=9A >> >> Shouldn't arch/mips/include/asm/io.h do >> >> #define PCI_IOBASE mips_io_port_base >> >> unconditionally, _before_ including ? > > The problem here is defining PCI_IOBASE implied use of logic_pio and V= M mapped > io access, which is not true for many MIPS systems... > I don't think that was ever meant to be the intention of the #ifdef in drivers/pci/pci.c. Checking for PCI_IOBASE there should mainly ensure the default pci_pio_to_address/pci_address_to_pio don't cause a link failure on architectures that don't have any memory mapped PIO at all. For MIPS platforms that don't need logic_pio because all of the PIO space is mapped to a fixed physical address, the default pci_remap_iospace/pci_pio_to_address/pci_address_to_pio/ pci_register_io_range could just be replaced with a trivial architecture/platform specific version. Arnd