From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 3EB8D2FF66C; Thu, 13 Nov 2025 19:02:14 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1763060535; cv=none; b=pq/1XRo5eaZLoWoLvPKc81nnTRIBguqMvohO6KFEKI5yEs6NwL3Vhb5CVorbuqB7fZ7NxiJxPJKDDqT6ln93E+Iqvl8f5Tl3hR5j7+ymF08QQaSqrXC2Yi/RnBlLgtx8+tTJ3/yCypeqtxz+0um8qFZNZPaBJHCstcdBLO31oxQ= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1763060535; c=relaxed/simple; bh=NxX5HHbFcIN3EsnjCku3eNlgIBOunpG6d5sb9JJ/lQc=; h=Date:Message-ID:From:To:Cc:Subject:In-Reply-To:References: MIME-Version:Content-Type; b=jQNzzmp1FhVa0P3XpK+0ZRBEmK7CiqkZ1EtgdxFdjBgd6Nw498V0YTIH3MIJj0/L++DGHu6L0iO8ie3rqlvBWRuJhASb4uyqBtImIzVR21G4VZyMIjzqhEgp6im5tFZjgj+Mu6IEJIjh8Dq+4zN+3V4gxegFucOgNZXXx7wIVbg= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=pxow43lK; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="pxow43lK" Received: by smtp.kernel.org (Postfix) with ESMTPSA id C02D9C4CEF8; Thu, 13 Nov 2025 19:02:14 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1763060534; bh=NxX5HHbFcIN3EsnjCku3eNlgIBOunpG6d5sb9JJ/lQc=; h=Date:From:To:Cc:Subject:In-Reply-To:References:From; b=pxow43lK1WTILlQrFCfVq4v5TNhENeA/KV1ZaW0SAsiJVRIVlWeS0WkkcMYHIPyWE LKJmfRZytRJu5gYRni4xKNxrfIY3S/UiQPx40pd8MGTiWPO0FawRKsY5E6DE9qJeX5 CTvHNCLkYMByYHHGOs92kimRMXZJprFVxL/AZTdpOisjeUcVx5CKUC/fQKOS6oziLx hF7bCZt/R1pQABjjpfDBP1zcW6RAxJf1yBm5bnnwRVKYqZ7igbPFe++1PeCGMkZy+6 EV0pCyFMKZCgnKDJtzgTBgSECIdui2O+hg9NjipfatnKNtY1HRZzrM0+zn6Go0Cvg9 T2s4l38N1eI0w== Received: from sofa.misterjones.org ([185.219.108.64] helo=goblin-girl.misterjones.org) by disco-boy.misterjones.org with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.98.2) (envelope-from ) id 1vJcaC-00000004z2p-2i8L; Thu, 13 Nov 2025 19:02:12 +0000 Date: Thu, 13 Nov 2025 19:02:12 +0000 Message-ID: <86h5uxu56z.wl-maz@kernel.org> From: Marc Zyngier To: Luigi Rizzo Cc: Thomas Gleixner , Luigi Rizzo , Paolo Abeni , Andrew Morton , Sean Christopherson , Jacob Pan , linux-kernel@vger.kernel.org, linux-arch@vger.kernel.org, Bjorn Helgaas , Willem de Bruijn Subject: Re: [PATCH 1/6] genirq: platform wide interrupt moderation: Documentation, Kconfig, irq_desc In-Reply-To: References: <20251112192408.3646835-1-lrizzo@google.com> <20251112192408.3646835-2-lrizzo@google.com> <86o6p6t67m.wl-maz@kernel.org> <86jyzut2ni.wl-maz@kernel.org> User-Agent: Wanderlust/2.15.9 (Almost Unreal) SEMI-EPG/1.14.7 (Harue) FLIM-LB/1.14.9 (=?UTF-8?B?R29qxY0=?=) APEL-LB/10.8 EasyPG/1.0.0 Emacs/30.1 (aarch64-unknown-linux-gnu) MULE/6.0 (HANACHIRUSATO) Precedence: bulk X-Mailing-List: linux-arch@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 (generated by SEMI-EPG 1.14.7 - "Harue") Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: quoted-printable X-SA-Exim-Connect-IP: 185.219.108.64 X-SA-Exim-Rcpt-To: lrizzo@google.com, tglx@linutronix.de, rizzo.unipi@gmail.com, pabeni@redhat.com, akpm@linux-foundation.org, seanjc@google.com, jacob.jun.pan@linux.intel.com, linux-kernel@vger.kernel.org, linux-arch@vger.kernel.org, bhelgaas@google.com, willemb@google.com X-SA-Exim-Mail-From: maz@kernel.org X-SA-Exim-Scanned: No (on disco-boy.misterjones.org); SAEximRunCond expanded to false On Thu, 13 Nov 2025 14:55:55 +0000, Luigi Rizzo wrote: >=20 > On Thu, Nov 13, 2025 at 3:42=E2=80=AFPM Marc Zyngier wro= te: > > [...] >=20 > > > > The descriptions are also massively x86-specific. That's probably OK > > for the stuff you care about, but I'd certainly would want things to > > be a bit more abstract and applicable to all architectures. >=20 > Absolutely. >=20 > > I also note that since you explicitly check for handle_edge_irq() in > > set_moderation_mode(), this will not work on anything GIC related, or > > any other architecture that uses the fasteoi flows. I really wonder > > why you are not looking at the actual trigger mode instead... >=20 > sure, that would be the best thing. Any suggestions on how to fix the > check ? I made that suggestion already: check the trigger mode (the interrupt "type") and only apply this to edge interrupts (and stop mentioning MSIs, for which some architectures have a level variant). > > Until you fix it, please refrain from touching the GICv3 code, and > > make sure this is solely enabled on x86 -- it clearly wasn't tested on > > anything else. >=20 > FWIW I did verify correct operation and performance boost on arm64, > both network and nvme (this was a previous version which > did not restrict to handle_edge_irq). You do realise that what is not on the list doesn't exist, right? ;-) > Also FWIW there should be nothing architecture-specific in this series. We're in strong agreement here. M. --=20 Without deviation from the norm, progress is not possible.