From mboxrd@z Thu Jan 1 00:00:00 1970 From: Alex =?utf-8?Q?Benn=C3=A9e?= Subject: Re: [PATCH v2 24/28] arm64/sve: KVM: Hide SVE from CPU features exposed to guests Date: Thu, 14 Sep 2017 14:32:09 +0100 Message-ID: <87377p9zja.fsf@linaro.org> References: <1504198860-12951-1-git-send-email-Dave.Martin@arm.com> <1504198860-12951-25-git-send-email-Dave.Martin@arm.com> Mime-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: 8bit Return-path: Received: from mail-wr0-f173.google.com ([209.85.128.173]:53029 "EHLO mail-wr0-f173.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751316AbdINNcM (ORCPT ); Thu, 14 Sep 2017 09:32:12 -0400 Received: by mail-wr0-f173.google.com with SMTP id c23so338196wrg.9 for ; Thu, 14 Sep 2017 06:32:11 -0700 (PDT) In-reply-to: <1504198860-12951-25-git-send-email-Dave.Martin@arm.com> Sender: linux-arch-owner@vger.kernel.org List-ID: To: Dave Martin Cc: linux-arm-kernel@lists.infradead.org, Catalin Marinas , Will Deacon , Ard Biesheuvel , Szabolcs Nagy , Richard Sandiford , kvmarm@lists.cs.columbia.edu, libc-alpha@sourceware.org, linux-arch@vger.kernel.org, Christoffer Dall , Marc Zyngier Dave Martin writes: > KVM guests cannot currently use SVE, because SVE is always > configured to trap to EL2. > > However, a guest that sees SVE reported as present in > ID_AA64PFR0_EL1 may legitimately expect that SVE works and try to > use it. Instead of working, the guest will receive an injected > undef exception, which may cause the guest to oops or go into a > spin. > > To avoid misleading the guest into believing that SVE will work, > this patch masks out the SVE field from ID_AA64PFR0_EL1 when a > guest attempts to read this register. No support is explicitly > added for ID_AA64ZFR0_EL1 either, so that is still emulated as > reading as zero, which is consistent with SVE not being > implemented. > > This is a temporary measure, and will be removed in a later series > when full KVM support for SVE is implemented. > > Signed-off-by: Dave Martin > Cc: Marc Zyngier Reviewed-by: Alex Bennée > > --- > > Changes since v1 > ---------------- > > Requested by Marc Zyngier: > > * Use pr_err() instead inventing "kvm_info_once" ad-hoc. > --- > arch/arm64/kvm/sys_regs.c | 12 +++++++++++- > 1 file changed, 11 insertions(+), 1 deletion(-) > > diff --git a/arch/arm64/kvm/sys_regs.c b/arch/arm64/kvm/sys_regs.c > index b1f7552..a0ee9b0 100644 > --- a/arch/arm64/kvm/sys_regs.c > +++ b/arch/arm64/kvm/sys_regs.c > @@ -23,6 +23,7 @@ > #include > #include > #include > +#include > #include > > #include > @@ -897,8 +898,17 @@ static u64 read_id_reg(struct sys_reg_desc const *r, bool raz) > { > u32 id = sys_reg((u32)r->Op0, (u32)r->Op1, > (u32)r->CRn, (u32)r->CRm, (u32)r->Op2); > + u64 val = raz ? 0 : read_sanitised_ftr_reg(id); > > - return raz ? 0 : read_sanitised_ftr_reg(id); > + if (id == SYS_ID_AA64PFR0_EL1) { > + if (val & (0xfUL << ID_AA64PFR0_SVE_SHIFT)) > + pr_err_once("kvm [%i]: SVE unsupported for guests, suppressing\n", > + task_pid_nr(current)); > + > + val &= ~(0xfUL << ID_AA64PFR0_SVE_SHIFT); > + } > + > + return val; > } > > /* cpufeature ID register access trap handlers */ From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail-wr0-f173.google.com ([209.85.128.173]:53029 "EHLO mail-wr0-f173.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751316AbdINNcM (ORCPT ); Thu, 14 Sep 2017 09:32:12 -0400 Received: by mail-wr0-f173.google.com with SMTP id c23so338196wrg.9 for ; Thu, 14 Sep 2017 06:32:11 -0700 (PDT) References: <1504198860-12951-1-git-send-email-Dave.Martin@arm.com> <1504198860-12951-25-git-send-email-Dave.Martin@arm.com> From: Alex =?utf-8?Q?Benn=C3=A9e?= Subject: Re: [PATCH v2 24/28] arm64/sve: KVM: Hide SVE from CPU features exposed to guests In-reply-to: <1504198860-12951-25-git-send-email-Dave.Martin@arm.com> Date: Thu, 14 Sep 2017 14:32:09 +0100 Message-ID: <87377p9zja.fsf@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: 8bit Sender: linux-arch-owner@vger.kernel.org List-ID: To: Dave Martin Cc: linux-arm-kernel@lists.infradead.org, Catalin Marinas , Will Deacon , Ard Biesheuvel , Szabolcs Nagy , Richard Sandiford , kvmarm@lists.cs.columbia.edu, libc-alpha@sourceware.org, linux-arch@vger.kernel.org, Christoffer Dall , Marc Zyngier Message-ID: <20170914133209.c0XGtDJbzRLP9VXCUk_MjyrN4-of5PdwuAedkRSv5bw@z> Dave Martin writes: > KVM guests cannot currently use SVE, because SVE is always > configured to trap to EL2. > > However, a guest that sees SVE reported as present in > ID_AA64PFR0_EL1 may legitimately expect that SVE works and try to > use it. Instead of working, the guest will receive an injected > undef exception, which may cause the guest to oops or go into a > spin. > > To avoid misleading the guest into believing that SVE will work, > this patch masks out the SVE field from ID_AA64PFR0_EL1 when a > guest attempts to read this register. No support is explicitly > added for ID_AA64ZFR0_EL1 either, so that is still emulated as > reading as zero, which is consistent with SVE not being > implemented. > > This is a temporary measure, and will be removed in a later series > when full KVM support for SVE is implemented. > > Signed-off-by: Dave Martin > Cc: Marc Zyngier Reviewed-by: Alex Bennée > > --- > > Changes since v1 > ---------------- > > Requested by Marc Zyngier: > > * Use pr_err() instead inventing "kvm_info_once" ad-hoc. > --- > arch/arm64/kvm/sys_regs.c | 12 +++++++++++- > 1 file changed, 11 insertions(+), 1 deletion(-) > > diff --git a/arch/arm64/kvm/sys_regs.c b/arch/arm64/kvm/sys_regs.c > index b1f7552..a0ee9b0 100644 > --- a/arch/arm64/kvm/sys_regs.c > +++ b/arch/arm64/kvm/sys_regs.c > @@ -23,6 +23,7 @@ > #include > #include > #include > +#include > #include > > #include > @@ -897,8 +898,17 @@ static u64 read_id_reg(struct sys_reg_desc const *r, bool raz) > { > u32 id = sys_reg((u32)r->Op0, (u32)r->Op1, > (u32)r->CRn, (u32)r->CRm, (u32)r->Op2); > + u64 val = raz ? 0 : read_sanitised_ftr_reg(id); > > - return raz ? 0 : read_sanitised_ftr_reg(id); > + if (id == SYS_ID_AA64PFR0_EL1) { > + if (val & (0xfUL << ID_AA64PFR0_SVE_SHIFT)) > + pr_err_once("kvm [%i]: SVE unsupported for guests, suppressing\n", > + task_pid_nr(current)); > + > + val &= ~(0xfUL << ID_AA64PFR0_SVE_SHIFT); > + } > + > + return val; > } > > /* cpufeature ID register access trap handlers */ -- Alex Bennée