From: "Björn Töpel" <bjorn@kernel.org>
To: Guo Ren <guoren@kernel.org>
Cc: palmer@rivosinc.com, conor.dooley@microchip.com,
liaochang1@huawei.com, linux-arch@vger.kernel.org,
linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org,
Guo Ren <guoren@linux.alibaba.com>,
Bjorn Topel <bjorn.topel@gmail.com>
Subject: Re: [PATCH] riscv: kprobe: Fixup misaligned load text
Date: Thu, 02 Feb 2023 10:48:37 +0100 [thread overview]
Message-ID: <87cz6s75ze.fsf@all.your.base.are.belong.to.us> (raw)
In-Reply-To: <CAJF2gTSj12E9+peMF0rNY_psGDyEG5BbMY6V-s4dK0FpkCC9Yw@mail.gmail.com>
Guo Ren <guoren@kernel.org> writes:
> On Wed, Feb 1, 2023 at 5:40 PM Björn Töpel <bjorn@kernel.org> wrote:
>>
>> guoren@kernel.org writes:
>>
>> > From: Guo Ren <guoren@linux.alibaba.com>
>> >
>> > The current kprobe would cause a misaligned load for the probe point.
>> > This patch fixup it with two half-word loads instead.
>> >
>> > Fixes: c22b0bcb1dd0 ("riscv: Add kprobes supported")
>> > Signed-off-by: Guo Ren <guoren@linux.alibaba.com>
>> > Signed-off-by: Guo Ren <guoren@kernel.org>
>> > Link: https://lore.kernel.org/linux-riscv/878rhig9zj.fsf@all.your.base.are.belong.to.us/
>> > Reported-by: Bjorn Topel <bjorn.topel@gmail.com>
>> > ---
>> > arch/riscv/kernel/probes/kprobes.c | 4 +++-
>> > 1 file changed, 3 insertions(+), 1 deletion(-)
>> >
>> > diff --git a/arch/riscv/kernel/probes/kprobes.c b/arch/riscv/kernel/probes/kprobes.c
>> > index 41c7481afde3..c1160629cef4 100644
>> > --- a/arch/riscv/kernel/probes/kprobes.c
>> > +++ b/arch/riscv/kernel/probes/kprobes.c
>> > @@ -74,7 +74,9 @@ int __kprobes arch_prepare_kprobe(struct kprobe *p)
>> > return -EILSEQ;
>> >
>> > /* copy instruction */
>> > - p->opcode = *p->addr;
>> > + p->opcode = (kprobe_opcode_t)(*(u16 *)probe_addr);
>> > + if (GET_INSN_LENGTH(p->opcode) == 4)
>> > + p->opcode |= (kprobe_opcode_t)(*(u16 *)(probe_addr + 2))
>> > << 16;
>>
>> Ugh, those casts. :-( What about the memcpy variant you had in the other
>> thread?
> The memcpy version would force load probe_addr + 2. This one would
> save an lh operation. The code text guarantees half-word alignment. No
> misaligned load happened. Second, kprobe wouldn't write the last half
> of 32b instruction.
Ok, something more readable, like:
diff --git a/arch/riscv/kernel/probes/kprobes.c b/arch/riscv/kernel/probes/kprobes.c
index f21592d20306..3602352ba175 100644
--- a/arch/riscv/kernel/probes/kprobes.c
+++ b/arch/riscv/kernel/probes/kprobes.c
@@ -50,14 +50,16 @@ static void __kprobes arch_simulate_insn(struct kprobe *p, struct pt_regs *regs)
int __kprobes arch_prepare_kprobe(struct kprobe *p)
{
- unsigned long probe_addr = (unsigned long)p->addr;
+ u16 *insn = (u16 *)p->addr;
- if (probe_addr & 0x1)
+ if ((uintptr_t)insn & 0x1)
return -EILSEQ;
/* copy instruction */
- p->opcode = *p->addr;
-
+ p->opcode = *insn++;
+ if (GET_INSN_LENGTH(p->opcode) == 4)
+ p->opcode |= *insn << 16;
+
/* decode instruction */
switch (riscv_probe_decode_insn(p->addr, &p->ainsn.api)) {
case INSN_REJECTED: /* insn not supported */
Björn
next prev parent reply other threads:[~2023-02-02 9:49 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-02-01 6:46 [PATCH] riscv: kprobe: Fixup misaligned load text guoren
2023-02-01 9:40 ` Björn Töpel
2023-02-02 6:17 ` Guo Ren
2023-02-02 9:48 ` Björn Töpel [this message]
2023-02-02 10:59 ` Jessica Clarke
2023-02-02 14:36 ` Björn Töpel
2023-02-06 3:10 ` Guo Ren
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