From mboxrd@z Thu Jan 1 00:00:00 1970 From: Alex =?utf-8?Q?Benn=C3=A9e?= Subject: Re: [PATCH v2 17/28] arm64/sve: Preserve SVE registers around kernel-mode NEON use Date: Thu, 14 Sep 2017 11:52:22 +0100 Message-ID: <87efr9a6xl.fsf@linaro.org> References: <1504198860-12951-1-git-send-email-Dave.Martin@arm.com> <1504198860-12951-18-git-send-email-Dave.Martin@arm.com> Mime-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: base64 Return-path: In-reply-to: <1504198860-12951-18-git-send-email-Dave.Martin@arm.com> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: kvmarm-bounces@lists.cs.columbia.edu Sender: kvmarm-bounces@lists.cs.columbia.edu To: Dave Martin Cc: linux-arch@vger.kernel.org, libc-alpha@sourceware.org, Ard Biesheuvel , Szabolcs Nagy , Catalin Marinas , Will Deacon , Richard Sandiford , kvmarm@lists.cs.columbia.edu, linux-arm-kernel@lists.infradead.org List-Id: linux-arch.vger.kernel.org CkRhdmUgTWFydGluIDxEYXZlLk1hcnRpbkBhcm0uY29tPiB3cml0ZXM6Cgo+IEtlcm5lbC1tb2Rl IE5FT04gd2lsbCBjb3JydXB0IHRoZSBTVkUgdmVjdG9yIHJlZ2lzdGVycywgZHVlIHRvIHRoZQo+ IHdheSB0aGV5IGFsaWFzIHRoZSBGUFNJTUQgdmVjdG9yIHJlZ2lzdGVycyBpbiB0aGUgaGFyZHdh cmUuCj4KPiBUaGlzIHBhdGNoIGVuc3VyZXMgdGhhdCBhbnkgbGl2ZSBTVkUgcmVnaXN0ZXIgY29u dGVudCBmb3IgdGhlIHRhc2sKPiBpcyBzYXZlZCBieSBrZXJuZWxfbmVvbl9iZWdpbigpLiAgVGhl IGRhdGEgd2lsbCBiZSByZXN0b3JlZCBpbiB0aGUKPiB1c3VhbCB3YXkgb24gcmV0dXJuIHRvIHVz ZXJzcGFjZS4KPgo+IFNpZ25lZC1vZmYtYnk6IERhdmUgTWFydGluIDxEYXZlLk1hcnRpbkBhcm0u Y29tPgo+IFJldmlld2VkLWJ5OiBBcmQgQmllc2hldXZlbCA8YXJkLmJpZXNoZXV2ZWxAbGluYXJv Lm9yZz4KClJldmlld2VkLWJ5OiBBbGV4IEJlbm7DqWUgPGFsZXguYmVubmVlQGxpbmFyby5vcmc+ Cgo+IC0tLQo+ICBhcmNoL2FybTY0L2tlcm5lbC9mcHNpbWQuYyB8IDYgKysrKy0tCj4gIDEgZmls ZSBjaGFuZ2VkLCA0IGluc2VydGlvbnMoKyksIDIgZGVsZXRpb25zKC0pCj4KPiBkaWZmIC0tZ2l0 IGEvYXJjaC9hcm02NC9rZXJuZWwvZnBzaW1kLmMgYi9hcmNoL2FybTY0L2tlcm5lbC9mcHNpbWQu Ywo+IGluZGV4IGNlYTA1YTcuLmRkODlhY2YgMTAwNjQ0Cj4gLS0tIGEvYXJjaC9hcm02NC9rZXJu ZWwvZnBzaW1kLmMKPiArKysgYi9hcmNoL2FybTY0L2tlcm5lbC9mcHNpbWQuYwo+IEBAIC03NDQs OCArNzQ0LDEwIEBAIHZvaWQga2VybmVsX25lb25fYmVnaW4odm9pZCkKPiAgCV9fdGhpc19jcHVf d3JpdGUoa2VybmVsX25lb25fYnVzeSwgdHJ1ZSk7Cj4KPiAgCS8qIFNhdmUgdW5zYXZlZCB0YXNr IGZwc2ltZCBzdGF0ZSwgaWYgYW55OiAqLwo+IC0JaWYgKGN1cnJlbnQtPm1tICYmICF0ZXN0X2Fu ZF9zZXRfdGhyZWFkX2ZsYWcoVElGX0ZPUkVJR05fRlBTVEFURSkpCj4gLQkJZnBzaW1kX3NhdmVf c3RhdGUoJmN1cnJlbnQtPnRocmVhZC5mcHNpbWRfc3RhdGUpOwo+ICsJaWYgKGN1cnJlbnQtPm1t KSB7Cj4gKwkJdGFza19mcHNpbWRfc2F2ZSgpOwo+ICsJCXNldF90aHJlYWRfZmxhZyhUSUZfRk9S RUlHTl9GUFNUQVRFKTsKPiArCX0KPgo+ICAJLyogSW52YWxpZGF0ZSBhbnkgdGFzayBzdGF0ZSBy ZW1haW5pbmcgaW4gdGhlIGZwc2ltZCByZWdzOiAqLwo+ICAJX190aGlzX2NwdV93cml0ZShmcHNp bWRfbGFzdF9zdGF0ZSwgTlVMTCk7CgoKLS0KQWxleCBCZW5uw6llCl9fX19fX19fX19fX19fX19f X19fX19fX19fX19fX19fX19fX19fX19fX19fX19fCmt2bWFybSBtYWlsaW5nIGxpc3QKa3ZtYXJt QGxpc3RzLmNzLmNvbHVtYmlhLmVkdQpodHRwczovL2xpc3RzLmNzLmNvbHVtYmlhLmVkdS9tYWls bWFuL2xpc3RpbmZvL2t2bWFybQo= From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail-wr0-f173.google.com ([209.85.128.173]:46912 "EHLO mail-wr0-f173.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752007AbdINKwZ (ORCPT ); Thu, 14 Sep 2017 06:52:25 -0400 Received: by mail-wr0-f173.google.com with SMTP id o42so5508536wrb.3 for ; Thu, 14 Sep 2017 03:52:24 -0700 (PDT) References: <1504198860-12951-1-git-send-email-Dave.Martin@arm.com> <1504198860-12951-18-git-send-email-Dave.Martin@arm.com> From: Alex =?utf-8?Q?Benn=C3=A9e?= Subject: Re: [PATCH v2 17/28] arm64/sve: Preserve SVE registers around kernel-mode NEON use In-reply-to: <1504198860-12951-18-git-send-email-Dave.Martin@arm.com> Date: Thu, 14 Sep 2017 11:52:22 +0100 Message-ID: <87efr9a6xl.fsf@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: 8bit Sender: linux-arch-owner@vger.kernel.org List-ID: To: Dave Martin Cc: linux-arm-kernel@lists.infradead.org, Catalin Marinas , Will Deacon , Ard Biesheuvel , Szabolcs Nagy , Richard Sandiford , kvmarm@lists.cs.columbia.edu, libc-alpha@sourceware.org, linux-arch@vger.kernel.org Message-ID: <20170914105222.96CwNKLHLYO0afN_tTzZ6kyPOjDNOM2PReR_LTsD50c@z> Dave Martin writes: > Kernel-mode NEON will corrupt the SVE vector registers, due to the > way they alias the FPSIMD vector registers in the hardware. > > This patch ensures that any live SVE register content for the task > is saved by kernel_neon_begin(). The data will be restored in the > usual way on return to userspace. > > Signed-off-by: Dave Martin > Reviewed-by: Ard Biesheuvel Reviewed-by: Alex Bennée > --- > arch/arm64/kernel/fpsimd.c | 6 ++++-- > 1 file changed, 4 insertions(+), 2 deletions(-) > > diff --git a/arch/arm64/kernel/fpsimd.c b/arch/arm64/kernel/fpsimd.c > index cea05a7..dd89acf 100644 > --- a/arch/arm64/kernel/fpsimd.c > +++ b/arch/arm64/kernel/fpsimd.c > @@ -744,8 +744,10 @@ void kernel_neon_begin(void) > __this_cpu_write(kernel_neon_busy, true); > > /* Save unsaved task fpsimd state, if any: */ > - if (current->mm && !test_and_set_thread_flag(TIF_FOREIGN_FPSTATE)) > - fpsimd_save_state(¤t->thread.fpsimd_state); > + if (current->mm) { > + task_fpsimd_save(); > + set_thread_flag(TIF_FOREIGN_FPSTATE); > + } > > /* Invalidate any task state remaining in the fpsimd regs: */ > __this_cpu_write(fpsimd_last_state, NULL); -- Alex Bennée