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From: "Alex Bennée" <alex.bennee@linaro.org>
To: Dave Martin <Dave.Martin@arm.com>
Cc: linux-arch@vger.kernel.org, libc-alpha@sourceware.org,
	Ard Biesheuvel <ard.biesheuvel@linaro.org>,
	Szabolcs Nagy <szabolcs.nagy@arm.com>,
	gdb@sourceware.org, Yao Qi <Yao.Qi@arm.com>,
	Alan Hayward <alan.hayward@arm.com>,
	Will Deacon <will.deacon@arm.com>,
	Richard Sandiford <richard.sandiford@arm.com>,
	Catalin Marinas <catalin.marinas@arm.com>,
	kvmarm@lists.cs.columbia.edu,
	linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCH 14/27] arm64/sve: Backend logic for setting the vector length
Date: Wed, 23 Aug 2017 16:33:18 +0100	[thread overview]
Message-ID: <87shgi9u4h.fsf@linaro.org> (raw)
In-Reply-To: <1502280338-23002-15-git-send-email-Dave.Martin@arm.com>


Dave Martin <Dave.Martin@arm.com> writes:

> This patch implements the core logic for changing a task's vector
> length on request from userspace.  This will be used by the ptrace
> and prctl frontends that are implemented in later patches.
>
> The SVE architecture permits, but does not require, implementations
> to support vector lengths that are not a power of two.  To handle
> this, logic is added to check a requested vector length against a
> possibly sparse bitmap of available vector lengths at runtime, so
> that the best supported value can be chosen.
>
> Signed-off-by: Dave Martin <Dave.Martin@arm.com>
> ---
>  arch/arm64/include/asm/fpsimd.h |   6 +++
>  arch/arm64/kernel/fpsimd.c      | 116 ++++++++++++++++++++++++++++++++++++++++
>  include/uapi/linux/prctl.h      |   5 ++
>  3 files changed, 127 insertions(+)
>
> diff --git a/arch/arm64/include/asm/fpsimd.h b/arch/arm64/include/asm/fpsimd.h
> index 7efd04e..39b26d2 100644
> --- a/arch/arm64/include/asm/fpsimd.h
> +++ b/arch/arm64/include/asm/fpsimd.h
> @@ -70,11 +70,15 @@ extern void fpsimd_update_current_state(struct fpsimd_state *state);
>
>  extern void fpsimd_flush_task_state(struct task_struct *target);
>
> +#define SVE_VL_ARCH_MAX 0x100
> +

Hmm this isn't the same as SVE_VL_MAX. Why aren't we using that?

>  extern void sve_save_state(void *state, u32 *pfpsr);
>  extern void sve_load_state(void const *state, u32 const *pfpsr,
>  			   unsigned long vq_minus_1);
>  extern unsigned int sve_get_vl(void);
>
> +extern int sve_max_vl;
> +
>  #ifdef CONFIG_ARM64_SVE
>
>  extern size_t sve_state_size(struct task_struct const *task);
> @@ -83,6 +87,8 @@ extern void sve_alloc(struct task_struct *task);
>  extern void fpsimd_release_thread(struct task_struct *task);
>  extern void fpsimd_dup_sve(struct task_struct *dst,
>  			   struct task_struct const *src);
> +extern int sve_set_vector_length(struct task_struct *task,
> +				 unsigned long vl, unsigned long flags);
>
>  #else /* ! CONFIG_ARM64_SVE */
>
> diff --git a/arch/arm64/kernel/fpsimd.c b/arch/arm64/kernel/fpsimd.c
> index e8674f6..bce95de 100644
> --- a/arch/arm64/kernel/fpsimd.c
> +++ b/arch/arm64/kernel/fpsimd.c
> @@ -18,12 +18,14 @@
>   */
>
>  #include <linux/bottom_half.h>
> +#include <linux/bitmap.h>
>  #include <linux/cpu.h>
>  #include <linux/cpu_pm.h>
>  #include <linux/kernel.h>
>  #include <linux/init.h>
>  #include <linux/percpu.h>
>  #include <linux/preempt.h>
> +#include <linux/prctl.h>
>  #include <linux/ptrace.h>
>  #include <linux/sched/signal.h>
>  #include <linux/signal.h>
> @@ -111,6 +113,20 @@ static DEFINE_PER_CPU(struct fpsimd_state *, fpsimd_last_state);
>  /* Default VL for tasks that don't set it explicitly: */
>  static int sve_default_vl = -1;
>
> +#ifdef CONFIG_ARM64_SVE
> +
> +/* Maximum supported vector length across all CPUs (initially poisoned) */
> +int sve_max_vl = -1;
> +/* Set of available vector lengths, as vq_to_bit(vq): */
> +static DECLARE_BITMAP(sve_vq_map, SVE_VQ_MAX);
> +
> +#else /* ! CONFIG_ARM64_SVE */
> +
> +/* Dummy declaration for code that will be optimised out: */
> +extern DECLARE_BITMAP(sve_vq_map, SVE_VQ_MAX);
> +
> +#endif /* ! CONFIG_ARM64_SVE */
> +
>  static void sve_free(struct task_struct *task)
>  {
>  	kfree(task->thread.sve_state);
> @@ -148,6 +164,37 @@ static void change_cpacr(u64 old, u64 new)
>  		write_sysreg(new, CPACR_EL1);
>  }
>
> +static unsigned int vq_to_bit(unsigned int vq)
> +{
> +	BUILD_BUG_ON(vq < 1 || vq > SVE_VQ_MAX);
> +
> +	return SVE_VQ_MAX - vq;
> +}
> +
> +static unsigned int bit_to_vq(unsigned int bit)
> +{
> +	BUILD_BUG_ON(bit >= SVE_VQ_MAX);
> +
> +	return SVE_VQ_MAX - bit;
> +}
> +
> +static unsigned int find_supported_vector_length(unsigned int vl)
> +{
> +	int bit;
> +
> +	BUG_ON(!sve_vl_valid(vl));
> +
> +	BUG_ON(!sve_vl_valid(sve_max_vl));
> +	if (vl > sve_max_vl)
> +		vl = sve_max_vl;
> +
> +	bit = find_next_bit(sve_vq_map, SVE_VQ_MAX,
> +			    vq_to_bit(sve_vq_from_vl(vl)));
> +	BUG_ON(bit < 0 || bit >= SVE_VQ_MAX);
> +
> +	return 16 * bit_to_vq(bit);
> +}
> +
>  #define ZREG(sve_state, vq, n) ((char *)(sve_state) +		\
>  	(SVE_SIG_ZREG_OFFSET(vq, n) - SVE_SIG_REGS_OFFSET))
>
> @@ -235,6 +282,73 @@ void fpsimd_dup_sve(struct task_struct *dst, struct task_struct const *src)
>  	}
>  }
>
> +int sve_set_vector_length(struct task_struct *task,
> +			  unsigned long vl, unsigned long flags)
> +{
> +	BUG_ON(task == current && preemptible());
> +
> +	if (flags & ~(unsigned long)(PR_SVE_VL_INHERIT |
> +				     PR_SVE_SET_VL_ONEXEC))
> +		return -EINVAL;
> +
> +	if (!sve_vl_valid(vl))
> +		return -EINVAL;
> +
> +	/*
> +	 * Clamp to the maximum vector length that VL-agnostic SVE code can
> +	 * work with.  A flag may be assigned in the future to allow setting
> +	 * of larger vector lengths without confusing older software.
> +	 */
> +	if (vl > SVE_VL_ARCH_MAX)
> +		vl = SVE_VL_ARCH_MAX;
> +
> +	vl = find_supported_vector_length(vl);
> +
> +	if (flags & (PR_SVE_VL_INHERIT |
> +		     PR_SVE_SET_VL_ONEXEC))
> +		task->thread.sve_vl_onexec = vl;
> +	else
> +		/* Reset VL to system default on next exec: */
> +		task->thread.sve_vl_onexec = 0;
> +
> +	/* Only actually set the VL if not deferred: */
> +	if (flags & PR_SVE_SET_VL_ONEXEC)
> +		goto out;
> +
> +	/*
> +	 * To ensure the FPSIMD bits of the SVE vector registers are preserved,
> +	 * write any live register state back to task_struct, and convert to a
> +	 * non-SVE thread.
> +	 */
> +	if (vl != task->thread.sve_vl) {
> +		if (task == current) {
> +			task_fpsimd_save();
> +			set_thread_flag(TIF_FOREIGN_FPSTATE);
> +		}
> +
> +		if (test_and_clear_tsk_thread_flag(task, TIF_SVE))
> +			sve_to_fpsimd(task);
> +
> +		/*
> +		 * Force reallocation of task SVE state to the correct size
> +		 * on next use:
> +		 */
> +		sve_free(task);
> +	}
> +
> +	task->thread.sve_vl = vl;
> +
> +	fpsimd_flush_task_state(task);
> +
> +out:
> +	if (flags & PR_SVE_VL_INHERIT)
> +		set_thread_flag(TIF_SVE_VL_INHERIT);
> +	else
> +		clear_thread_flag(TIF_SVE_VL_INHERIT);
> +
> +	return 0;
> +}
> +
>  void fpsimd_release_thread(struct task_struct *dead_task)
>  {
>  	sve_free(dead_task);
> @@ -407,6 +521,8 @@ void fpsimd_flush_thread(void)
>  		 * If not, something went badly wrong.
>  		 */
>  		BUG_ON(!sve_vl_valid(current->thread.sve_vl));
> +		BUG_ON(find_supported_vector_length(current->thread.sve_vl) !=
> +		       current->thread.sve_vl);
>
>  		/*
>  		 * If the task is not set to inherit, ensure that the vector
> diff --git a/include/uapi/linux/prctl.h b/include/uapi/linux/prctl.h
> index a8d0759..1b64901 100644
> --- a/include/uapi/linux/prctl.h
> +++ b/include/uapi/linux/prctl.h
> @@ -197,4 +197,9 @@ struct prctl_mm_map {
>  # define PR_CAP_AMBIENT_LOWER		3
>  # define PR_CAP_AMBIENT_CLEAR_ALL	4
>
> +/* arm64 Scalable Vector Extension controls */
> +# define PR_SVE_SET_VL_ONEXEC		(1 << 18) /* defer effect until exec */
> +# define PR_SVE_VL_LEN_MASK		0xffff
> +# define PR_SVE_VL_INHERIT		(1 << 17) /* inherit across exec */
> +
>  #endif /* _LINUX_PRCTL_H */


--
Alex Bennée
_______________________________________________
kvmarm mailing list
kvmarm@lists.cs.columbia.edu
https://lists.cs.columbia.edu/mailman/listinfo/kvmarm

WARNING: multiple messages have this Message-ID (diff)
From: "Alex Bennée" <alex.bennee@linaro.org>
To: Dave Martin <Dave.Martin@arm.com>
Cc: linux-arm-kernel@lists.infradead.org, linux-arch@vger.kernel.org,
	libc-alpha@sourceware.org, gdb@sourceware.org,
	Ard Biesheuvel <ard.biesheuvel@linaro.org>,
	Szabolcs Nagy <szabolcs.nagy@arm.com>,
	Catalin Marinas <catalin.marinas@arm.com>,
	Yao Qi <Yao.Qi@arm.com>, Alan Hayward <alan.hayward@arm.com>,
	Will Deacon <will.deacon@arm.com>,
	Richard Sandiford <richard.sandiford@arm.com>,
	kvmarm@lists.cs.columbia.edu
Subject: Re: [PATCH 14/27] arm64/sve: Backend logic for setting the vector length
Date: Wed, 23 Aug 2017 16:33:18 +0100	[thread overview]
Message-ID: <87shgi9u4h.fsf@linaro.org> (raw)
Message-ID: <20170823153318.wVDBocQL1DYjzagm7U_pXef0FbPTW1bjKfoPQhdr30Q@z> (raw)
In-Reply-To: <1502280338-23002-15-git-send-email-Dave.Martin@arm.com>


Dave Martin <Dave.Martin@arm.com> writes:

> This patch implements the core logic for changing a task's vector
> length on request from userspace.  This will be used by the ptrace
> and prctl frontends that are implemented in later patches.
>
> The SVE architecture permits, but does not require, implementations
> to support vector lengths that are not a power of two.  To handle
> this, logic is added to check a requested vector length against a
> possibly sparse bitmap of available vector lengths at runtime, so
> that the best supported value can be chosen.
>
> Signed-off-by: Dave Martin <Dave.Martin@arm.com>
> ---
>  arch/arm64/include/asm/fpsimd.h |   6 +++
>  arch/arm64/kernel/fpsimd.c      | 116 ++++++++++++++++++++++++++++++++++++++++
>  include/uapi/linux/prctl.h      |   5 ++
>  3 files changed, 127 insertions(+)
>
> diff --git a/arch/arm64/include/asm/fpsimd.h b/arch/arm64/include/asm/fpsimd.h
> index 7efd04e..39b26d2 100644
> --- a/arch/arm64/include/asm/fpsimd.h
> +++ b/arch/arm64/include/asm/fpsimd.h
> @@ -70,11 +70,15 @@ extern void fpsimd_update_current_state(struct fpsimd_state *state);
>
>  extern void fpsimd_flush_task_state(struct task_struct *target);
>
> +#define SVE_VL_ARCH_MAX 0x100
> +

Hmm this isn't the same as SVE_VL_MAX. Why aren't we using that?

>  extern void sve_save_state(void *state, u32 *pfpsr);
>  extern void sve_load_state(void const *state, u32 const *pfpsr,
>  			   unsigned long vq_minus_1);
>  extern unsigned int sve_get_vl(void);
>
> +extern int sve_max_vl;
> +
>  #ifdef CONFIG_ARM64_SVE
>
>  extern size_t sve_state_size(struct task_struct const *task);
> @@ -83,6 +87,8 @@ extern void sve_alloc(struct task_struct *task);
>  extern void fpsimd_release_thread(struct task_struct *task);
>  extern void fpsimd_dup_sve(struct task_struct *dst,
>  			   struct task_struct const *src);
> +extern int sve_set_vector_length(struct task_struct *task,
> +				 unsigned long vl, unsigned long flags);
>
>  #else /* ! CONFIG_ARM64_SVE */
>
> diff --git a/arch/arm64/kernel/fpsimd.c b/arch/arm64/kernel/fpsimd.c
> index e8674f6..bce95de 100644
> --- a/arch/arm64/kernel/fpsimd.c
> +++ b/arch/arm64/kernel/fpsimd.c
> @@ -18,12 +18,14 @@
>   */
>
>  #include <linux/bottom_half.h>
> +#include <linux/bitmap.h>
>  #include <linux/cpu.h>
>  #include <linux/cpu_pm.h>
>  #include <linux/kernel.h>
>  #include <linux/init.h>
>  #include <linux/percpu.h>
>  #include <linux/preempt.h>
> +#include <linux/prctl.h>
>  #include <linux/ptrace.h>
>  #include <linux/sched/signal.h>
>  #include <linux/signal.h>
> @@ -111,6 +113,20 @@ static DEFINE_PER_CPU(struct fpsimd_state *, fpsimd_last_state);
>  /* Default VL for tasks that don't set it explicitly: */
>  static int sve_default_vl = -1;
>
> +#ifdef CONFIG_ARM64_SVE
> +
> +/* Maximum supported vector length across all CPUs (initially poisoned) */
> +int sve_max_vl = -1;
> +/* Set of available vector lengths, as vq_to_bit(vq): */
> +static DECLARE_BITMAP(sve_vq_map, SVE_VQ_MAX);
> +
> +#else /* ! CONFIG_ARM64_SVE */
> +
> +/* Dummy declaration for code that will be optimised out: */
> +extern DECLARE_BITMAP(sve_vq_map, SVE_VQ_MAX);
> +
> +#endif /* ! CONFIG_ARM64_SVE */
> +
>  static void sve_free(struct task_struct *task)
>  {
>  	kfree(task->thread.sve_state);
> @@ -148,6 +164,37 @@ static void change_cpacr(u64 old, u64 new)
>  		write_sysreg(new, CPACR_EL1);
>  }
>
> +static unsigned int vq_to_bit(unsigned int vq)
> +{
> +	BUILD_BUG_ON(vq < 1 || vq > SVE_VQ_MAX);
> +
> +	return SVE_VQ_MAX - vq;
> +}
> +
> +static unsigned int bit_to_vq(unsigned int bit)
> +{
> +	BUILD_BUG_ON(bit >= SVE_VQ_MAX);
> +
> +	return SVE_VQ_MAX - bit;
> +}
> +
> +static unsigned int find_supported_vector_length(unsigned int vl)
> +{
> +	int bit;
> +
> +	BUG_ON(!sve_vl_valid(vl));
> +
> +	BUG_ON(!sve_vl_valid(sve_max_vl));
> +	if (vl > sve_max_vl)
> +		vl = sve_max_vl;
> +
> +	bit = find_next_bit(sve_vq_map, SVE_VQ_MAX,
> +			    vq_to_bit(sve_vq_from_vl(vl)));
> +	BUG_ON(bit < 0 || bit >= SVE_VQ_MAX);
> +
> +	return 16 * bit_to_vq(bit);
> +}
> +
>  #define ZREG(sve_state, vq, n) ((char *)(sve_state) +		\
>  	(SVE_SIG_ZREG_OFFSET(vq, n) - SVE_SIG_REGS_OFFSET))
>
> @@ -235,6 +282,73 @@ void fpsimd_dup_sve(struct task_struct *dst, struct task_struct const *src)
>  	}
>  }
>
> +int sve_set_vector_length(struct task_struct *task,
> +			  unsigned long vl, unsigned long flags)
> +{
> +	BUG_ON(task == current && preemptible());
> +
> +	if (flags & ~(unsigned long)(PR_SVE_VL_INHERIT |
> +				     PR_SVE_SET_VL_ONEXEC))
> +		return -EINVAL;
> +
> +	if (!sve_vl_valid(vl))
> +		return -EINVAL;
> +
> +	/*
> +	 * Clamp to the maximum vector length that VL-agnostic SVE code can
> +	 * work with.  A flag may be assigned in the future to allow setting
> +	 * of larger vector lengths without confusing older software.
> +	 */
> +	if (vl > SVE_VL_ARCH_MAX)
> +		vl = SVE_VL_ARCH_MAX;
> +
> +	vl = find_supported_vector_length(vl);
> +
> +	if (flags & (PR_SVE_VL_INHERIT |
> +		     PR_SVE_SET_VL_ONEXEC))
> +		task->thread.sve_vl_onexec = vl;
> +	else
> +		/* Reset VL to system default on next exec: */
> +		task->thread.sve_vl_onexec = 0;
> +
> +	/* Only actually set the VL if not deferred: */
> +	if (flags & PR_SVE_SET_VL_ONEXEC)
> +		goto out;
> +
> +	/*
> +	 * To ensure the FPSIMD bits of the SVE vector registers are preserved,
> +	 * write any live register state back to task_struct, and convert to a
> +	 * non-SVE thread.
> +	 */
> +	if (vl != task->thread.sve_vl) {
> +		if (task == current) {
> +			task_fpsimd_save();
> +			set_thread_flag(TIF_FOREIGN_FPSTATE);
> +		}
> +
> +		if (test_and_clear_tsk_thread_flag(task, TIF_SVE))
> +			sve_to_fpsimd(task);
> +
> +		/*
> +		 * Force reallocation of task SVE state to the correct size
> +		 * on next use:
> +		 */
> +		sve_free(task);
> +	}
> +
> +	task->thread.sve_vl = vl;
> +
> +	fpsimd_flush_task_state(task);
> +
> +out:
> +	if (flags & PR_SVE_VL_INHERIT)
> +		set_thread_flag(TIF_SVE_VL_INHERIT);
> +	else
> +		clear_thread_flag(TIF_SVE_VL_INHERIT);
> +
> +	return 0;
> +}
> +
>  void fpsimd_release_thread(struct task_struct *dead_task)
>  {
>  	sve_free(dead_task);
> @@ -407,6 +521,8 @@ void fpsimd_flush_thread(void)
>  		 * If not, something went badly wrong.
>  		 */
>  		BUG_ON(!sve_vl_valid(current->thread.sve_vl));
> +		BUG_ON(find_supported_vector_length(current->thread.sve_vl) !=
> +		       current->thread.sve_vl);
>
>  		/*
>  		 * If the task is not set to inherit, ensure that the vector
> diff --git a/include/uapi/linux/prctl.h b/include/uapi/linux/prctl.h
> index a8d0759..1b64901 100644
> --- a/include/uapi/linux/prctl.h
> +++ b/include/uapi/linux/prctl.h
> @@ -197,4 +197,9 @@ struct prctl_mm_map {
>  # define PR_CAP_AMBIENT_LOWER		3
>  # define PR_CAP_AMBIENT_CLEAR_ALL	4
>
> +/* arm64 Scalable Vector Extension controls */
> +# define PR_SVE_SET_VL_ONEXEC		(1 << 18) /* defer effect until exec */
> +# define PR_SVE_VL_LEN_MASK		0xffff
> +# define PR_SVE_VL_INHERIT		(1 << 17) /* inherit across exec */
> +
>  #endif /* _LINUX_PRCTL_H */


--
Alex Bennée

  reply	other threads:[~2017-08-23 15:33 UTC|newest]

Thread overview: 124+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-08-09 12:05 [PATCH 00/27] ARM Scalable Vector Extension (SVE) Dave Martin
2017-08-09 12:05 ` [PATCH 01/27] regset: Add support for dynamically sized regsets Dave Martin
2017-08-09 12:05   ` Dave Martin
2017-08-18 11:52   ` Alex Bennée
2017-08-18 11:52     ` Alex Bennée
2017-08-09 12:05 ` [PATCH 02/27] arm64: KVM: Hide unsupported AArch64 CPU features from guests Dave Martin
2017-08-09 12:05   ` Dave Martin
2017-08-16 11:10   ` Marc Zyngier
2017-08-16 20:32     ` Dave Martin
2017-08-17  8:45       ` Marc Zyngier
2017-08-17  9:57         ` Dave Martin
2017-08-17  9:57           ` Dave Martin
2017-08-09 12:05 ` [PATCH 03/27] arm64: efi: Add missing Kconfig dependency on KERNEL_MODE_NEON Dave Martin
2017-08-18 12:02   ` Alex Bennée
2017-08-18 12:02     ` Alex Bennée
2017-08-09 12:05 ` [PATCH 04/27] arm64: Port deprecated instruction emulation to new sysctl interface Dave Martin
2017-08-18 12:09   ` Alex Bennée
2017-08-18 12:09     ` Alex Bennée
2017-08-09 12:05 ` [PATCH 05/27] arm64: fpsimd: Simplify uses of {set,clear}_ti_thread_flag() Dave Martin
2017-08-15 17:11   ` Ard Biesheuvel
2017-08-18 16:36   ` [PATCH 05/27] arm64: fpsimd: Simplify uses of {set, clear}_ti_thread_flag() Alex Bennée
2017-08-18 16:36     ` Alex Bennée
2017-08-09 12:05 ` [PATCH 06/27] arm64/sve: System register and exception syndrome definitions Dave Martin
2017-08-21  9:33   ` Alex Bennée
2017-08-21  9:33     ` Alex Bennée
2017-08-21 12:34     ` Alex Bennée
2017-08-21 12:34       ` Alex Bennée
2017-08-21 14:26       ` Dave Martin
2017-08-21 14:50         ` Alex Bennée
2017-08-21 14:50           ` Alex Bennée
2017-08-21 15:19           ` Dave Martin
2017-08-21 15:34             ` Alex Bennée
2017-08-21 15:34               ` Alex Bennée
2017-08-21 13:56     ` Dave Martin
2017-08-21 13:56       ` Dave Martin
2017-08-21 14:36       ` Alex Bennée
2017-08-21 14:36         ` Alex Bennée
2017-08-09 12:05 ` [PATCH 07/27] arm64/sve: Low-level SVE architectural state manipulation functions Dave Martin
2017-08-21 10:11   ` Alex Bennée
2017-08-21 10:11     ` Alex Bennée
2017-08-21 14:38     ` Dave Martin
2017-08-21 14:38       ` Dave Martin
2017-08-09 12:05 ` [PATCH 08/27] arm64/sve: Kconfig update and conditional compilation support Dave Martin
2017-08-21 10:12   ` Alex Bennée
2017-08-21 10:12     ` Alex Bennée
2017-08-09 12:05 ` [PATCH 09/27] arm64/sve: Signal frame and context structure definition Dave Martin
2017-08-09 12:05   ` Dave Martin
2017-08-22 10:22   ` Alex Bennée
2017-08-22 10:22     ` Alex Bennée
2017-08-22 11:17     ` Dave Martin
2017-08-22 13:53       ` Alex Bennée
2017-08-22 13:53         ` Alex Bennée
2017-08-22 14:21         ` Dave Martin
2017-08-22 14:21           ` Dave Martin
2017-08-22 15:03           ` Alex Bennée
2017-08-22 15:03             ` Alex Bennée
2017-08-22 15:41             ` Dave Martin
2017-08-09 12:05 ` [PATCH 10/27] arm64/sve: Low-level CPU setup Dave Martin
2017-08-09 12:05   ` Dave Martin
2017-08-22 15:04   ` Alex Bennée
2017-08-22 15:04     ` Alex Bennée
2017-08-22 15:33     ` Dave Martin
2017-08-09 12:05 ` [PATCH 11/27] arm64/sve: Core task context handling Dave Martin
2017-08-15 17:31   ` Ard Biesheuvel
2017-08-16 10:40     ` Dave Martin
2017-08-17 16:42     ` Dave Martin
2017-08-17 16:46       ` Ard Biesheuvel
2017-08-22 16:21   ` Alex Bennée
2017-08-22 16:21     ` Alex Bennée
2017-08-22 17:19     ` Dave Martin
2017-08-22 18:39       ` Alex Bennée
2017-08-22 18:39         ` Alex Bennée
2017-08-09 12:05 ` [PATCH 12/27] arm64/sve: Support vector length resetting for new processes Dave Martin
2017-08-09 12:05   ` Dave Martin
2017-08-22 16:22   ` Alex Bennée
2017-08-22 16:22     ` Alex Bennée
2017-08-22 17:22     ` Dave Martin
2017-08-22 17:22       ` Dave Martin
2017-08-09 12:05 ` [PATCH 13/27] arm64/sve: Signal handling support Dave Martin
2017-08-23  9:38   ` Alex Bennée
2017-08-23  9:38     ` Alex Bennée
2017-08-23 11:30     ` Dave Martin
2017-08-09 12:05 ` [PATCH 14/27] arm64/sve: Backend logic for setting the vector length Dave Martin
2017-08-23 15:33   ` Alex Bennée [this message]
2017-08-23 15:33     ` Alex Bennée
2017-08-23 17:29     ` Dave Martin
2017-08-09 12:05 ` [PATCH 15/27] arm64/sve: Probe SVE capabilities and usable vector lengths Dave Martin
2017-08-16 17:48   ` Suzuki K Poulose
2017-08-17 10:04     ` Dave Martin
2017-08-17 10:04       ` Dave Martin
2017-08-17 10:46       ` Suzuki K Poulose
2017-08-17 10:46         ` Suzuki K Poulose
2017-08-09 12:05 ` [PATCH 16/27] arm64/sve: Preserve SVE registers around kernel-mode NEON use Dave Martin
2017-08-09 12:05   ` Dave Martin
2017-08-15 17:37   ` Ard Biesheuvel
2017-08-15 17:37     ` Ard Biesheuvel
2017-08-09 12:05 ` [PATCH 17/27] arm64/sve: Preserve SVE registers around EFI runtime service calls Dave Martin
2017-08-15 17:44   ` Ard Biesheuvel
2017-08-16  9:13     ` Dave Martin
2017-08-09 12:05 ` [PATCH 18/27] arm64/sve: ptrace and ELF coredump support Dave Martin
2017-08-09 12:05 ` [PATCH 19/27] arm64/sve: Add prctl controls for userspace vector length management Dave Martin
2017-08-09 12:05 ` [PATCH 20/27] arm64/sve: Add sysctl to set the default vector length for new processes Dave Martin
2017-08-09 12:05 ` [PATCH 21/27] arm64/sve: KVM: Prevent guests from using SVE Dave Martin
2017-08-09 12:05   ` Dave Martin
2017-08-15 16:33   ` Marc Zyngier
2017-08-15 16:33     ` Marc Zyngier
2017-08-16 10:50     ` Dave Martin
2017-08-16 11:20       ` Marc Zyngier
2017-08-16 11:22         ` Marc Zyngier
2017-08-16 11:35         ` Dave Martin
2017-08-09 12:05 ` [PATCH 22/27] arm64/sve: KVM: Treat guest SVE use as undefined instruction execution Dave Martin
2017-08-09 12:05   ` Dave Martin
2017-08-09 12:05 ` [PATCH 23/27] arm64/sve: KVM: Hide SVE from CPU features exposed to guests Dave Martin
2017-08-15 16:37   ` Marc Zyngier
2017-08-16 10:54     ` Dave Martin
2017-08-16 11:10       ` Marc Zyngier
2017-08-16 11:22         ` Dave Martin
2017-08-09 12:05 ` [PATCH 24/27] arm64/sve: Detect SVE and activate runtime support Dave Martin
2017-08-16 17:53   ` Suzuki K Poulose
2017-08-17 10:00     ` Dave Martin
2017-08-17 10:00       ` Dave Martin
2017-08-09 12:05 ` [PATCH 25/27] arm64/sve: Add documentation Dave Martin
2017-08-09 12:05 ` [RFC PATCH 26/27] arm64: signal: Report signal frame size to userspace via auxv Dave Martin
2017-08-09 12:05 ` [RFC PATCH 27/27] arm64/sve: signal: Include SVE when computing AT_MINSIGSTKSZ Dave Martin

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