From mboxrd@z Thu Jan 1 00:00:00 1970 From: Leonardo Bras Subject: Re: [PATCH v3 00/11] Introduces new count-based method for monitoring lockless pagetable walks Date: Fri, 27 Sep 2019 11:46:04 -0300 Message-ID: <8fe1ee1abf52719e75902dc7d5cd1e91751eaba7.camel@linux.ibm.com> Mime-Version: 1.0 Content-Type: multipart/signed; micalg="pgp-sha256"; protocol="application/pgp-signature"; boundary="=-0SqJjAld2WmMrSAcbuQn" Return-path: Sender: linux-kernel-owner@vger.kernel.org To: jhubbard@nvidia.com, linuxppc-dev@lists.ozlabs.org, linux-kernel@vger.kernel.org, kvm-ppc@vger.kernel.org, linux-arch@vger.kernel.org, linux-mm@kvack.org Cc: benh@kernel.crashing.org, paulus@samba.org, mpe@ellerman.id.au, arnd@arndb.de, aneesh.kumar@linux.ibm.com, christophe.leroy@c-s.fr, akpm@linux-foundation.org, dan.j.williams@intel.com, npiggin@gmail.com, mahesh@linux.vnet.ibm.com, gregkh@linuxfoundation.org, tglx@linutronix.de, ganeshgr@linux.ibm.com, allison@lohutok.net, rppt@linux.ibm.com, yuehaibing@huawei.com, ira.weiny@intel.com, jgg@ziepe.ca, keith.busch@intel.com List-Id: linux-arch.vger.kernel.org --=-0SqJjAld2WmMrSAcbuQn Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable John Hubbard writes: > Hi Leonardo, > > Thanks for adding linux-mm to CC for this next round of reviews. For the = benefit > of any new reviewers, I'd like to add that there are some issues that wer= e discovered > while reviewing the v2 patchset, that are not (yet) addressed in this v3 = series. > Since those issues are not listed in the cover letter above, I'll list th= em here Thanks for bringing that. The cover letter is a great place to put this info, I will keep that in mind for future patchsets. > > 1. The locking model requires a combination of disabling interrupts and > atomic counting and memory barriers, but > > a) some memory barriers are missing > (start/end_lockless_pgtbl_walk), and It seems that it works fine today because of the amount of intructions executed between the irq_disable / start_lockless_pgtbl_walk and where the THP collapse/split can happen. (It's very unlikely that it reorders that much). But I don't think it would be so bad to put a memory barrier after irq_disable just in case. > b) some cases (patch #8) fail to disable interrupts I have done some looking into that, and it seems that some uses of {start,end}_lockless_pgtbl_walk are unneeded, because they operate in (nested) guest pgd and I was told it's safe against THP split/collapse. In other uses, there is no interrupt disable because the function is called in real mode, with MSR_EE=3D0, and there we have instructions disabled, so there is no need to disable them again. > > ...so the synchronization appears to be inadequate. (And if it *is* adequ= ate, then > definitely we need the next item, to explain it.) > > 2. Documentation of the synchronization/locking model needs to exist, onc= e we > figure out the exact details of (1). I will add the missing doc in the code, so it may be easier to understand in the future. > > 3. Related to (1), I've asked to change things so that interrupt controls= and=20 > atomic inc/dec are in the same start/end calls--assuming, of course, that= the > caller can tolerate that.=20 I am not sure if it would be ok to use irq_{save,restore} in real mode, I will do some more reading of the docs before addressing this.=20 > > 4. Please see the v2 series for any other details I've missed. > > thanks, > --=20 > John Hubbard > NVIDIA > Thank you for helping, John! Best regards, Leonardo Bras --=-0SqJjAld2WmMrSAcbuQn Content-Type: application/pgp-signature; name="signature.asc" Content-Description: This is a digitally signed message part Content-Transfer-Encoding: 7bit -----BEGIN PGP SIGNATURE----- iQIzBAABCAAdFiEEMdeUgIzgjf6YmUyOlQYWtz9SttQFAl2OIKwACgkQlQYWtz9S ttRybRAArvljWum/p1QDUJofop8oyMMy8mFrtADkUcj7l033ze/c1UL4xVoFGvwQ JjAv7Cz+5anu8KJ3OQy0RUpdKihQh603Mt5fp7Okt8/D3AnBcMgp3hnGvwBDs8l4 OqU3pEjzAFhQRpi0vFzuDLzY6yZBlHhb7keU8FpY9AOVk1M7nVxAYgY5pWiPUTJB 6bxcElXieVV811efuDvuP2i4HG8tjs0uO4i8l4Z7EhoLRSYo030UJ2lRuO83/eYG 1GXxjhkYulE4V5uHJ3PaWmtzre5wvSMHFniZK7XF777UZ5gDDgbo/FjtmYZQmQPx vbOAxfZq3yVakztdgQxYi2YN9Lh2rWJzfeISnWhpLzGS+dvFnDqurLCUieyKk4A8 whBV3OCBpfksUToZuStK6cv2FK/TyArYGBTgPTmLRHn8n4AKgh1DzN2M9YxQ28jd rsAsmal05v6GTWJu8w9fHhwtHUO0HWaygdJGVm483FqVHSCigIShnhqT6QfoZY9q t4DvkFU6htn7vTEVIsLZaOYdyMFsWIZqoItq3kE+FZdcdCBMuLDjP47IK4g0IFtg Yo04gfVicc35HAvJpHCluEwIkEH45KWfRwlcN9rArUYDSMHMYeKIu53d4Q5+eit5 AtqqUn9C4uk9TWoz3ksrfi5waujwmUtAvDaiaMH78SaiQ9IhncY= =tj28 -----END PGP SIGNATURE----- --=-0SqJjAld2WmMrSAcbuQn-- From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mx0a-001b2d01.pphosted.com ([148.163.156.1]:18808 "EHLO mx0a-001b2d01.pphosted.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727079AbfI0OrS (ORCPT ); Fri, 27 Sep 2019 10:47:18 -0400 Message-ID: <8fe1ee1abf52719e75902dc7d5cd1e91751eaba7.camel@linux.ibm.com> Subject: Re: [PATCH v3 00/11] Introduces new count-based method for monitoring lockless pagetable walks From: Leonardo Bras Date: Fri, 27 Sep 2019 11:46:04 -0300 Content-Type: multipart/signed; micalg="pgp-sha256"; protocol="application/pgp-signature"; boundary="=-0SqJjAld2WmMrSAcbuQn" MIME-Version: 1.0 Sender: linux-arch-owner@vger.kernel.org List-ID: To: jhubbard@nvidia.com, linuxppc-dev@lists.ozlabs.org, linux-kernel@vger.kernel.org, kvm-ppc@vger.kernel.org, linux-arch@vger.kernel.org, linux-mm@kvack.org Cc: benh@kernel.crashing.org, paulus@samba.org, mpe@ellerman.id.au, arnd@arndb.de, aneesh.kumar@linux.ibm.com, christophe.leroy@c-s.fr, akpm@linux-foundation.org, dan.j.williams@intel.com, npiggin@gmail.com, mahesh@linux.vnet.ibm.com, gregkh@linuxfoundation.org, tglx@linutronix.de, ganeshgr@linux.ibm.com, allison@lohutok.net, rppt@linux.ibm.com, yuehaibing@huawei.com, ira.weiny@intel.com, jgg@ziepe.ca, keith.busch@intel.com Message-ID: <20190927144604.rEAtplPBlm-CiZ6HyFslgGz9lW4qiUzb99OAuvsOWn4@z> --=-0SqJjAld2WmMrSAcbuQn Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable John Hubbard writes: > Hi Leonardo, > > Thanks for adding linux-mm to CC for this next round of reviews. For the = benefit > of any new reviewers, I'd like to add that there are some issues that wer= e discovered > while reviewing the v2 patchset, that are not (yet) addressed in this v3 = series. > Since those issues are not listed in the cover letter above, I'll list th= em here Thanks for bringing that. The cover letter is a great place to put this info, I will keep that in mind for future patchsets. > > 1. The locking model requires a combination of disabling interrupts and > atomic counting and memory barriers, but > > a) some memory barriers are missing > (start/end_lockless_pgtbl_walk), and It seems that it works fine today because of the amount of intructions executed between the irq_disable / start_lockless_pgtbl_walk and where the THP collapse/split can happen. (It's very unlikely that it reorders that much). But I don't think it would be so bad to put a memory barrier after irq_disable just in case. > b) some cases (patch #8) fail to disable interrupts I have done some looking into that, and it seems that some uses of {start,end}_lockless_pgtbl_walk are unneeded, because they operate in (nested) guest pgd and I was told it's safe against THP split/collapse. In other uses, there is no interrupt disable because the function is called in real mode, with MSR_EE=3D0, and there we have instructions disabled, so there is no need to disable them again. > > ...so the synchronization appears to be inadequate. (And if it *is* adequ= ate, then > definitely we need the next item, to explain it.) > > 2. Documentation of the synchronization/locking model needs to exist, onc= e we > figure out the exact details of (1). I will add the missing doc in the code, so it may be easier to understand in the future. > > 3. Related to (1), I've asked to change things so that interrupt controls= and=20 > atomic inc/dec are in the same start/end calls--assuming, of course, that= the > caller can tolerate that.=20 I am not sure if it would be ok to use irq_{save,restore} in real mode, I will do some more reading of the docs before addressing this.=20 > > 4. Please see the v2 series for any other details I've missed. > > thanks, > --=20 > John Hubbard > NVIDIA > Thank you for helping, John! Best regards, Leonardo Bras --=-0SqJjAld2WmMrSAcbuQn Content-Type: application/pgp-signature; name="signature.asc" Content-Description: This is a digitally signed message part Content-Transfer-Encoding: 7bit -----BEGIN PGP SIGNATURE----- iQIzBAABCAAdFiEEMdeUgIzgjf6YmUyOlQYWtz9SttQFAl2OIKwACgkQlQYWtz9S ttRybRAArvljWum/p1QDUJofop8oyMMy8mFrtADkUcj7l033ze/c1UL4xVoFGvwQ JjAv7Cz+5anu8KJ3OQy0RUpdKihQh603Mt5fp7Okt8/D3AnBcMgp3hnGvwBDs8l4 OqU3pEjzAFhQRpi0vFzuDLzY6yZBlHhb7keU8FpY9AOVk1M7nVxAYgY5pWiPUTJB 6bxcElXieVV811efuDvuP2i4HG8tjs0uO4i8l4Z7EhoLRSYo030UJ2lRuO83/eYG 1GXxjhkYulE4V5uHJ3PaWmtzre5wvSMHFniZK7XF777UZ5gDDgbo/FjtmYZQmQPx vbOAxfZq3yVakztdgQxYi2YN9Lh2rWJzfeISnWhpLzGS+dvFnDqurLCUieyKk4A8 whBV3OCBpfksUToZuStK6cv2FK/TyArYGBTgPTmLRHn8n4AKgh1DzN2M9YxQ28jd rsAsmal05v6GTWJu8w9fHhwtHUO0HWaygdJGVm483FqVHSCigIShnhqT6QfoZY9q t4DvkFU6htn7vTEVIsLZaOYdyMFsWIZqoItq3kE+FZdcdCBMuLDjP47IK4g0IFtg Yo04gfVicc35HAvJpHCluEwIkEH45KWfRwlcN9rArUYDSMHMYeKIu53d4Q5+eit5 AtqqUn9C4uk9TWoz3ksrfi5waujwmUtAvDaiaMH78SaiQ9IhncY= =tj28 -----END PGP SIGNATURE----- --=-0SqJjAld2WmMrSAcbuQn--