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Fri, 14 Nov 2025 11:04:01 -0500 (EST) X-Mailer: MessagingEngine.com Webmail Interface Precedence: bulk X-Mailing-List: linux-arch@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-ThreadId: AWJreI-smgpg Date: Fri, 14 Nov 2025 17:03:40 +0100 From: "Arnd Bergmann" To: "Jonathan Cameron" Cc: "Conor Dooley" , "Catalin Marinas" , linux-cxl@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Linux-Arch , linux-mm@kvack.org, "Dan Williams" , "H. Peter Anvin" , "Peter Zijlstra" , "Andrew Morton" , "Drew Fustini" , "Linus Walleij" , "Alexandre Belloni" , "Krzysztof Kozlowski" , "James Morse" , "Will Deacon" , "Davidlohr Bueso" , linuxarm@huawei.com, "Yushan Wang" , "Lorenzo Pieralisi" , "Mark Rutland" , "Dave Hansen" , "Thomas Gleixner" , "Ingo Molnar" , "Borislav Petkov" , x86@kernel.org, "Andy Lutomirski" , "Dave Jiang" Message-Id: <93c1c6be-dae5-477e-8924-1b77f8567732@app.fastmail.com> In-Reply-To: <20251114155746.00003719@huawei.com> References: <20251031111709.1783347-1-Jonathan.Cameron@huawei.com> <20251108-spearmint-contend-aa3dd8a0220e@spud> <20251114124958.00006a85@huawei.com> <20251114-juror-stiffness-046b47b8d9f7@spud> <02244119-d6b8-4ef4-833f-b8fba7a73f43@app.fastmail.com> <20251114155746.00003719@huawei.com> Subject: Re: [PATCH v5 0/6] Cache coherency management subsystem Content-Type: text/plain Content-Transfer-Encoding: 7bit On Fri, Nov 14, 2025, at 16:57, Jonathan Cameron wrote: > On Fri, 14 Nov 2025 15:07:33 +0100 "Arnd Bergmann" wrote: > Hi Arnd, > > Thanks for taking another look. > > Agreed splitting the menus reduces chance of confusion, so makes > sense to me as well. > > Implementation wise I think we have to use menuconfig + bool if we want > to have help and dependencies and then an if block under that. > The syntax for Kconfig always leaves me finding an example to copy > rather than finding it intuitive > > menuconfig CACHEMAINT_FOR_DMA > bool "Cache management for noncoherent DMA" > depends on RISCV > help > These drivers implement support for noncoherent DMA master devices > on platforms that lack the standard CPU interfaces for this. > > if CACHEMAINT_FOR_DMA > ... drivers here... > > endif #CACHEMAINT_FOR_DMA > > menuconfig CACHEMAINT_FOR_HOTPLUG > bool "Cache management for hotplug like operations" > depends on GENERIC_CPU_CACHE_MAINTENANCE > help > These drivers implement support for cache management flows > as required for action such as memory hotplug on platforms > where this is done by platform specific interfaces. > > if CACHEMAINT_FOR_HOTPLUG > ... drivers here > > endif #CACHEMAINT_FOR_HOTPLUG Works for me. > I'm not sure if the 'hotplug like' is close enough to all the cases > for device drivers that provide the services needed to implement > ARCH_HAS_CPU_CACHE_INVALIDATE_MEMEGION The _FOR_HOTPLUG does feel a little more specific than it should be, but I haven't come up with a better name for it yet. We'll probably figure that out if we ever get a second driver here. > Alternative might be to phrase around pushing beyond the point of > coherence, but that seems to be an ARM specific term and would > seem to incorporate fine grained sharing where this interface might > work but isn't a good solution. Agreed. Arnd