From: john stultz <johnstul@us.ibm.com>
To: Guan Xuetao <guanxuetao@mprc.pku.edu.cn>
Cc: linux-arch@vger.kernel.org, linux-kernel@vger.kernel.org
Subject: Re: [PATCHv1 09/12] unicore32 core architecture: timer and time
Date: Mon, 27 Dec 2010 13:27:20 -0800 [thread overview]
Message-ID: <AANLkTinjzzMz4WFRYmjZiM=P6c1wtSxpY2bzOuUe0Vrd@mail.gmail.com> (raw)
In-Reply-To: <00d601cba465$27154a70$753fdf50$@mprc.pku.edu.cn>
2010/12/25 Guan Xuetao <guanxuetao@mprc.pku.edu.cn>:
> From: Guan Xuetao <guanxuetao@mprc.pku.edu.cn>
>
> Patch 9 implements timer and time. RTC and PWM device drivers are also here.
>
> Signed-off-by: Guan Xuetao <guanxuetao@mprc.pku.edu.cn>
Just a small request:
> +static struct clocksource cksrc_puv3_oscr = {
> + .name = "oscr",
> + .rating = 200,
> + .read = puv3_read_oscr,
> + .mask = CLOCKSOURCE_MASK(32),
> + .shift = 18,
Drop the shift assignment here.
> + cksrc_puv3_oscr.mult =
> + clocksource_hz2mult(CLOCK_TICK_RATE, cksrc_puv3_oscr.shift);
> +
Drop the mult assignment here.
> + clocksource_register(&cksrc_puv3_oscr);
Use "clocksource_register_hz(&cksrc_puv3_oscr, CLOCK_TICK_RATE );" and
the kernel will fill in mult/shift appropriately.
If you have any troubles after doing so, let me know.
thanks
-john
next prev parent reply other threads:[~2010-12-27 21:27 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2010-12-25 18:54 [PATCHv1 09/12] unicore32 core architecture: timer and time Guan Xuetao
2010-12-27 21:27 ` john stultz [this message]
2011-01-02 9:47 ` Guan Xuetao
2011-01-03 5:52 ` Guan Xuetao
2011-01-03 19:58 ` john stultz
2011-01-03 19:58 ` john stultz
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