From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id BCFC1ECAAD8 for ; Wed, 21 Sep 2022 10:32:13 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229830AbiIUKcM (ORCPT ); Wed, 21 Sep 2022 06:32:12 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:37248 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229852AbiIUKcK (ORCPT ); Wed, 21 Sep 2022 06:32:10 -0400 Received: from ams.source.kernel.org (ams.source.kernel.org [IPv6:2604:1380:4601:e00::1]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 4813890822; Wed, 21 Sep 2022 03:32:09 -0700 (PDT) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ams.source.kernel.org (Postfix) with ESMTPS id CDA6FB81F05; Wed, 21 Sep 2022 10:32:07 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 8E428C43145; Wed, 21 Sep 2022 10:32:06 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1663756326; bh=RO40wJv6C6r0uIN8oUy8Bnx6thZE549fS8XAeveAnzM=; h=References:In-Reply-To:From:Date:Subject:To:Cc:From; b=RnMsd+m+liySDC4jM3W4ZgpYEBqlc92oTTnRVkuMj/FjPFASi7pij/KntxZUetnEg l2NgM57Iuw/L9OZv80Oz+A4gxoJEvgBBViJ6tyMkHYkzQSxNPgiSBKoj7cEOAmsk1f /Zg+fOAoFmE5VzN4C39BwlwDFY0mdaiq5Q0n8UkOOGS7Gb6rM1+5BPwKg5J6asyNy+ YnplcSsgleIeAzZS3vXu9GJ8S3k+P4JvZYF6varP6oWXCOOGC/RHUKaGblVp9Y4owD wyPKQwqdunw8YRWydIsrd+Or4VRBLQgvNGAVaZ1BuiH48nfbVkE8DA0xkGjr8SU7wM ZA7oYf5ZzwUrw== Received: by mail-oi1-f176.google.com with SMTP id c81so5293302oif.3; Wed, 21 Sep 2022 03:32:06 -0700 (PDT) X-Gm-Message-State: ACrzQf0yhocn011Vfz7aw8W9g3i4ALBEzVkNmi3ynnspYMwEd0bFLIeu mKU5md/nbsvk5Ukmqt3llpb2+/8Pp0LwRDKv3tI= X-Google-Smtp-Source: AMsMyM4I9eDtJF76P9tPl5czQg+bMIJuYsfIPbg4wB/spY5r7eg4gvt+hbea7dg77NFoOMkXpT5l3NN/NvbTNcENtxQ= X-Received: by 2002:a05:6808:201f:b0:34f:9fdf:dbbf with SMTP id q31-20020a056808201f00b0034f9fdfdbbfmr3457106oiw.19.1663756325508; Wed, 21 Sep 2022 03:32:05 -0700 (PDT) MIME-Version: 1.0 References: <20220908022506.1275799-1-guoren@kernel.org> <20220908022506.1275799-9-guoren@kernel.org> <4babce64-e96d-454c-aa35-243b3f2dc315@www.fastmail.com> <8817af55-de0d-4e8f-a41b-25d01d5fa968@www.fastmail.com> <7a2379cf-c1cf-46af-9172-334d2b9b88d5@www.fastmail.com> In-Reply-To: From: Guo Ren Date: Wed, 21 Sep 2022 18:31:52 +0800 X-Gmail-Original-Message-ID: Message-ID: Subject: Re: [PATCH V4 8/8] riscv: Add config of thread stack size To: Arnd Bergmann Cc: Palmer Dabbelt , Thomas Gleixner , Peter Zijlstra , Andy Lutomirski , "Conor.Dooley" , =?UTF-8?Q?Heiko_St=C3=BCbner?= , Jisheng Zhang , lazyparser@gmail.com, falcon@tinylab.org, Huacai Chen , Anup Patel , Atish Patra , Palmer Dabbelt , Paul Walmsley , Sebastian Andrzej Siewior , Linux-Arch , linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org, Guo Ren , Andreas Schwab Content-Type: text/plain; charset="UTF-8" Precedence: bulk List-ID: X-Mailing-List: linux-arch@vger.kernel.org On Wed, Sep 21, 2022 at 4:23 PM Guo Ren wrote: > > On Wed, Sep 21, 2022 at 2:13 PM Guo Ren wrote: > > > > On Tue, Sep 20, 2022 at 3:18 PM Arnd Bergmann wrote: > > > > > > On Tue, Sep 20, 2022, at 2:46 AM, Guo Ren wrote: > > > > > > > diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig > > > > index dfe600f3526c..8def456f328c 100644 > > > > --- a/arch/riscv/Kconfig > > > > +++ b/arch/riscv/Kconfig > > > > @@ -442,6 +442,16 @@ config IRQ_STACKS > > > > Add independent irq & softirq stacks for percpu to prevent > > > > kernel stack > > > > overflows. We may save some memory footprint by disabling IRQ_STACKS. > > > > > > > > +config THREAD_SIZE > > > > + int "Kernel stack size (in bytes)" if EXPERT > > > > + range 4096 65536 > > > > + default 8192 if 32BIT && !KASAN > > > > + default 32768 if 64BIT && KASAN > > > > + default 16384 > > > > + help > > > > + Specify the Pages of thread stack size (from 4KB to 64KB), which also > > > > + affects irq stack size, which is equal to thread stack size. > > > > > > I still think this should be guarded in a way that prevents > > > setting the stack to smaller than default values unless VMAP_STACK > > > is set as well. > > Current VMAP_STACK would double THREAD_SIZE. Let me see how to reduce > > the VMAP_STACK. > Sorry, for my miss understanding. I have no idea to reduce the > VMAP_STACK's THREAD_ALIGN, THREAD_SIZE*2 is fine. Here is my new > patch: > > diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig > index 76bde12d9f8c..669ae57356a2 100644 > --- a/arch/riscv/Kconfig > +++ b/arch/riscv/Kconfig > @@ -443,6 +443,16 @@ config IRQ_STACKS > Add independent irq & softirq stacks for percpu to prevent > kernel stack > overflows. We may save some memory footprint by disabling IRQ_STACKS. > > +config THREAD_SIZE > + int "Kernel stack size (in bytes)" if VMAP_STACK && EXPERT > + range 4096 65536 > + default 8192 if 32BIT && !KASAN > + default 32768 if 64BIT && KASAN > + default 16384 > + help > + Specify the Pages of thread stack size (from 4KB to 64KB), which also > + affects irq stack size, which is equal to thread stack size. > + > endmenu # "Platform type" > > menu "Kernel features" > diff --git a/arch/riscv/include/asm/thread_info.h > b/arch/riscv/include/asm/thread_info.h > index 043da8ccc7e6..e7ae3f13b879 100644 > --- a/arch/riscv/include/asm/thread_info.h > +++ b/arch/riscv/include/asm/thread_info.h > @@ -11,32 +11,17 @@ > #include > #include > > -#ifdef CONFIG_KASAN > -#define KASAN_STACK_ORDER 1 > -#else > -#define KASAN_STACK_ORDER 0 > -#endif > - > /* thread information allocation */ > -#ifdef CONFIG_64BIT > -#define THREAD_SIZE_ORDER (2 + KASAN_STACK_ORDER) > -#else > -#define THREAD_SIZE_ORDER (1 + KASAN_STACK_ORDER) > -#endif > -#define THREAD_SIZE (PAGE_SIZE << THREAD_SIZE_ORDER) > +#define THREAD_SIZE CONFIG_THREAD_SIZE > > /* > * By aligning VMAP'd stacks to 2 * THREAD_SIZE, we can detect overflow by > - * checking sp & (1 << THREAD_SHIFT), which we can do cheaply in the entry > - * assembly. > + * checking sp & THREAD_SIZE, which we can do cheaply in the entry assembly. > */ > #ifdef CONFIG_VMAP_STACK > #define THREAD_ALIGN (2 * THREAD_SIZE) > -#else > -#define THREAD_ALIGN THREAD_SIZE > #endif > > -#define THREAD_SHIFT (PAGE_SHIFT + THREAD_SIZE_ORDER) > #define OVERFLOW_STACK_SIZE SZ_4K > #define SHADOW_OVERFLOW_STACK_SIZE (1024) > > diff --git a/arch/riscv/kernel/entry.S b/arch/riscv/kernel/entry.S > index 2207cf44a3bc..71ea850ff0db 100644 > --- a/arch/riscv/kernel/entry.S > +++ b/arch/riscv/kernel/entry.S > @@ -29,8 +29,8 @@ _restore_kernel_tpsp: > > #ifdef CONFIG_VMAP_STACK > addi sp, sp, -(PT_SIZE_ON_STACK) > - srli sp, sp, THREAD_SHIFT > - andi sp, sp, 0x1 > + srli sp, sp, PAGE_SHIFT > + andi sp, sp, (THREAD_ALIGN >> PAGE_SHIFT >> 1) > bnez sp, handle_kernel_stack_overflow > REG_L sp, TASK_TI_KERNEL_SP(tp) > #endif Sorry for the update again, fixup !VMAP_STACK compile error. diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig index 76bde12d9f8c..602e577c429c 100644 --- a/arch/riscv/Kconfig +++ b/arch/riscv/Kconfig @@ -443,6 +443,16 @@ config IRQ_STACKS Add independent irq & softirq stacks for percpu to prevent kernel stack overflows. We may save some memory footprint by disabling IRQ_STACKS. +config THREAD_SIZE_ORDER + int "Kernel stack size (in power-of-two numbers of page size)" if VMAP_STACK && EXPERT + range 0 4 + default 1 if 32BIT && !KASAN + default 3 if 64BIT && KASAN + default 2 + help + Specify the Pages of thread stack size (from 4KB to 64KB), which also + affects irq stack size, which is equal to thread stack size. + endmenu # "Platform type" menu "Kernel features" diff --git a/arch/riscv/include/asm/thread_info.h b/arch/riscv/include/asm/thread_info.h index 043da8ccc7e6..3f382490d8ed 100644 --- a/arch/riscv/include/asm/thread_info.h +++ b/arch/riscv/include/asm/thread_info.h @@ -11,24 +11,13 @@ #include #include -#ifdef CONFIG_KASAN -#define KASAN_STACK_ORDER 1 -#else -#define KASAN_STACK_ORDER 0 -#endif - /* thread information allocation */ -#ifdef CONFIG_64BIT -#define THREAD_SIZE_ORDER (2 + KASAN_STACK_ORDER) -#else -#define THREAD_SIZE_ORDER (1 + KASAN_STACK_ORDER) -#endif -#define THREAD_SIZE (PAGE_SIZE << THREAD_SIZE_ORDER) +#define THREAD_SIZE_ORDER CONFIG_THREAD_SIZE_ORDER +#define THREAD_SIZE (1 << PAGE_SHIFT << THREAD_SIZE_ORDER) /* * By aligning VMAP'd stacks to 2 * THREAD_SIZE, we can detect overflow by - * checking sp & (1 << THREAD_SHIFT), which we can do cheaply in the entry - * assembly. + * checking sp & THREAD_SIZE, which we can do cheaply in the entry assembly. */ #ifdef CONFIG_VMAP_STACK #define THREAD_ALIGN (2 * THREAD_SIZE) @@ -36,7 +25,6 @@ #define THREAD_ALIGN THREAD_SIZE #endif -#define THREAD_SHIFT (PAGE_SHIFT + THREAD_SIZE_ORDER) #define OVERFLOW_STACK_SIZE SZ_4K #define SHADOW_OVERFLOW_STACK_SIZE (1024) diff --git a/arch/riscv/kernel/entry.S b/arch/riscv/kernel/entry.S index 5cbd6684ef52..62e8f3a3c942 100644 --- a/arch/riscv/kernel/entry.S +++ b/arch/riscv/kernel/entry.S @@ -29,8 +29,8 @@ _restore_kernel_tpsp: #ifdef CONFIG_VMAP_STACK addi sp, sp, -(PT_SIZE_ON_STACK) - srli sp, sp, THREAD_SHIFT - andi sp, sp, 0x1 + srli sp, sp, PAGE_SHIFT + andi sp, sp, (THREAD_ALIGN >> PAGE_SHIFT >> 1) bnez sp, handle_kernel_stack_overflow REG_L sp, TASK_TI_KERNEL_SP(tp) #endif > > > > > > > > > > Arnd > > > > > > > > -- > > Best Regards > > Guo Ren > > > > -- > Best Regards > Guo Ren -- Best Regards Guo Ren