From mboxrd@z Thu Jan 1 00:00:00 1970 From: Trent Piepho Subject: Re: MMIO and gcc re-ordering issue Date: Tue, 3 Jun 2008 11:47:00 -0700 (PDT) Message-ID: References: <1211852026.3286.36.camel@pasglop> <20080602072403.GA20222@flint.arm.linux.org.uk> <200806031416.18195.nickpiggin@yahoo.com.au> Mime-Version: 1.0 Content-Type: TEXT/PLAIN; charset=US-ASCII; format=flowed Return-path: Received: from az33egw02.freescale.net ([192.88.158.103]:37803 "EHLO az33egw02.freescale.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753176AbYFCSrx (ORCPT ); Tue, 3 Jun 2008 14:47:53 -0400 In-Reply-To: Sender: linux-arch-owner@vger.kernel.org List-ID: To: Linus Torvalds Cc: Nick Piggin , Russell King , Benjamin Herrenschmidt , David Miller , linux-arch@vger.kernel.org, scottwood@freescale.com, linuxppc-dev@ozlabs.org, alan@lxorguk.ukuu.org.uk, linux-kernel@vger.kernel.org On Tue, 3 Jun 2008, Linus Torvalds wrote: > On Tue, 3 Jun 2008, Nick Piggin wrote: >> >> Linus: on x86, memory operations to wc and wc+ memory are not ordered >> with one another, or operations to other memory types (ie. load/load >> and store/store reordering is allowed). Also, as you know, store/load >> reordering is explicitly allowed as well, which covers all memory >> types. So perhaps it is not quite true to say readl/writel is strongly >> ordered by default even on x86. You would have to put in some >> mfence instructions in them to make it so. So on x86, these could be re-ordered? writel(START_OPERATION, CONTROL_REGISTER); status = readl(STATUS_REGISTER); > Well, you have to ask for WC/WC+ anyway, so it's immaterial. A driver that > does that needs to be aware of it. IOW, it's a non-issue, imnsho. You need to ask for coherent DMA memory too.