From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id EA7A8EB64DD for ; Tue, 11 Jul 2023 22:03:43 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231348AbjGKWDn (ORCPT ); Tue, 11 Jul 2023 18:03:43 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:49728 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229551AbjGKWDm (ORCPT ); Tue, 11 Jul 2023 18:03:42 -0400 Received: from casper.infradead.org (casper.infradead.org [IPv6:2001:8b0:10b:1236::1]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 1A50D170C; Tue, 11 Jul 2023 15:03:41 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=infradead.org; s=casper.20170209; h=In-Reply-To:Content-Type:MIME-Version: References:Message-ID:Subject:Cc:To:From:Date:Sender:Reply-To: Content-Transfer-Encoding:Content-ID:Content-Description; bh=ruHFUTBYjMeb32nlu48tPWaF8pJMw/xDaOvIEKoJxjs=; b=dM0kbTdzbqKGUs8PimqMlhNiuL 9K4ZZr2jq02N7HlVgZJqCrsXNsqTj6GnaTbU8l/IjScJNP6nakX2h0eCO+bC333AGt7nU/hvME/Lj ZHVdPns8UL3cG9OrzULU08YpFnZGnmAjWcNiDKuWfUwxQv1RqOmOCHD3fX4RJTaARboBTqyXv6dHZ 8udt53NgleBXCmfQNQEp22OAtqArpSuFhdiJTOSQIrSPtxCceljxvAiJLDr6q9/hhcD6V5kDiDN+r 3avXUTIcn9afQ0u+MWJAaiMKgXRUqGsbdTmuRtkfYVLg+w2KIXqkL0lYcqc1RUQhDqk3Fi0X2Vn0v hEDneSog==; Received: from willy by casper.infradead.org with local (Exim 4.94.2 #2 (Red Hat Linux)) id 1qJLSM-00G5VK-9M; Tue, 11 Jul 2023 22:03:38 +0000 Date: Tue, 11 Jul 2023 23:03:38 +0100 From: Matthew Wilcox To: Andrew Morton Cc: Claudio Imbrenda , Christian Borntraeger , linux-arch@vger.kernel.org, linux-mm@kvack.org, linux-kernel@vger.kernel.org, Gerald Schaefer , linux-s390 Subject: Re: [PATCH v5 00/38] New page table range API Message-ID: References: <20230710204339.3554919-1-willy@infradead.org> <8cfc3eef-e387-88e1-1006-2d7d97a09213@linux.ibm.com> <20230711172440.77504856@p-imbrenda> <20230711095233.aa74320d729c1da818a6a4ed@linux-foundation.org> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20230711095233.aa74320d729c1da818a6a4ed@linux-foundation.org> Precedence: bulk List-ID: X-Mailing-List: linux-arch@vger.kernel.org On Tue, Jul 11, 2023 at 09:52:33AM -0700, Andrew Morton wrote: > On Tue, 11 Jul 2023 17:24:40 +0200 Claudio Imbrenda wrote: > > > On Tue, 11 Jul 2023 13:36:27 +0100 > > Matthew Wilcox wrote: > > > > > On Tue, Jul 11, 2023 at 11:07:06AM +0200, Christian Borntraeger wrote: > > > > Am 10.07.23 um 22:43 schrieb Matthew Wilcox (Oracle): > > > > > This patchset changes the API used by the MM to set up page table entries. > > > > > The four APIs are: > > > > > set_ptes(mm, addr, ptep, pte, nr) > > > > > update_mmu_cache_range(vma, addr, ptep, nr) > > > > > flush_dcache_folio(folio) > > > > > flush_icache_pages(vma, page, nr) > > > > > > > > > > flush_dcache_folio() isn't technically new, but no architecture > > > > > implemented it, so I've done that for them. The old APIs remain around > > > > > but are mostly implemented by calling the new interfaces. > > > > > > > > > > The new APIs are based around setting up N page table entries at once. > > > > > The N entries belong to the same PMD, the same folio and the same VMA, > > > > > so ptep++ is a legitimate operation, and locking is taken care of for > > > > > you. Some architectures can do a better job of it than just a loop, > > > > > but I have hesitated to make too deep a change to architectures I don't > > > > > understand well. > > > > > > > > > > One thing I have changed in every architecture is that PG_arch_1 is now a > > > > > per-folio bit instead of a per-page bit. This was something that would > > > > > have to happen eventually, and it makes sense to do it now rather than > > > > > iterate over every page involved in a cache flush and figure out if it > > > > > needs to happen. > > > > > > > > I think we do use PG_arch_1 on s390 for our secure page handling and > > > > making this perf folio instead of physical page really seems wrong > > > > and it probably breaks this code. > > > > > > Per-page flags are going away in the next few years, so you're going to > > > > For each 4k physical page frame, we need to keep track whether it is > > secure or not. > > > > A bit in struct page seems the most logical choice. If that's not > > possible anymore, how would you propose we should do? > > > > > need a new design. s390 seems to do a lot of unusual things. I wish > > > > s390 is an unusual architecture. we are working on un-weirding our > > code, but it takes time > > > > This issue sounds fatal for this version of this patchset? It's only declared as being per-folio in the cover letter to this patchset. I haven't done anything that will prohibit s390 from using it the way they do now. So it's not fatal, but it sounds like the in_range() macro might be ...