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[80.182.198.72]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-a8a1dbfba91sm145366666b.225.2024.09.03.09.15.02 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 03 Sep 2024 09:15:02 -0700 (PDT) From: Andrea della Porta X-Google-Original-From: Andrea della Porta Date: Tue, 3 Sep 2024 18:15:09 +0200 To: Rob Herring Cc: Andrea della Porta , Michael Turquette , Stephen Boyd , Krzysztof Kozlowski , Conor Dooley , Florian Fainelli , Broadcom internal kernel review list , Linus Walleij , Catalin Marinas , Will Deacon , Derek Kiernan , Dragan Cvetic , Arnd Bergmann , Greg Kroah-Hartman , Nicolas Ferre , Claudiu Beznea , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Saravana Kannan , Bjorn Helgaas , linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-rpi-kernel@lists.infradead.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-gpio@vger.kernel.org, netdev@vger.kernel.org, linux-pci@vger.kernel.org, linux-arch@vger.kernel.org, Lee Jones , Andrew Lunn , Stefan Wahren , Herve Codina , Luca Ceresoli , Thomas Petazzoni Subject: Re: [PATCH 04/11] of: address: Preserve the flags portion on 1:1 dma-ranges mapping Message-ID: References: <5ca13a5b01c6c737f07416be53eb05b32811da21.1724159867.git.andrea.porta@suse.com> <20240821001618.GA2309328-robh@kernel.org> Precedence: bulk X-Mailing-List: linux-arch@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Disposition: inline Content-Transfer-Encoding: 8bit In-Reply-To: Hi Rob, On 14:37 Fri 30 Aug , Rob Herring wrote: > On Thu, Aug 29, 2024 at 11:26 AM Andrea della Porta > wrote: > > > > Hi Rob, > > ... > > I think simple-bus where you have it is fine. It is really 1 level up > that needs to be specified. Basically something that's referenced from > the specific PCI device's schema (e.g. the RP1 schema (which you are > missing)). > > That schema needs to roughly look like this: > > properties: > "#address-cells": > const: 3 > "#size-cells": > const: 2 > ranges: > minItems: 1 > maxItems: 6 > items: > additionalItems: true > items: > - maximum: 5 # The BAR number > - const: 0 > - const: 0 > - # TODO: valid PCI memory flags > > patternProperties: > "^bar-bus@[0-5]$": > type: object > additionalProperties: true > properties: > compatible: > const: simple-bus > ranges: true > Hmmm.. not sure how this is going to work. The PCI device (RP1) will havei, at runtime, a compatible like this: compatible = "pci1de4,1\0pciclass,0200000\0pciclass,0200"; that is basically generated automatically by the OF framework. So, in the schema you proposed above, I can put something like: properties: compatible: contains: pattern: '^pci1de4,1' or maybe I could omit the compatible entirely, like in: https://github.com/devicetree-org/dt-schema/blob/main/dtschema/schemas/pci/pci-iommu.yaml that seems to refer to generic compatible values. In both cases though, I don't see how these binding could work with make dt_binding_check, since there's no compatible known at compile time (for the first approach), or no compatible at all (the second approach). Is it intended only as a loose documentation? Or are you proposing that for a future new bus (hence with a new, specific, compatible) that could be described by the schema above? Many thanks, Andrea > There were some discussions around interrupt handling that might also > factor into this. > > Rob