From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 5357CC77B7F for ; Sat, 20 May 2023 15:14:10 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231728AbjETPOJ (ORCPT ); Sat, 20 May 2023 11:14:09 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:58962 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229737AbjETPOI (ORCPT ); Sat, 20 May 2023 11:14:08 -0400 Received: from wout2-smtp.messagingengine.com (wout2-smtp.messagingengine.com [64.147.123.25]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 4E48E115; Sat, 20 May 2023 08:14:01 -0700 (PDT) Received: from compute6.internal (compute6.nyi.internal [10.202.2.47]) by mailout.west.internal (Postfix) with ESMTP id 007223200943; Sat, 20 May 2023 11:13:56 -0400 (EDT) Received: from imap51 ([10.202.2.101]) by compute6.internal (MEProxy); Sat, 20 May 2023 11:13:57 -0400 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=arndb.de; h=cc :cc:content-type:content-type:date:date:from:from:in-reply-to :in-reply-to:message-id:mime-version:references:reply-to:sender :subject:subject:to:to; s=fm3; t=1684595636; x=1684682036; bh=aa 3hX/fA0kw3zAvbLHpth1nKSHzqiH1/xoeSyjYa+44=; b=DjVIQbEEzF8gzFujZJ Ja8RZc6CYm7LRcuMbwXywCoX5IxQGZQDHzllM9s9KoZWL8NCgytF5HXZPayWcyH+ h6hymDfvSRrP75/PknwFAMEELiXgtHlspEubEPRo8vxqJUoQ78ckzWD3FQHdcHMx HCNA1qpmTkWeJhWihk51TrrgSj+NUnC8w9AjsYrhRMKlGdflD1n7fzKeJifEEtPU OxjeHO/lRhIzi9L5CwE5YQlfNvWOGAv/ISoaQWaGVzNzPdgAJ34xkBm1O+eYV9Zw BL8N0CR/OP7eqpwHvJA8xLzurZmeE9h5W77AZ7fvslx7th7pQxFt9e4T/BHBHFNu L+rQ== DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d= messagingengine.com; h=cc:cc:content-type:content-type:date:date :feedback-id:feedback-id:from:from:in-reply-to:in-reply-to :message-id:mime-version:references:reply-to:sender:subject :subject:to:to:x-me-proxy:x-me-proxy:x-me-sender:x-me-sender :x-sasl-enc; s=fm1; t=1684595636; x=1684682036; bh=aa3hX/fA0kw3z AvbLHpth1nKSHzqiH1/xoeSyjYa+44=; b=wtHrGm2xnbhXmTeF6BUoqV5Cn2tCC GkLrDXRIjQQ2J0vNbzWLjHmX7v0huaQy4Jw6IBySxuCpdyqxiZmSFmR73dA+y9Em g3ZkAoXcL1JPGVXfC8cHIzCCo1Pqz+eO8UiuyBOBzBJHCNlGX3II3Uio5IcPpI9L 61aYN6OJj9rnTXWEGSDbtlMBSJrfUrNjs5baol3TkOJMoS3HUXd8G2MiPkcTEBal zJ9t9BuvMzS061gF7ZwnaBmAMXCq0egpYUP2JnlAaIUshDx/xuEaAejpRkAD0K9A hwkpPv3snDnn1OyAVnAs4DYSwRLUo3gvZsSrdHPG4pjoNcfiIlJ3Ri+kw== X-ME-Sender: X-ME-Proxy-Cause: gggruggvucftvghtrhhoucdtuddrgedvhedrfeeijedgkeefucetufdoteggodetrfdotf fvucfrrhhofhhilhgvmecuhfgrshhtofgrihhlpdfqfgfvpdfurfetoffkrfgpnffqhgen uceurghilhhouhhtmecufedttdenucesvcftvggtihhpihgvnhhtshculddquddttddmne cujfgurhepofgfggfkjghffffhvfevufgtsehttdertderredtnecuhfhrohhmpedftehr nhguuceuvghrghhmrghnnhdfuceorghrnhgusegrrhhnuggsrdguvgeqnecuggftrfgrth htvghrnhepffehueegteeihfegtefhjefgtdeugfegjeelheejueethfefgeeghfektdek teffnecuvehluhhsthgvrhfuihiivgeptdenucfrrghrrghmpehmrghilhhfrhhomheprg hrnhgusegrrhhnuggsrdguvg X-ME-Proxy: Feedback-ID: i56a14606:Fastmail Received: by mailuser.nyi.internal (Postfix, from userid 501) id B469DB60089; Sat, 20 May 2023 11:13:55 -0400 (EDT) X-Mailer: MessagingEngine.com Webmail Interface User-Agent: Cyrus-JMAP/3.9.0-alpha0-431-g1d6a3ebb56-fm-20230511.001-g1d6a3ebb Mime-Version: 1.0 Message-Id: In-Reply-To: References: <20230519195135.79600-1-jiaxun.yang@flygoat.com> Date: Sat, 20 May 2023 17:13:35 +0200 From: "Arnd Bergmann" To: "Maciej W. Rozycki" Cc: "Jiaxun Yang" , linux-mips@vger.kernel.org, linux-kernel@vger.kernel.org, "Thomas Bogendoerfer" , Linux-Arch , "Baoquan He" , "Huacai Chen" Subject: Re: [PATCH v4] mips: add including Content-Type: text/plain Precedence: bulk List-ID: X-Mailing-List: linux-arch@vger.kernel.org On Sat, May 20, 2023, at 16:45, Maciej W. Rozycki wrote: > if (sizeof(type) != sizeof(u64) || sizeof(u64) == sizeof(long)) \ > *__mem = __val; \ > else if (cpu_has_64bits) { \ > unsigned long __flags; \ > type __tmp; \ > \ > if (irq) \ > local_irq_save(__flags); \ > __asm__ __volatile__( \ > ".set push" "\t\t# __writeq""\n\t" \ > ".set arch=r4000" "\n\t" \ > "dsll32 %L0, %L0, 0" "\n\t" \ > "dsrl32 %L0, %L0, 0" "\n\t" \ > "dsll32 %M0, %M0, 0" "\n\t" \ > "or %L0, %L0, %M0" "\n\t" \ > "sd %L0, %2" "\n\t" \ > ".set pop" "\n" \ > : "=r" (__tmp) \ > : "0" (__val), "m" (*__mem)); \ > if (irq) \ > local_irq_restore(__flags); \ > } else \ > BUG(); \ > > etc. so we don't actually lose atomicity, because we always use 64-bit > operations (SD above, store-doubleword) and we BUG if they are not there > (i.e. with 32-bit hardware; not a build-time check as in principle the > same 32-bit kernel image ought to run just fine both on 32-bit and 64-bit > hardware). A few MIPS platforms do use them, e.g. SB1250, which requires > 64-bit unswapped accesses to SoC registers. Ok, makes sense. Arnd