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Peter Anvin" , Andrew Morton , "Liam R. Howlett" , Vlastimil Babka , Lorenzo Stoakes , Paul Walmsley , Palmer Dabbelt , Albert Ou , Conor Dooley , Rob Herring , Krzysztof Kozlowski , Arnd Bergmann , Christian Brauner , Peter Zijlstra , Oleg Nesterov , Eric Biederman , Kees Cook , Jonathan Corbet , Shuah Khan , Jann Horn , Conor Dooley , Miguel Ojeda , Alex Gaynor , Boqun Feng , Gary Guo , =?iso-8859-1?Q?Bj=F6rn?= Roy Baron , Benno Lossin , Andreas Hindborg , Alice Ryhl , Trevor Gross , linux-kernel@vger.kernel.org, linux-fsdevel@vger.kernel.org, linux-mm@kvack.org, linux-riscv@lists.infradead.org, devicetree@vger.kernel.org, linux-arch@vger.kernel.org, linux-doc@vger.kernel.org, linux-kselftest@vger.kernel.org, alistair.francis@wdc.com, richard.henderson@linaro.org, jim.shu@sifive.com, andybnac@gmail.com, kito.cheng@sifive.com, charlie@rivosinc.com, atishp@rivosinc.com, evan@rivosinc.com, cleger@rivosinc.com, alexghiti@rivosinc.com, samitolvanen@google.com, broonie@kernel.org, rick.p.edgecombe@intel.com, rust-for-linux@vger.kernel.org, Zong Li Subject: Re: [PATCH v15 22/27] riscv: enable kernel access to shadow stack memory via FWFT sbi call Message-ID: References: <20250502-v5_user_cfi_series-v15-0-914966471885@rivosinc.com> <20250502-v5_user_cfi_series-v15-22-914966471885@rivosinc.com> Precedence: bulk X-Mailing-List: linux-arch@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=iso-8859-1; format=flowed Content-Disposition: inline Content-Transfer-Encoding: 8bit In-Reply-To: On Thu, May 15, 2025 at 09:10:08AM +0200, Alexandre Ghiti wrote: >Hi Deepak, > >On 03/05/2025 01:30, Deepak Gupta wrote: >>Kernel will have to perform shadow stack operations on user shadow stack. >>Like during signal delivery and sigreturn, shadow stack token must be >>created and validated respectively. Thus shadow stack access for kernel >>must be enabled. >> >>In future when kernel shadow stacks are enabled for linux kernel, it must >>be enabled as early as possible for better coverage and prevent imbalance >>between regular stack and shadow stack. After `relocate_enable_mmu` has >>been done, this is as early as possible it can enabled. >> >>Reviewed-by: Zong Li >>Signed-off-by: Deepak Gupta >>--- >> arch/riscv/kernel/asm-offsets.c | 4 ++++ >> arch/riscv/kernel/head.S | 27 +++++++++++++++++++++++++++ >> 2 files changed, 31 insertions(+) >> >>diff --git a/arch/riscv/kernel/asm-offsets.c b/arch/riscv/kernel/asm-offsets.c >>index f33945432f8f..7ab41f01aa17 100644 >>--- a/arch/riscv/kernel/asm-offsets.c >>+++ b/arch/riscv/kernel/asm-offsets.c >>@@ -514,4 +514,8 @@ void asm_offsets(void) >> DEFINE(FREGS_A6, offsetof(struct __arch_ftrace_regs, a6)); >> DEFINE(FREGS_A7, offsetof(struct __arch_ftrace_regs, a7)); >> #endif >>+ DEFINE(SBI_EXT_FWFT, SBI_EXT_FWFT); >>+ DEFINE(SBI_EXT_FWFT_SET, SBI_EXT_FWFT_SET); >>+ DEFINE(SBI_FWFT_SHADOW_STACK, SBI_FWFT_SHADOW_STACK); >>+ DEFINE(SBI_FWFT_SET_FLAG_LOCK, SBI_FWFT_SET_FLAG_LOCK); > > >kernel test robot reported errors when !RV64 and !SBI, the following >diff fixes it: > >diff --git a/arch/riscv/kernel/asm-offsets.c >b/arch/riscv/kernel/asm-offsets.c >index 7fc085d27ca79..3aa5f56a84e9a 100644 >--- a/arch/riscv/kernel/asm-offsets.c >+++ b/arch/riscv/kernel/asm-offsets.c >@@ -532,8 +532,10 @@ void asm_offsets(void) >        DEFINE(FREGS_A6,            offsetof(struct >__arch_ftrace_regs, a6)); >        DEFINE(FREGS_A7,            offsetof(struct >__arch_ftrace_regs, a7)); > #endif >+#ifdef CONFIG_RISCV_SBI >        DEFINE(SBI_EXT_FWFT, SBI_EXT_FWFT); >        DEFINE(SBI_EXT_FWFT_SET, SBI_EXT_FWFT_SET); >        DEFINE(SBI_FWFT_SHADOW_STACK, SBI_FWFT_SHADOW_STACK); >        DEFINE(SBI_FWFT_SET_FLAG_LOCK, SBI_FWFT_SET_FLAG_LOCK); >+#endif > } > >No need to resend the whole series, I'll squash it. Thanks. > >Thanks, > >Alex > > >> } >>diff --git a/arch/riscv/kernel/head.S b/arch/riscv/kernel/head.S >>index 356d5397b2a2..7eae9a172351 100644 >>--- a/arch/riscv/kernel/head.S >>+++ b/arch/riscv/kernel/head.S >>@@ -15,6 +15,7 @@ >> #include >> #include >> #include >>+#include >> #include "efi-header.S" >> __HEAD >>@@ -164,6 +165,19 @@ secondary_start_sbi: >> call relocate_enable_mmu >> #endif >> call .Lsetup_trap_vector >>+#if defined(CONFIG_RISCV_SBI) && defined(CONFIG_RISCV_USER_CFI) >>+ li a7, SBI_EXT_FWFT >>+ li a6, SBI_EXT_FWFT_SET >>+ li a0, SBI_FWFT_SHADOW_STACK >>+ li a1, 1 /* enable supervisor to access shadow stack access */ >>+ li a2, SBI_FWFT_SET_FLAG_LOCK >>+ ecall >>+ beqz a0, 1f >>+ la a1, riscv_nousercfi >>+ li a0, CMDLINE_DISABLE_RISCV_USERCFI_BCFI >>+ REG_S a0, (a1) >>+1: >>+#endif >> scs_load_current >> call smp_callin >> #endif /* CONFIG_SMP */ >>@@ -320,6 +334,19 @@ SYM_CODE_START(_start_kernel) >> la tp, init_task >> la sp, init_thread_union + THREAD_SIZE >> addi sp, sp, -PT_SIZE_ON_STACK >>+#if defined(CONFIG_RISCV_SBI) && defined(CONFIG_RISCV_USER_CFI) >>+ li a7, SBI_EXT_FWFT >>+ li a6, SBI_EXT_FWFT_SET >>+ li a0, SBI_FWFT_SHADOW_STACK >>+ li a1, 1 /* enable supervisor to access shadow stack access */ >>+ li a2, SBI_FWFT_SET_FLAG_LOCK >>+ ecall >>+ beqz a0, 1f >>+ la a1, riscv_nousercfi >>+ li a0, CMDLINE_DISABLE_RISCV_USERCFI_BCFI >>+ REG_S a0, (a1) >>+1: >>+#endif >> scs_load_current >> #ifdef CONFIG_KASAN >>