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[103.168.172.200]) by smtp.gmail.com with ESMTPSA id 6a1803df08f44-88d9aa363e3sm227055386d6.57.2025.12.29.05.19.41 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 29 Dec 2025 05:19:41 -0800 (PST) Received: from phl-compute-03.internal (phl-compute-03.internal [10.202.2.43]) by mailfauth.phl.internal (Postfix) with ESMTP id 611A4F4006B; Mon, 29 Dec 2025 08:19:41 -0500 (EST) Received: from phl-frontend-03 ([10.202.2.162]) by phl-compute-03.internal (MEProxy); Mon, 29 Dec 2025 08:19:41 -0500 X-ME-Sender: X-ME-Received: X-ME-Proxy-Cause: gggruggvucftvghtrhhoucdtuddrgeefgedrtddtgdejjedvgecutefuodetggdotefrod ftvfcurfhrohhfihhlvgemucfhrghsthforghilhdpuffrtefokffrpgfnqfghnecuuegr ihhlohhuthemuceftddtnecusecvtfgvtghiphhivghnthhsucdlqddutddtmdenucfjug hrpeffhffvvefukfhfgggtuggjsehttdertddttddvnecuhfhrohhmpeeuohhquhhnucfh vghnghcuoegsohhquhhnrdhfvghnghesghhmrghilhdrtghomheqnecuggftrfgrthhtvg hrnhephfetvdfgtdeukedvkeeiteeiteejieehvdetheduudejvdektdekfeegvddvhedt necuffhomhgrihhnpehkvghrnhgvlhdrohhrghenucevlhhushhtvghrufhiiigvpedtne curfgrrhgrmhepmhgrihhlfhhrohhmpegsohhquhhnodhmvghsmhhtphgruhhthhhpvghr shhonhgrlhhithihqdeiledvgeehtdeigedqudejjeekheehhedvqdgsohhquhhnrdhfvg hngheppehgmhgrihhlrdgtohhmsehfihigmhgvrdhnrghmvgdpnhgspghrtghpthhtohep udefpdhmohguvgepshhmthhpohhuthdprhgtphhtthhopehfuhhjihhtrgdrthhomhhonh horhhisehgmhgrihhlrdgtohhmpdhrtghpthhtohepohhjvggurgeskhgvrhhnvghlrdho rhhgpdhrtghpthhtoheprgdrhhhinhgusghorhhgsehkvghrnhgvlhdrohhrghdprhgtph htthhopegrlhhitggvrhihhhhlsehgohhoghhlvgdrtghomhdprhgtphhtthhopegsjhho rhhnfegpghhhsehprhhothhonhhmrghilhdrtghomhdprhgtphhtthhopegurghkrheskh gvrhhnvghlrdhorhhgpdhrtghpthhtohepghgrrhihsehgrghrhihguhhordhnvghtpdhr tghpthhtoheplhhoshhsihhnsehkvghrnhgvlhdrohhrghdprhgtphhtthhopehtmhhgrh hoshhssehumhhitghhrdgvughu X-ME-Proxy: Feedback-ID: iad51458e:Fastmail Received: by mail.messagingengine.com (Postfix) with ESMTPA; Mon, 29 Dec 2025 08:19:40 -0500 (EST) Date: Mon, 29 Dec 2025 21:19:27 +0800 From: Boqun Feng To: FUJITA Tomonori Cc: ojeda@kernel.org, a.hindborg@kernel.org, aliceryhl@google.com, bjorn3_gh@protonmail.com, dakr@kernel.org, gary@garyguo.net, lossin@kernel.org, tmgross@umich.edu, acourbot@nvidia.com, rust-for-linux@vger.kernel.org, linux-arch@vger.kernel.org Subject: Re: [PATCH v1 2/3] rust: sync: atomic: Remove workaround macro for i8/i16 BasicOps Message-ID: References: <20251228120546.1602275-1-fujita.tomonori@gmail.com> <20251228120546.1602275-3-fujita.tomonori@gmail.com> <20251229.215558.697746619121630518.fujita.tomonori@gmail.com> Precedence: bulk X-Mailing-List: linux-arch@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20251229.215558.697746619121630518.fujita.tomonori@gmail.com> On Mon, Dec 29, 2025 at 09:55:58PM +0900, FUJITA Tomonori wrote: > On Mon, 29 Dec 2025 19:58:48 +0800 > Boqun Feng wrote: > > > On Sun, Dec 28, 2025 at 09:05:45PM +0900, FUJITA Tomonori wrote: > >> Remove workaround impl_atomic_only_load_and_store_ops macro and use > >> declare_and_impl_atomic_methods to add AtomicBasicOps support for > >> i8/i16. > >> > > > > I did the following so that we can drop this ;-) > > > > 1. Change function names of [1] and [2] from *{load,store}* to > > *{read,set}*. > > > > 2. Reorder [3] before [4] to avoid introduction of > > impl_atomic_only_load_and_store_ops!() > > > > [1]: https://lore.kernel.org/all/20251211113826.1299077-3-fujita.tomonori@gmail.com/ > > [2]: https://lore.kernel.org/all/20251211113826.1299077-2-fujita.tomonori@gmail.com/ > > [3]: https://lore.kernel.org/all/20251228120546.1602275-2-fujita.tomonori@gmail.com/ > > [4]: https://lore.kernel.org/all/20251211113826.1299077-4-fujita.tomonori@gmail.com/ > > > > I also reorder a bit to make the introduction of helpers are grouped > > together, please see at > > > > https://git.kernel.org/pub/scm/linux/kernel/git/boqun/linux.git/log/?h=rust-sync.20251229 > > > > I feel this way we have a cleaner history of changes. > > It looks much cleaner now, thanks! > > Maybe, you could consider chan ging the following two points: > > - change the first patch subject > > rust: helpers: Add i8/i16 atomic_read_acquire/atomic_set_release helpers > > - drop the following comment in 12th patch: > > +// It is still unclear whether i8/i16 atomics will eventually support > +// the same set of operations as i32/i64, because some architectures > +// do not provide hardware support for the required atomic primitives. > +// Furthermore, supporting Atomic will require even more > +// significant structural changes. > +// > +// To avoid premature refactoring, a separate macro for i8 and i16 is > +// used for now, leaving the existing macros untouched until the overall > +// design requirements are settled. > Good eyes! Done (along with other fixes): https://git.kernel.org/pub/scm/linux/kernel/git/boqun/linux.git/log/?h=rust-sync.20251229b Regards, Boqun