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[103.168.172.200]) by smtp.gmail.com with ESMTPSA id 6a1803df08f44-88d96ce4e23sm274953746d6.19.2025.12.29.17.14.23 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 29 Dec 2025 17:14:24 -0800 (PST) Received: from phl-compute-01.internal (phl-compute-01.internal [10.202.2.41]) by mailfauth.phl.internal (Postfix) with ESMTP id 8B11EF4006C; Mon, 29 Dec 2025 20:14:23 -0500 (EST) Received: from phl-frontend-04 ([10.202.2.163]) by phl-compute-01.internal (MEProxy); Mon, 29 Dec 2025 20:14:23 -0500 X-ME-Sender: X-ME-Received: X-ME-Proxy-Cause: gggruggvucftvghtrhhoucdtuddrgeefgedrtddtgdejkeeikecutefuodetggdotefrod ftvfcurfhrohhfihhlvgemucfhrghsthforghilhdpuffrtefokffrpgfnqfghnecuuegr ihhlohhuthemuceftddtnecusecvtfgvtghiphhivghnthhsucdlqddutddtmdenucfjug hrpeffhffvvefukfhfgggtuggjsehttdertddttddvnecuhfhrohhmpeeuohhquhhnucfh vghnghcuoegsohhquhhnrdhfvghnghesghhmrghilhdrtghomheqnecuggftrfgrthhtvg hrnhephfetvdfgtdeukedvkeeiteeiteejieehvdetheduudejvdektdekfeegvddvhedt necuffhomhgrihhnpehkvghrnhgvlhdrohhrghenucevlhhushhtvghrufhiiigvpedtne curfgrrhgrmhepmhgrihhlfhhrohhmpegsohhquhhnodhmvghsmhhtphgruhhthhhpvghr shhonhgrlhhithihqdeiledvgeehtdeigedqudejjeekheehhedvqdgsohhquhhnrdhfvg hngheppehgmhgrihhlrdgtohhmsehfihigmhgvrdhnrghmvgdpnhgspghrtghpthhtohep udefpdhmohguvgepshhmthhpohhuthdprhgtphhtthhopehfuhhjihhtrgdrthhomhhonh horhhisehgmhgrihhlrdgtohhmpdhrtghpthhtohepghgrrhihsehgrghrhihguhhordhn vghtpdhrtghpthhtohepohhjvggurgeskhgvrhhnvghlrdhorhhgpdhrtghpthhtoheprg drhhhinhgusghorhhgsehkvghrnhgvlhdrohhrghdprhgtphhtthhopegrlhhitggvrhih hhhlsehgohhoghhlvgdrtghomhdprhgtphhtthhopegsjhhorhhnfegpghhhsehprhhoth honhhmrghilhdrtghomhdprhgtphhtthhopegurghkrheskhgvrhhnvghlrdhorhhgpdhr tghpthhtoheplhhoshhsihhnsehkvghrnhgvlhdrohhrghdprhgtphhtthhopehtmhhgrh hoshhssehumhhitghhrdgvughu X-ME-Proxy: Feedback-ID: iad51458e:Fastmail Received: by mail.messagingengine.com (Postfix) with ESMTPA; Mon, 29 Dec 2025 20:14:22 -0500 (EST) Date: Tue, 30 Dec 2025 09:14:19 +0800 From: Boqun Feng To: FUJITA Tomonori Cc: gary@garyguo.net, ojeda@kernel.org, a.hindborg@kernel.org, aliceryhl@google.com, bjorn3_gh@protonmail.com, dakr@kernel.org, lossin@kernel.org, tmgross@umich.edu, acourbot@nvidia.com, rust-for-linux@vger.kernel.org, linux-arch@vger.kernel.org Subject: Re: [PATCH v2 0/4] rust: Add i8/i16 atomic xchg helpers Message-ID: References: <20251223124639.7771082d.gary@garyguo.net> <20251225.095655.275822477142372376.fujita.tomonori@gmail.com> <20251227.181717.1843883205283099818.fujita.tomonori@gmail.com> Precedence: bulk X-Mailing-List: linux-arch@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20251227.181717.1843883205283099818.fujita.tomonori@gmail.com> On Sat, Dec 27, 2025 at 06:17:17PM +0900, FUJITA Tomonori wrote: > On Sat, 27 Dec 2025 15:23:30 +0800 > Boqun Feng wrote: > > > On Thu, Dec 25, 2025 at 09:56:55AM +0900, FUJITA Tomonori wrote: > > [...] > >> >> The architectures supporting Rust, implement atomic xchg families > >> >> using architecture-specific instructions. They work for i8/i16 too so > >> >> the helpers just call them. > >> >> > >> >> Tested on QEMU (86_64, arm64, riscv, loongarch, and armv7). > >> >> > >> >> Note the architectures that support Rust handle xchg differently: > >> >> > >> >> - arm64 and riscv support xchg with all the orderings. > >> >> > >> >> - x86_64 and loongarch support only full-ordering xchg. They calls the > >> >> full-ordering xchg for any orderings. > >> > > >> > Maybe it's just that I'm reading this differently, but I think this is a > >> > bit confusing, as if there's an optimisation opportunity. > >> > > >> > x86 is TSO, so even a relaxed xchg is a full xchg. So in this sense x86 > >> > has implemented all orderings. > >> > >> For x86_64, I agree that the wording is confusing. xchg always implies > >> lock so different memory orderings all map to the same full-ordered > >> xchg there. > >> > > > > I feel a bit confusing as well about the need of mentioning the exact > > ordering of these primitives on each arch. In my opinion, as long as > > rust_helper_xchg_X() is mapped to xchg_X() in C, then it's clear that > > they have the ordering of the corresponding C APIs. But I keep it as it > > is for now, I may remove them from the commit logs later after I > > re-think about this. > > Given the current implementation, I agree that the ordering > explanation is redundant. > > When I started working on this, I initially thought we would need > architecture-specific ifdefs to select the appropriate implementation > for each ordering, rather than having a straightforward per-ordering > mapping like this. That's why I added the explanation about how xchg > is handled on each architecture. > I will remove those ordering explanation and I will also apply other changes to the xchg/cmpxchg helpers: we should use xchg() and try_cmpxchg() instead of raw_xchg() and raw_try_cmpxchg() because we want to keep the KCSan instrumentation for those helpers. Regards, Boqun > > > Thank you all! Applied in rust-sync: > > > > https://git.kernel.org/pub/scm/linux/kernel/git/boqun/linux.git/ rust-sync > > Thanks a lot! >