From: Thomas Gleixner <tglx@linutronix.de>
To: Christopher Lameter <cl@linux.com>
Cc: Tejun Heo <tj@kernel.org>, Mark Rutland <mark.rutland@arm.com>,
linux-kernel@vger.kernel.org, Arnd Bergmann <arnd@arndb.de>,
Peter Zijlstra <peterz@infradead.org>,
Pranith Kumar <bobby.prani@gmail.com>,
linux-arch@vger.kernel.org,
"Paul E. McKenney" <paulmck@linux.vnet.ibm.com>
Subject: Re: [PATCH] percpu: make this_cpu_generic_read() atomic w.r.t. interrupts
Date: Wed, 27 Sep 2017 11:01:13 +0200 (CEST) [thread overview]
Message-ID: <alpine.DEB.2.20.1709271058030.4773@nanos> (raw)
In-Reply-To: <alpine.DEB.2.20.1709261134280.25986@nuc-kabylake>
On Tue, 26 Sep 2017, Christopher Lameter wrote:
> On Tue, 26 Sep 2017, Thomas Gleixner wrote:
>
> > > because it could also occur before or after the preempt_enable/disable
> > > without the code being able to distinguish that case.
> > >
> > > The fetch of a scalar value from memory is an atomic operation and that is
> > > required from all arches. There is an exception for double word fetches.
> >
> > this_cpu_read_8() is a double word fetch on many 32bit architectures.
>
> Ok then this_cpu_read_8 for those platforms need to disable interrupts.
> But that is not true for all arches.
>
> > > Maybe we would need to special code that case but so far this does not
> > > seem to have been an issue.
> >
> > Just because nobody ran into problem with that it is a non issue? That's
> > just hillarious.
>
> Its is even more (see your above statement) stupid to figure out that this
> is actually unnecessary in the generic case and then continue the
> argument.
>
> > It's obviously not correct and needs to be fixed _before_ someone has to go
> > through the pain of debugging such a problem.
>
> As you pointed out the current approach *is* correct. Fetching a scalar
> word is an atomic operation and must be one. If an arch cannot guarantee
> that then arch specific measures need to be implemented to ensure that
> this guarantee is kept. Could be done with interrupts disables, cmpxchg or
> the reservation scheme on RISC processors. It definitely does not
> belong into generic code.
Wrong. The default for 32bit architectures is that they CANNOT do atomic
fetch/write of 8 bytes. So instead of forcing that to be implemented in
every affected architecture this wants to be addressed in generic code and
those few 32bit architectures which can do atomic double word fetch/write
implement the magic functions to do so.
Thanks,
tglx
next prev parent reply other threads:[~2017-09-27 9:01 UTC|newest]
Thread overview: 15+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-09-25 13:24 [PATCH] percpu: make this_cpu_generic_read() atomic w.r.t. interrupts Mark Rutland
2017-09-25 13:24 ` Mark Rutland
2017-09-25 15:18 ` Tejun Heo
2017-09-25 15:33 ` Mark Rutland
2017-09-25 15:33 ` Mark Rutland
2017-09-25 15:44 ` Tejun Heo
2017-09-25 15:44 ` Tejun Heo
2017-09-26 6:47 ` Christopher Lameter
2017-09-26 7:47 ` Thomas Gleixner
2017-09-26 16:42 ` Christopher Lameter
2017-09-26 16:42 ` Christopher Lameter
2017-09-27 9:01 ` Thomas Gleixner [this message]
2017-09-27 9:01 ` Thomas Gleixner
2017-09-27 10:10 ` Mark Rutland
2017-09-26 17:28 ` Mark Rutland
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