From mboxrd@z Thu Jan 1 00:00:00 1970 From: John Hubbard Subject: Re: [PATCH v5 01/11] asm-generic/pgtable: Adds generic functions to monitor lockless pgtable walks Date: Thu, 3 Oct 2019 13:40:38 -0700 Message-ID: References: <20191003013325.2614-1-leonardo@linux.ibm.com> <20191003013325.2614-2-leonardo@linux.ibm.com> <20191003071145.GM4536@hirez.programming.kicks-ass.net> <20191003115141.GJ4581@hirez.programming.kicks-ass.net> Mime-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit Return-path: In-Reply-To: <20191003115141.GJ4581@hirez.programming.kicks-ass.net> Content-Language: en-US List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: linuxppc-dev-bounces+glppe-linuxppc-embedded-2=m.gmane.org@lists.ozlabs.org Sender: "Linuxppc-dev" To: Peter Zijlstra , Leonardo Bras Cc: Song Liu , Michal Hocko , "Dmitry V. Levin" , Keith Busch , linux-mm@kvack.org, Paul Mackerras , Christoph Lameter , Ira Weiny , Dan Williams , Elena Reshetova , linux-arch@vger.kernel.org, Santosh Sivaraj , Davidlohr Bueso , "Aneesh Kumar K.V" , Bartlomiej Zolnierkiewicz , Mike Rapoport , Jason Gunthorpe , Vlastimil Babka , Mahesh Salgaonkar , Andrey Ryabinin , Alexey Dobriyan , Ingo Molnar , Andrea Arcangeli , Ralph Campbell List-Id: linux-arch.vger.kernel.org On 10/3/19 4:51 AM, Peter Zijlstra wrote: > On Thu, Oct 03, 2019 at 09:11:45AM +0200, Peter Zijlstra wrote: >> On Wed, Oct 02, 2019 at 10:33:15PM -0300, Leonardo Bras wrote: ... > > I'm still really confused about this barrier. It just doesn't make > sense. > > If an interrupt happens before the local_irq_disable()/save(), then it > will discard any and all speculation that would be in progress to handle > the exception. > Hi Peter, So, would that imply that it's correct to apply approximately the following patch: diff --git a/Documentation/memory-barriers.txt b/Documentation/memory-barriers.txt index 1adbb8a371c7..cf41eff37e24 100644 --- a/Documentation/memory-barriers.txt +++ b/Documentation/memory-barriers.txt @@ -2099,9 +2099,9 @@ INTERRUPT DISABLING FUNCTIONS ----------------------------- Functions that disable interrupts (ACQUIRE equivalent) and enable interrupts -(RELEASE equivalent) will act as compiler barriers only. So if memory or I/O -barriers are required in such a situation, they must be provided from some -other means. +(RELEASE equivalent) will act as full memory barriers. This is because, for +all supported CPU architectures, interrupt arrival causes all speculative +memory accesses to be discarded. ? We're also discussing this over in [1] ("mm: don't expose non-hugetlb page to fast gup prematurely"), so I'm adding Paul to this thread here as well. [1] https://lore.kernel.org/r/20191002092447.GC9320@quack2.suse.cz thanks, -- John Hubbard NVIDIA