From mboxrd@z Thu Jan 1 00:00:00 1970 From: ebiederm@xmission.com (Eric W. Biederman) Subject: Re: [patch 46/47] powerpc: Use new irq allocator Date: Sun, 03 Oct 2010 09:53:56 -0700 Message-ID: References: <20100930221351.682772535@linutronix.de> <20100930221743.014571381@linutronix.de> <1285893737.2463.4.camel@pasglop> Mime-Version: 1.0 Content-Type: text/plain; charset=us-ascii Return-path: In-Reply-To: (Thomas Gleixner's message of "Fri, 1 Oct 2010 15:07:19 +0200 (CEST)") Sender: linux-kernel-owner@vger.kernel.org To: Thomas Gleixner Cc: Benjamin Herrenschmidt , LKML , linux-arch@vger.kernel.org, Linus Torvalds , Andrew Morton , x86@kernel.org, Peter Zijlstra , Paul Mundt , Russell King , David Woodhouse , Jesse Barnes , Yinghai Lu , Grant Likely List-Id: linux-arch.vger.kernel.org Thomas Gleixner writes: >> That would make things much cleaner and in fact move one large step >> toward being able to make powerpc virq scheme generic, which seems to be >> a good idea from what I've heard :-) > > Yep. I'm not certain about making the ppc virq scheme generic. Maybe it is just my distorted impression but I have the understanding that ppc irq numbers mean nothing and are totally unstable whereas on x86 irq numbers in general are stable (across kernel upgrades and changes in device probe order) and the irq number has a useful hardware meaning. Which means you don't have to go through several layers of translation tables to figure out which hardware pin you are talking about. Eric From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from out02.mta.xmission.com ([166.70.13.232]:46605 "EHLO out02.mta.xmission.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753743Ab0JCQyE (ORCPT ); Sun, 3 Oct 2010 12:54:04 -0400 From: ebiederm@xmission.com (Eric W. Biederman) References: <20100930221351.682772535@linutronix.de> <20100930221743.014571381@linutronix.de> <1285893737.2463.4.camel@pasglop> Date: Sun, 03 Oct 2010 09:53:56 -0700 In-Reply-To: (Thomas Gleixner's message of "Fri, 1 Oct 2010 15:07:19 +0200 (CEST)") Message-ID: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Subject: Re: [patch 46/47] powerpc: Use new irq allocator Sender: linux-arch-owner@vger.kernel.org List-ID: To: Thomas Gleixner Cc: Benjamin Herrenschmidt , LKML , linux-arch@vger.kernel.org, Linus Torvalds , Andrew Morton , x86@kernel.org, Peter Zijlstra , Paul Mundt , Russell King , David Woodhouse , Jesse Barnes , Yinghai Lu , Grant Likely Message-ID: <20101003165356.CkDemx8gpYdExNmUFGr8O7IWybq6cGbQJVnec7M9mJo@z> Thomas Gleixner writes: >> That would make things much cleaner and in fact move one large step >> toward being able to make powerpc virq scheme generic, which seems to be >> a good idea from what I've heard :-) > > Yep. I'm not certain about making the ppc virq scheme generic. Maybe it is just my distorted impression but I have the understanding that ppc irq numbers mean nothing and are totally unstable whereas on x86 irq numbers in general are stable (across kernel upgrades and changes in device probe order) and the irq number has a useful hardware meaning. Which means you don't have to go through several layers of translation tables to figure out which hardware pin you are talking about. Eric