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From: will.deacon@arm.com (Will Deacon)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH 1/5] arm: provide a mechanism to reserve performance counters
Date: Tue, 15 Dec 2009 14:13:25 -0000	[thread overview]
Message-ID: <000001ca7d90$c4a15330$4de3f990$@deacon@arm.com> (raw)
In-Reply-To: <1260875712-29712-2-git-send-email-jamie.iles@picochip.com>

Hi Jamie,

It's getting there! Minor stylistic suggestions inline.

* Jamie Iles wrote:

> To add support for perf events and to allow the hardware
> counters to be shared with oprofile, we need a way to reserve
> access to the pmu (performance monitor unit).
> 
> diff --git a/arch/arm/include/asm/pmu.h b/arch/arm/include/asm/pmu.h
> new file mode 100644
> index 0000000..e7cc264
> --- /dev/null
> +++ b/arch/arm/include/asm/pmu.h
> @@ -0,0 +1,74 @@
> +/*
> + *  linux/arch/arm/include/asm/pmu.h
> + *
> + *  Copyright (C) 2009 picoChip Designs Ltd, Jamie Iles
> + *
> + * This program is free software; you can redistribute it and/or modify
> + * it under the terms of the GNU General Public License version 2 as
> + * published by the Free Software Foundation.
> + *
> + */
> +
> +#ifndef __ARM_PMU_H__
> +#define __ARM_PMU_H__
> +
> +#ifdef CONFIG_CPU_HAS_PMU
> +
> +struct pmu_irqs {
> +	const int   *irqs;
> +	unsigned    num_irqs;
> +};
> +
> +/**
> + * reserve_pmu() - reserve the hardware performance counters
> + *
> + * Reserve the hardware performance counters in the system for exclusive use.
> + * The 'struct pmu_irqs' for the system is returned on success, ERR_PTR()
> + * encoded error on failure.
> + */
> +extern const struct pmu_irqs *
> +reserve_pmu(void);

I think it's standard Kernel coding style to put the declaration of a function
all on one line if it fits. The same goes elsewhere in the patch.

> diff --git a/arch/arm/mm/Kconfig b/arch/arm/mm/Kconfig
> index dd4698c..5cd0ec4 100644
> --- a/arch/arm/mm/Kconfig
> +++ b/arch/arm/mm/Kconfig
> @@ -536,6 +536,11 @@ config CPU_COPY_FA
>  config CPU_COPY_V6
>  	bool
> 
> +config CPU_HAS_PMU
> +	depends on CPU_V6 || CPU_V7 || CPU_XSCALE
> +	default y
> +	bool

I think you should use XSCALE_PMU instead of CPU_XSCALE. Also, this should
probably be in the top-level ARM Kconfig instead of the mm/ one.

Cheers,

Will

  parent reply	other threads:[~2009-12-15 14:13 UTC|newest]

Thread overview: 55+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2009-12-15 11:15 ARMv6 performance counters v3 Jamie Iles
2009-12-15 11:15 ` [PATCH 1/5] arm: provide a mechanism to reserve performance counters Jamie Iles
2009-12-15 11:15   ` [PATCH 2/5] arm/oprofile: reserve the PMU when starting Jamie Iles
2009-12-15 11:15     ` [PATCH 3/5] arm: use the spinlocked, generic atomic64 support Jamie Iles
2009-12-15 11:15       ` [PATCH 4/5] arm: enable support for software perf events Jamie Iles
2009-12-15 11:15         ` [PATCH 5/5] arm/perfevents: implement perf event support for ARMv6 Jamie Iles
2009-12-15 14:29           ` Will Deacon
2009-12-15 15:02             ` Jamie Iles
2009-12-15 15:05               ` Will Deacon
2009-12-15 15:19                 ` Jamie Iles
2009-12-15 15:30                   ` Peter Zijlstra
2009-12-15 15:36                     ` Jamie Iles
2009-12-16 10:54                       ` Jamie Iles
2009-12-16 11:04                         ` Will Deacon
2009-12-16 11:19                           ` Jamie Iles
2009-12-18 17:05           ` Perf Event support for ARMv7 (was: Re: [PATCH 5/5] arm/perfevents: implement perf event support for ARMv6) Jean Pihet
2009-12-19 10:29             ` Jamie Iles
2009-12-19 10:53               ` Ingo Molnar
2009-12-21 11:32                 ` Jean Pihet
2009-12-21 11:29               ` Jean Pihet
2009-12-21 11:04             ` Will Deacon
2009-12-21 11:43               ` Jean Pihet
2009-12-21 12:10                 ` Will Deacon
2009-12-21 12:43                   ` Jamie Iles
2009-12-21 13:35                     ` Jean Pihet
2009-12-22 16:51                       ` Jean Pihet
2009-12-28  7:57                         ` Ingo Molnar
2009-12-29 13:52                           ` Jean Pihet
2009-12-29 16:32                             ` Jamie Iles
2010-01-06 15:16                               ` Michał Nazarewicz
2010-01-06 15:30                                 ` Jamie Iles
2010-01-07 17:02                                   ` Michał Nazarewicz
2009-12-29 13:58                         ` Jean Pihet
2010-01-04 16:52                           ` Will Deacon
2010-01-15 15:30                             ` Jean Pihet
2010-01-15 15:39                               ` Jamie Iles
2010-01-15 15:43                                 ` Jean Pihet
2010-01-15 15:49                                   ` Jamie Iles
2010-01-20 13:40                               ` Will Deacon
2010-01-08 22:17                         ` Woodruff, Richard
2010-01-15 15:34                           ` Jean Pihet
2009-12-15 14:13   ` Will Deacon [this message]
2009-12-15 14:36     ` [PATCH 1/5] arm: provide a mechanism to reserve performance counters Jamie Iles
2009-12-15 17:06       ` Will Deacon
2009-12-17 16:14   ` Will Deacon
2009-12-17 16:27     ` Jamie Iles
  -- strict thread matches above, loose matches on Subject: below --
2010-01-14 12:14 ARM perf events support v5 Jamie Iles
2010-01-14 12:14 ` [PATCH 1/5] arm: provide a mechanism to reserve performance counters Jamie Iles
2010-01-21  9:30   ` Jamie Iles
2010-01-04 10:48 ARM perf events support v4 Jamie Iles
2010-01-04 10:48 ` [PATCH 1/5] arm: provide a mechanism to reserve performance counters Jamie Iles
2010-01-06 12:00   ` Michał Nazarewicz
2010-01-06 12:15     ` Jamie Iles
2009-12-14 14:04 ARMv6 performance counters v2 Jamie Iles
2009-12-14 14:04 ` [PATCH 1/5] arm: provide a mechanism to reserve performance counters Jamie Iles
2009-12-14 14:39   ` Will Deacon
2009-12-14 15:03     ` Jamie Iles
2009-12-14 16:01   ` Jean Pihet

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