* [RFC PATCH 0/8] Add Analogix Core Display Port Driver
@ 2015-08-06 13:49 Yakir Yang
2015-08-06 13:58 ` [RFC PATCH 1/8] drm: exynos/dp: fix code style Yakir Yang
` (9 more replies)
0 siblings, 10 replies; 18+ messages in thread
From: Yakir Yang @ 2015-08-06 13:49 UTC (permalink / raw)
To: linux-arm-kernel
Hi all,
Samsung exynos and Rockchip rk3288 almost share same dp controller,
so I split the common code out, then rk3288 and exynos can re-used the
same dp core driver. Cause I can't find the exact IP name of exynos dp
controller, so I decide to name dp core driver with "analogix" which I
find in rk3288 eDP TRM ;)
Beyond that, there are three light registers setting differents bewteen
exynos and rk3288.
1. RK3288 have five special pll resigters which not indicata in exynos
dp controller.
2. The address of DP_PHY_PD(dp phy power manager register) are different
between rk3288 and exynos.
3. Rk3288 and exynos have different setting with AUX_HW_RETRY_CTL(dp debug
register).
My series patches can be divider into two parts: One for spliting the
analogix_dp code from exynos dp driver. Another are trying to add rk3288
dp driver support.
Best regards,
- Yakir
Yakir Yang (8):
drm: exynos/dp: fix code style
drm: exynos/dp: convert to drm bridge mode
drm: bridge: analogix_dp: split exynos dp driver to bridge dir
drm: rockchip/dp: add rockchip platform dp driver
drm: bridge/analogix_dp: add platform device type support
drm: bridge: analogix_dp: add some rk3288 special registers setting
drm: bridge: analogix_dp: try force hpd after plug in lookup failed
drm: bridge/analogix_dp: expand the delay time for hpd detect
drivers/gpu/drm/bridge/Kconfig | 5 +
drivers/gpu/drm/bridge/Makefile | 1 +
drivers/gpu/drm/bridge/analogix_dp_core.c | 1397 +++++++++++++++++++
drivers/gpu/drm/bridge/analogix_dp_core.h | 287 ++++
drivers/gpu/drm/bridge/analogix_dp_reg.c | 1295 ++++++++++++++++++
.../exynos_dp_reg.h => bridge/analogix_dp_reg.h} | 272 ++--
drivers/gpu/drm/exynos/Kconfig | 5 +-
drivers/gpu/drm/exynos/Makefile | 2 +-
drivers/gpu/drm/exynos/analogix_dp-exynos.c | 241 ++++
drivers/gpu/drm/exynos/exynos_dp_core.c | 1416 --------------------
drivers/gpu/drm/exynos/exynos_dp_core.h | 282 ----
drivers/gpu/drm/exynos/exynos_dp_reg.c | 100 +-
drivers/gpu/drm/rockchip/Kconfig | 10 +
drivers/gpu/drm/rockchip/Makefile | 1 +
drivers/gpu/drm/rockchip/analogix_dp-rockchip.c | 420 ++++++
include/drm/bridge/analogix_dp.h | 28 +
16 files changed, 3880 insertions(+), 1882 deletions(-)
create mode 100644 drivers/gpu/drm/bridge/analogix_dp_core.c
create mode 100644 drivers/gpu/drm/bridge/analogix_dp_core.h
create mode 100644 drivers/gpu/drm/bridge/analogix_dp_reg.c
rename drivers/gpu/drm/{exynos/exynos_dp_reg.h => bridge/analogix_dp_reg.h} (62%)
create mode 100644 drivers/gpu/drm/exynos/analogix_dp-exynos.c
delete mode 100644 drivers/gpu/drm/exynos/exynos_dp_core.c
delete mode 100644 drivers/gpu/drm/exynos/exynos_dp_core.h
create mode 100644 drivers/gpu/drm/rockchip/analogix_dp-rockchip.c
create mode 100644 include/drm/bridge/analogix_dp.h
--
2.1.2
^ permalink raw reply [flat|nested] 18+ messages in thread
* [RFC PATCH 1/8] drm: exynos/dp: fix code style
2015-08-06 13:49 [RFC PATCH 0/8] Add Analogix Core Display Port Driver Yakir Yang
@ 2015-08-06 13:58 ` Yakir Yang
2015-08-06 14:04 ` Yakir Yang
` (8 subsequent siblings)
9 siblings, 0 replies; 18+ messages in thread
From: Yakir Yang @ 2015-08-06 13:58 UTC (permalink / raw)
To: linux-arm-kernel
make checkpatch.pl script happy
Signed-off-by: Yakir Yang <ykk@rock-chips.com>
---
drivers/gpu/drm/exynos/exynos_dp_core.c | 224
++++++++++++++++----------------
drivers/gpu/drm/exynos/exynos_dp_core.h | 53 ++++----
drivers/gpu/drm/exynos/exynos_dp_reg.c | 100 +++++++-------
3 files changed, 185 insertions(+), 192 deletions(-)
diff --git a/drivers/gpu/drm/exynos/exynos_dp_core.c
b/drivers/gpu/drm/exynos/exynos_dp_core.c
index 172b800..a8097a4 100644
--- a/drivers/gpu/drm/exynos/exynos_dp_core.c
+++ b/drivers/gpu/drm/exynos/exynos_dp_core.c
@@ -114,8 +114,8 @@ static int exynos_dp_read_edid(struct
exynos_dp_device *dp)
/* Read Extension Flag, Number of 128-byte EDID extension blocks */
retval = exynos_dp_read_byte_from_i2c(dp, I2C_EDID_DEVICE_ADDR,
- EDID_EXTENSION_FLAG,
- &extend_block);
+ EDID_EXTENSION_FLAG,
+ &extend_block);
if (retval)
return retval;
@@ -123,10 +123,11 @@ static int exynos_dp_read_edid(struct
exynos_dp_device *dp)
dev_dbg(dp->dev, "EDID data includes a single extension!\n");
/* Read EDID data */
- retval = exynos_dp_read_bytes_from_i2c(dp, I2C_EDID_DEVICE_ADDR,
- EDID_HEADER_PATTERN,
- EDID_BLOCK_LENGTH,
- &edid[EDID_HEADER_PATTERN]);
+ retval =
+ exynos_dp_read_bytes_from_i2c(dp, I2C_EDID_DEVICE_ADDR,
+ EDID_HEADER_PATTERN,
+ EDID_BLOCK_LENGTH,
+ &edid[EDID_HEADER_PATTERN]);
if (retval != 0) {
dev_err(dp->dev, "EDID Read failed!\n");
return -EIO;
@@ -138,11 +139,11 @@ static int exynos_dp_read_edid(struct
exynos_dp_device *dp)
}
/* Read additional EDID data */
- retval = exynos_dp_read_bytes_from_i2c(dp,
- I2C_EDID_DEVICE_ADDR,
- EDID_BLOCK_LENGTH,
- EDID_BLOCK_LENGTH,
- &edid[EDID_BLOCK_LENGTH]);
+ retval =
+ exynos_dp_read_bytes_from_i2c(dp, I2C_EDID_DEVICE_ADDR,
+ EDID_BLOCK_LENGTH,
+ EDID_BLOCK_LENGTH,
+ &edid[EDID_BLOCK_LENGTH]);
if (retval != 0) {
dev_err(dp->dev, "EDID Read failed!\n");
return -EIO;
@@ -154,24 +155,22 @@ static int exynos_dp_read_edid(struct
exynos_dp_device *dp)
}
exynos_dp_read_byte_from_dpcd(dp, DP_TEST_REQUEST,
- &test_vector);
+ &test_vector);
if (test_vector & DP_TEST_LINK_EDID_READ) {
- exynos_dp_write_byte_to_dpcd(dp,
- DP_TEST_EDID_CHECKSUM,
+ exynos_dp_write_byte_to_dpcd(
+ dp, DP_TEST_EDID_CHECKSUM,
edid[EDID_BLOCK_LENGTH + EDID_CHECKSUM]);
- exynos_dp_write_byte_to_dpcd(dp,
- DP_TEST_RESPONSE,
+ exynos_dp_write_byte_to_dpcd(
+ dp, DP_TEST_RESPONSE,
DP_TEST_EDID_CHECKSUM_WRITE);
}
} else {
dev_info(dp->dev, "EDID data does not include any extensions.\n");
/* Read EDID data */
- retval = exynos_dp_read_bytes_from_i2c(dp,
- I2C_EDID_DEVICE_ADDR,
- EDID_HEADER_PATTERN,
- EDID_BLOCK_LENGTH,
- &edid[EDID_HEADER_PATTERN]);
+ retval = exynos_dp_read_bytes_from_i2c(
+ dp, I2C_EDID_DEVICE_ADDR, EDID_HEADER_PATTERN,
+ EDID_BLOCK_LENGTH, &edid[EDID_HEADER_PATTERN]);
if (retval != 0) {
dev_err(dp->dev, "EDID Read failed!\n");
return -EIO;
@@ -182,16 +181,15 @@ static int exynos_dp_read_edid(struct
exynos_dp_device *dp)
return -EIO;
}
- exynos_dp_read_byte_from_dpcd(dp,
- DP_TEST_REQUEST,
- &test_vector);
+ exynos_dp_read_byte_from_dpcd(dp, DP_TEST_REQUEST,
+ &test_vector);
if (test_vector & DP_TEST_LINK_EDID_READ) {
- exynos_dp_write_byte_to_dpcd(dp,
- DP_TEST_EDID_CHECKSUM,
- edid[EDID_CHECKSUM]);
- exynos_dp_write_byte_to_dpcd(dp,
- DP_TEST_RESPONSE,
- DP_TEST_EDID_CHECKSUM_WRITE);
+ exynos_dp_write_byte_to_dpcd(
+ dp, DP_TEST_EDID_CHECKSUM,
+ edid[EDID_CHECKSUM]);
+ exynos_dp_write_byte_to_dpcd(
+ dp, DP_TEST_RESPONSE,
+ DP_TEST_EDID_CHECKSUM_WRITE);
}
}
@@ -206,8 +204,7 @@ static int exynos_dp_handle_edid(struct
exynos_dp_device *dp)
int retval;
/* Read DPCD DP_DPCD_REV~RECEIVE_PORT1_CAP_1 */
- retval = exynos_dp_read_bytes_from_dpcd(dp, DP_DPCD_REV,
- 12, buf);
+ retval = exynos_dp_read_bytes_from_dpcd(dp, DP_DPCD_REV, 12, buf);
if (retval)
return retval;
@@ -222,19 +219,21 @@ static int exynos_dp_handle_edid(struct
exynos_dp_device *dp)
}
static void exynos_dp_enable_rx_to_enhanced_mode(struct
exynos_dp_device *dp,
- bool enable)
+ bool enable)
{
u8 data;
exynos_dp_read_byte_from_dpcd(dp, DP_LANE_COUNT_SET, &data);
if (enable)
- exynos_dp_write_byte_to_dpcd(dp, DP_LANE_COUNT_SET,
- DP_LANE_COUNT_ENHANCED_FRAME_EN |
- DPCD_LANE_COUNT_SET(data));
+ exynos_dp_write_byte_to_dpcd(
+ dp, DP_LANE_COUNT_SET,
+ DP_LANE_COUNT_ENHANCED_FRAME_EN |
+ DPCD_LANE_COUNT_SET(data));
else
- exynos_dp_write_byte_to_dpcd(dp, DP_LANE_COUNT_SET,
- DPCD_LANE_COUNT_SET(data));
+ exynos_dp_write_byte_to_dpcd(
+ dp, DP_LANE_COUNT_SET,
+ DPCD_LANE_COUNT_SET(data));
}
static int exynos_dp_is_enhanced_mode_available(struct
exynos_dp_device *dp)
@@ -261,13 +260,12 @@ static void exynos_dp_training_pattern_dis(struct
exynos_dp_device *dp)
{
exynos_dp_set_training_pattern(dp, DP_NONE);
- exynos_dp_write_byte_to_dpcd(dp,
- DP_TRAINING_PATTERN_SET,
- DP_TRAINING_PATTERN_DISABLE);
+ exynos_dp_write_byte_to_dpcd(dp, DP_TRAINING_PATTERN_SET,
+ DP_TRAINING_PATTERN_DISABLE);
}
static void exynos_dp_set_lane_lane_pre_emphasis(struct
exynos_dp_device *dp,
- int pre_emphasis, int lane)
+ int pre_emphasis, int lane)
{
switch (lane) {
case 0:
@@ -307,15 +305,14 @@ static int exynos_dp_link_start(struct
exynos_dp_device *dp)
/* Setup RX configuration */
buf[0] = dp->link_train.link_rate;
buf[1] = dp->link_train.lane_count;
- retval = exynos_dp_write_bytes_to_dpcd(dp, DP_LINK_BW_SET,
- 2, buf);
+ retval = exynos_dp_write_bytes_to_dpcd(dp, DP_LINK_BW_SET, 2, buf);
if (retval)
return retval;
/* Set TX pre-emphasis to minimum */
for (lane = 0; lane < lane_count; lane++)
- exynos_dp_set_lane_lane_pre_emphasis(dp,
- PRE_EMPHASIS_LEVEL_0, lane);
+ exynos_dp_set_lane_lane_pre_emphasis(dp, PRE_EMPHASIS_LEVEL_0,
+ lane);
/* Wait for PLL lock */
pll_tries = 0;
@@ -333,9 +330,9 @@ static int exynos_dp_link_start(struct
exynos_dp_device *dp)
exynos_dp_set_training_pattern(dp, TRAINING_PTN1);
/* Set RX training pattern */
- retval = exynos_dp_write_byte_to_dpcd(dp,
- DP_TRAINING_PATTERN_SET,
- DP_LINK_SCRAMBLING_DISABLE | DP_TRAINING_PATTERN_1);
+ retval = exynos_dp_write_byte_to_dpcd(dp, DP_TRAINING_PATTERN_SET,
+ DP_LINK_SCRAMBLING_DISABLE |
+ DP_TRAINING_PATTERN_1);
if (retval)
return retval;
@@ -344,7 +341,7 @@ static int exynos_dp_link_start(struct
exynos_dp_device *dp)
DP_TRAIN_VOLTAGE_SWING_LEVEL_0;
retval = exynos_dp_write_bytes_to_dpcd(dp, DP_TRAINING_LANE0_SET,
- lane_count, buf);
+ lane_count, buf);
return retval;
}
@@ -352,7 +349,7 @@ static int exynos_dp_link_start(struct
exynos_dp_device *dp)
static unsigned char exynos_dp_get_lane_status(u8 link_status[2], int
lane)
{
int shift = (lane & 1) * 4;
- u8 link_value = link_status[lane>>1];
+ u8 link_value = link_status[lane >> 1];
return (link_value >> shift) & 0xf;
}
@@ -371,7 +368,7 @@ static int exynos_dp_clock_recovery_ok(u8
link_status[2], int lane_count)
}
static int exynos_dp_channel_eq_ok(u8 link_status[2], u8 link_align,
- int lane_count)
+ int lane_count)
{
int lane;
u8 lane_status;
@@ -390,10 +387,10 @@ static int exynos_dp_channel_eq_ok(u8
link_status[2], u8 link_align,
}
static unsigned char exynos_dp_get_adjust_request_voltage(u8
adjust_request[2],
- int lane)
+ int lane)
{
int shift = (lane & 1) * 4;
- u8 link_value = adjust_request[lane>>1];
+ u8 link_value = adjust_request[lane >> 1];
return (link_value >> shift) & 0x3;
}
@@ -403,13 +400,13 @@ static unsigned char
exynos_dp_get_adjust_request_pre_emphasis(
int lane)
{
int shift = (lane & 1) * 4;
- u8 link_value = adjust_request[lane>>1];
+ u8 link_value = adjust_request[lane >> 1];
return ((link_value >> shift) & 0xc) >> 2;
}
static void exynos_dp_set_lane_link_training(struct exynos_dp_device *dp,
- u8 training_lane_set, int lane)
+ u8 training_lane_set, int lane)
{
switch (lane) {
case 0:
@@ -465,7 +462,7 @@ static void exynos_dp_reduce_link_rate(struct
exynos_dp_device *dp)
}
static void exynos_dp_get_adjust_training_lane(struct exynos_dp_device
*dp,
- u8 adjust_request[2])
+ u8 adjust_request[2])
{
int lane, lane_count;
u8 voltage_swing, pre_emphasis, training_lane;
@@ -498,13 +495,13 @@ static int exynos_dp_process_clock_recovery(struct
exynos_dp_device *dp)
lane_count = dp->link_train.lane_count;
- retval = exynos_dp_read_bytes_from_dpcd(dp,
- DP_LANE0_1_STATUS, 2, link_status);
+ retval = exynos_dp_read_bytes_from_dpcd(dp, DP_LANE0_1_STATUS,
+ 2, link_status);
if (retval)
return retval;
- retval = exynos_dp_read_bytes_from_dpcd(dp,
- DP_ADJUST_REQUEST_LANE0_1, 2, adjust_request);
+ retval = exynos_dp_read_bytes_from_dpcd(dp, DP_ADJUST_REQUEST_LANE0_1,
+ 2, adjust_request);
if (retval)
return retval;
@@ -512,8 +509,8 @@ static int exynos_dp_process_clock_recovery(struct
exynos_dp_device *dp)
/* set training pattern 2 for EQ */
exynos_dp_set_training_pattern(dp, TRAINING_PTN2);
- retval = exynos_dp_write_byte_to_dpcd(dp,
- DP_TRAINING_PATTERN_SET,
+ retval = exynos_dp_write_byte_to_dpcd(
+ dp, DP_TRAINING_PATTERN_SET,
DP_LINK_SCRAMBLING_DISABLE |
DP_TRAINING_PATTERN_2);
if (retval)
@@ -527,8 +524,9 @@ static int exynos_dp_process_clock_recovery(struct
exynos_dp_device *dp)
dp, lane);
voltage_swing = exynos_dp_get_adjust_request_voltage(
adjust_request, lane);
- pre_emphasis = exynos_dp_get_adjust_request_pre_emphasis(
- adjust_request, lane);
+ pre_emphasis =
+ exynos_dp_get_adjust_request_pre_emphasis(
+ adjust_request, lane);
if (DPCD_VOLTAGE_SWING_GET(training_lane) ==
voltage_swing &&
@@ -551,11 +549,11 @@ static int exynos_dp_process_clock_recovery(struct
exynos_dp_device *dp)
exynos_dp_get_adjust_training_lane(dp, adjust_request);
for (lane = 0; lane < lane_count; lane++)
- exynos_dp_set_lane_link_training(dp,
- dp->link_train.training_lane[lane], lane);
+ exynos_dp_set_lane_link_training(
+ dp, dp->link_train.training_lane[lane], lane);
- retval = exynos_dp_write_bytes_to_dpcd(dp,
- DP_TRAINING_LANE0_SET, lane_count,
+ retval = exynos_dp_write_bytes_to_dpcd(
+ dp, DP_TRAINING_LANE0_SET, lane_count,
dp->link_train.training_lane);
if (retval)
return retval;
@@ -573,8 +571,8 @@ static int
exynos_dp_process_equalizer_training(struct exynos_dp_device *dp)
lane_count = dp->link_train.lane_count;
- retval = exynos_dp_read_bytes_from_dpcd(dp,
- DP_LANE0_1_STATUS, 2, link_status);
+ retval = exynos_dp_read_bytes_from_dpcd(dp, DP_LANE0_1_STATUS,
+ 2, link_status);
if (retval)
return retval;
@@ -583,13 +581,13 @@ static int
exynos_dp_process_equalizer_training(struct exynos_dp_device *dp)
return -EIO;
}
- retval = exynos_dp_read_bytes_from_dpcd(dp,
- DP_ADJUST_REQUEST_LANE0_1, 2, adjust_request);
+ retval = exynos_dp_read_bytes_from_dpcd(dp, DP_ADJUST_REQUEST_LANE0_1,
+ 2, adjust_request);
if (retval)
return retval;
- retval = exynos_dp_read_byte_from_dpcd(dp,
- DP_LANE_ALIGN_STATUS_UPDATED, &link_align);
+ retval = exynos_dp_read_byte_from_dpcd(
+ dp, DP_LANE_ALIGN_STATUS_UPDATED, &link_align);
if (retval)
return retval;
@@ -628,17 +626,18 @@ static int
exynos_dp_process_equalizer_training(struct exynos_dp_device *dp)
}
for (lane = 0; lane < lane_count; lane++)
- exynos_dp_set_lane_link_training(dp,
- dp->link_train.training_lane[lane], lane);
+ exynos_dp_set_lane_link_training(
+ dp, dp->link_train.training_lane[lane], lane);
retval = exynos_dp_write_bytes_to_dpcd(dp, DP_TRAINING_LANE0_SET,
- lane_count, dp->link_train.training_lane);
+ lane_count,
+ dp->link_train.training_lane);
return retval;
}
static void exynos_dp_get_max_rx_bandwidth(struct exynos_dp_device *dp,
- u8 *bandwidth)
+ u8 *bandwidth)
{
u8 data;
@@ -651,7 +650,7 @@ static void exynos_dp_get_max_rx_bandwidth(struct
exynos_dp_device *dp,
}
static void exynos_dp_get_max_rx_lane_count(struct exynos_dp_device *dp,
- u8 *lane_count)
+ u8 *lane_count)
{
u8 data;
@@ -664,8 +663,8 @@ static void exynos_dp_get_max_rx_lane_count(struct
exynos_dp_device *dp,
}
static void exynos_dp_init_training(struct exynos_dp_device *dp,
- enum link_lane_count_type max_lane,
- enum link_rate_type max_rate)
+ enum link_lane_count_type max_lane,
+ enum link_rate_type max_rate)
{
/*
* MACRO_RST must be applied after the PLL_LOCK to avoid
@@ -678,7 +677,7 @@ static void exynos_dp_init_training(struct
exynos_dp_device *dp,
exynos_dp_get_max_rx_lane_count(dp, &dp->link_train.lane_count);
if ((dp->link_train.link_rate != LINK_RATE_1_62GBPS) &&
- (dp->link_train.link_rate != LINK_RATE_2_70GBPS)) {
+ (dp->link_train.link_rate != LINK_RATE_2_70GBPS)) {
dev_err(dp->dev, "Rx Max Link Rate is abnormal :%x !\n",
dp->link_train.link_rate);
dp->link_train.link_rate = LINK_RATE_1_62GBPS;
@@ -738,8 +737,7 @@ static int exynos_dp_sw_link_training(struct
exynos_dp_device *dp)
}
static int exynos_dp_set_link_train(struct exynos_dp_device *dp,
- u32 count,
- u32 bwtype)
+ u32 count, u32 bwtype)
{
int i;
int retval;
@@ -830,21 +828,19 @@ static void exynos_dp_enable_scramble(struct
exynos_dp_device *dp, bool enable)
if (enable) {
exynos_dp_enable_scrambling(dp);
- exynos_dp_read_byte_from_dpcd(dp,
- DP_TRAINING_PATTERN_SET,
- &data);
- exynos_dp_write_byte_to_dpcd(dp,
- DP_TRAINING_PATTERN_SET,
+ exynos_dp_read_byte_from_dpcd(dp, DP_TRAINING_PATTERN_SET,
+ &data);
+ exynos_dp_write_byte_to_dpcd(
+ dp, DP_TRAINING_PATTERN_SET,
(u8)(data & ~DP_LINK_SCRAMBLING_DISABLE));
} else {
exynos_dp_disable_scrambling(dp);
- exynos_dp_read_byte_from_dpcd(dp,
- DP_TRAINING_PATTERN_SET,
- &data);
- exynos_dp_write_byte_to_dpcd(dp,
- DP_TRAINING_PATTERN_SET,
- (u8)(data | DP_LINK_SCRAMBLING_DISABLE));
+ exynos_dp_read_byte_from_dpcd(dp, DP_TRAINING_PATTERN_SET,
+ &data);
+ exynos_dp_write_byte_to_dpcd(
+ dp, DP_TRAINING_PATTERN_SET,
+ (u8)(data | DP_LINK_SCRAMBLING_DISABLE));
}
}
@@ -915,7 +911,7 @@ static void exynos_dp_commit(struct
exynos_drm_display *display)
}
ret = exynos_dp_set_link_train(dp, dp->video_info->lane_count,
- dp->video_info->link_rate);
+ dp->video_info->link_rate);
if (ret) {
dev_err(dp->dev, "unable to do link train\n");
return;
@@ -1004,7 +1000,7 @@ static struct drm_connector_helper_funcs
exynos_dp_connector_helper_funcs = {
/* returns the number of bridges attached */
static int exynos_drm_attach_lcd_bridge(struct exynos_dp_device *dp,
- struct drm_encoder *encoder)
+ struct drm_encoder *encoder)
{
int ret;
@@ -1020,7 +1016,7 @@ static int exynos_drm_attach_lcd_bridge(struct
exynos_dp_device *dp,
}
static int exynos_dp_create_connector(struct exynos_drm_display *display,
- struct drm_encoder *encoder)
+ struct drm_encoder *encoder)
{
struct exynos_dp_device *dp = display_to_dp(display);
struct drm_connector *connector = &dp->connector;
@@ -1038,7 +1034,8 @@ static int exynos_dp_create_connector(struct
exynos_drm_display *display,
connector->polled = DRM_CONNECTOR_POLL_HPD;
ret = drm_connector_init(dp->drm_dev, connector,
- &exynos_dp_connector_funcs, DRM_MODE_CONNECTOR_eDP);
+ &exynos_dp_connector_funcs,
+ DRM_MODE_CONNECTOR_eDP);
if (ret) {
DRM_ERROR("Failed to initialize connector with drm\n");
return ret;
@@ -1148,8 +1145,8 @@ static struct video_info
*exynos_dp_dt_parse_pdata(struct device *dev)
struct device_node *dp_node = dev->of_node;
struct video_info *dp_video_config;
- dp_video_config = devm_kzalloc(dev,
- sizeof(*dp_video_config), GFP_KERNEL);
+ dp_video_config = devm_kzalloc(dev, sizeof(*dp_video_config),
+ GFP_KERNEL);
if (!dp_video_config)
return ERR_PTR(-ENOMEM);
@@ -1163,37 +1160,37 @@ static struct video_info
*exynos_dp_dt_parse_pdata(struct device *dev)
of_property_read_bool(dp_node, "interlaced");
if (of_property_read_u32(dp_node, "samsung,color-space",
- &dp_video_config->color_space)) {
+ &dp_video_config->color_space)) {
dev_err(dev, "failed to get color-space\n");
return ERR_PTR(-EINVAL);
}
if (of_property_read_u32(dp_node, "samsung,dynamic-range",
- &dp_video_config->dynamic_range)) {
+ &dp_video_config->dynamic_range)) {
dev_err(dev, "failed to get dynamic-range\n");
return ERR_PTR(-EINVAL);
}
if (of_property_read_u32(dp_node, "samsung,ycbcr-coeff",
- &dp_video_config->ycbcr_coeff)) {
+ &dp_video_config->ycbcr_coeff)) {
dev_err(dev, "failed to get ycbcr-coeff\n");
return ERR_PTR(-EINVAL);
}
if (of_property_read_u32(dp_node, "samsung,color-depth",
- &dp_video_config->color_depth)) {
+ &dp_video_config->color_depth)) {
dev_err(dev, "failed to get color-depth\n");
return ERR_PTR(-EINVAL);
}
if (of_property_read_u32(dp_node, "samsung,link-rate",
- &dp_video_config->link_rate)) {
+ &dp_video_config->link_rate)) {
dev_err(dev, "failed to get link-rate\n");
return ERR_PTR(-EINVAL);
}
if (of_property_read_u32(dp_node, "samsung,lane-count",
- &dp_video_config->lane_count)) {
+ &dp_video_config->lane_count)) {
dev_err(dev, "failed to get lane-count\n");
return ERR_PTR(-EINVAL);
}
@@ -1206,7 +1203,7 @@ static int exynos_dp_dt_parse_panel(struct
exynos_dp_device *dp)
int ret;
ret = of_get_videomode(dp->dev->of_node, &dp->priv.vm,
- OF_USE_NATIVE_MODE);
+ OF_USE_NATIVE_MODE);
if (ret) {
DRM_ERROR("failed: of_get_videomode() : %d\n", ret);
return ret;
@@ -1302,7 +1299,7 @@ static int exynos_dp_bind(struct device *dev,
struct device *master, void *data)
exynos_dp_init_dp(dp);
ret = devm_request_irq(&pdev->dev, dp->irq, exynos_dp_irq_handler,
- irq_flags, "exynos-dp", dp);
+ irq_flags, "exynos-dp", dp);
if (ret) {
dev_err(&pdev->dev, "failed to request irq\n");
return ret;
@@ -1315,7 +1312,7 @@ static int exynos_dp_bind(struct device *dev,
struct device *master, void *data)
}
static void exynos_dp_unbind(struct device *dev, struct device *master,
- void *data)
+ void *data)
{
struct exynos_dp_device *dp = dev_get_drvdata(dev);
@@ -1334,7 +1331,7 @@ static int exynos_dp_probe(struct platform_device
*pdev)
struct exynos_dp_device *dp;
dp = devm_kzalloc(&pdev->dev, sizeof(struct exynos_dp_device),
- GFP_KERNEL);
+ GFP_KERNEL);
if (!dp)
return -ENOMEM;
@@ -1358,8 +1355,9 @@ static int exynos_dp_probe(struct platform_device
*pdev)
of_node_put(bridge_node);
if (!dp->bridge)
return -EPROBE_DEFER;
- } else
+ } else {
return -EPROBE_DEFER;
+ }
}
return component_add(&pdev->dev, &exynos_dp_ops);
diff --git a/drivers/gpu/drm/exynos/exynos_dp_core.h
b/drivers/gpu/drm/exynos/exynos_dp_core.h
index a4e7996..c321ad5 100644
--- a/drivers/gpu/drm/exynos/exynos_dp_core.h
+++ b/drivers/gpu/drm/exynos/exynos_dp_core.h
@@ -180,8 +180,8 @@ void exynos_dp_config_interrupt(struct
exynos_dp_device *dp);
enum pll_status exynos_dp_get_pll_lock_status(struct exynos_dp_device
*dp);
void exynos_dp_set_pll_power_down(struct exynos_dp_device *dp, bool
enable);
void exynos_dp_set_analog_power_down(struct exynos_dp_device *dp,
- enum analog_power_block block,
- bool enable);
+ enum analog_power_block block,
+ bool enable);
void exynos_dp_init_analog_func(struct exynos_dp_device *dp);
void exynos_dp_init_hpd(struct exynos_dp_device *dp);
enum dp_irq_type exynos_dp_get_irq_type(struct exynos_dp_device *dp);
@@ -192,50 +192,50 @@ int exynos_dp_get_plug_in_status(struct
exynos_dp_device *dp);
void exynos_dp_enable_sw_function(struct exynos_dp_device *dp);
int exynos_dp_start_aux_transaction(struct exynos_dp_device *dp);
int exynos_dp_write_byte_to_dpcd(struct exynos_dp_device *dp,
- unsigned int reg_addr,
- unsigned char data);
+ unsigned int reg_addr,
+ unsigned char data);
int exynos_dp_read_byte_from_dpcd(struct exynos_dp_device *dp,
- unsigned int reg_addr,
- unsigned char *data);
+ unsigned int reg_addr,
+ unsigned char *data);
int exynos_dp_write_bytes_to_dpcd(struct exynos_dp_device *dp,
- unsigned int reg_addr,
- unsigned int count,
- unsigned char data[]);
+ unsigned int reg_addr,
+ unsigned int count,
+ unsigned char data[]);
int exynos_dp_read_bytes_from_dpcd(struct exynos_dp_device *dp,
- unsigned int reg_addr,
- unsigned int count,
- unsigned char data[]);
+ unsigned int reg_addr,
+ unsigned int count,
+ unsigned char data[]);
int exynos_dp_select_i2c_device(struct exynos_dp_device *dp,
unsigned int device_addr,
unsigned int reg_addr);
int exynos_dp_read_byte_from_i2c(struct exynos_dp_device *dp,
- unsigned int device_addr,
- unsigned int reg_addr,
- unsigned int *data);
+ unsigned int device_addr,
+ unsigned int reg_addr,
+ unsigned int *data);
int exynos_dp_read_bytes_from_i2c(struct exynos_dp_device *dp,
- unsigned int device_addr,
- unsigned int reg_addr,
- unsigned int count,
- unsigned char edid[]);
+ unsigned int device_addr,
+ unsigned int reg_addr,
+ unsigned int count,
+ unsigned char edid[]);
void exynos_dp_set_link_bandwidth(struct exynos_dp_device *dp, u32
bwtype);
void exynos_dp_get_link_bandwidth(struct exynos_dp_device *dp, u32
*bwtype);
void exynos_dp_set_lane_count(struct exynos_dp_device *dp, u32 count);
void exynos_dp_get_lane_count(struct exynos_dp_device *dp, u32 *count);
void exynos_dp_enable_enhanced_mode(struct exynos_dp_device *dp, bool
enable);
void exynos_dp_set_training_pattern(struct exynos_dp_device *dp,
- enum pattern_set pattern);
+ enum pattern_set pattern);
void exynos_dp_set_lane0_pre_emphasis(struct exynos_dp_device *dp, u32
level);
void exynos_dp_set_lane1_pre_emphasis(struct exynos_dp_device *dp, u32
level);
void exynos_dp_set_lane2_pre_emphasis(struct exynos_dp_device *dp, u32
level);
void exynos_dp_set_lane3_pre_emphasis(struct exynos_dp_device *dp, u32
level);
void exynos_dp_set_lane0_link_training(struct exynos_dp_device *dp,
- u32 training_lane);
+ u32 training_lane);
void exynos_dp_set_lane1_link_training(struct exynos_dp_device *dp,
- u32 training_lane);
+ u32 training_lane);
void exynos_dp_set_lane2_link_training(struct exynos_dp_device *dp,
- u32 training_lane);
+ u32 training_lane);
void exynos_dp_set_lane3_link_training(struct exynos_dp_device *dp,
- u32 training_lane);
+ u32 training_lane);
u32 exynos_dp_get_lane0_link_training(struct exynos_dp_device *dp);
u32 exynos_dp_get_lane1_link_training(struct exynos_dp_device *dp);
u32 exynos_dp_get_lane2_link_training(struct exynos_dp_device *dp);
@@ -246,9 +246,8 @@ void exynos_dp_init_video(struct exynos_dp_device *dp);
void exynos_dp_set_video_color_format(struct exynos_dp_device *dp);
int exynos_dp_is_slave_video_stream_clock_on(struct exynos_dp_device *dp);
void exynos_dp_set_video_cr_mn(struct exynos_dp_device *dp,
- enum clock_recovery_m_value_type type,
- u32 m_value,
- u32 n_value);
+ enum clock_recovery_m_value_type type,
+ u32 m_value, u32 n_value);
void exynos_dp_set_video_timing_mode(struct exynos_dp_device *dp, u32
type);
void exynos_dp_enable_video_master(struct exynos_dp_device *dp, bool
enable);
void exynos_dp_start_video(struct exynos_dp_device *dp);
diff --git a/drivers/gpu/drm/exynos/exynos_dp_reg.c
b/drivers/gpu/drm/exynos/exynos_dp_reg.c
index c1f87a2..9aa483d 100644
--- a/drivers/gpu/drm/exynos/exynos_dp_reg.c
+++ b/drivers/gpu/drm/exynos/exynos_dp_reg.c
@@ -202,8 +202,8 @@ void exynos_dp_set_pll_power_down(struct
exynos_dp_device *dp, bool enable)
}
void exynos_dp_set_analog_power_down(struct exynos_dp_device *dp,
- enum analog_power_block block,
- bool enable)
+ enum analog_power_block block,
+ bool enable)
{
u32 reg;
@@ -399,8 +399,8 @@ void exynos_dp_init_aux(struct exynos_dp_device *dp)
exynos_dp_reset_aux(dp);
/* Disable AUX transaction H/W retry */
- reg = AUX_BIT_PERIOD_EXPECTED_DELAY(3) | AUX_HW_RETRY_COUNT_SEL(0)|
- AUX_HW_RETRY_INTERVAL_600_MICROSECONDS;
+ reg = AUX_BIT_PERIOD_EXPECTED_DELAY(3) | AUX_HW_RETRY_COUNT_SEL(0) |
+ AUX_HW_RETRY_INTERVAL_600_MICROSECONDS;
writel(reg, dp->reg_base + EXYNOS_DP_AUX_HW_RETRY_CTL);
/* Receive AUX Channel DEFER commands equal to DEFFER_COUNT*64 */
@@ -483,8 +483,8 @@ int exynos_dp_start_aux_transaction(struct
exynos_dp_device *dp)
}
int exynos_dp_write_byte_to_dpcd(struct exynos_dp_device *dp,
- unsigned int reg_addr,
- unsigned char data)
+ unsigned int reg_addr,
+ unsigned char data)
{
u32 reg;
int i;
@@ -519,17 +519,16 @@ int exynos_dp_write_byte_to_dpcd(struct
exynos_dp_device *dp,
retval = exynos_dp_start_aux_transaction(dp);
if (retval == 0)
break;
- else
- dev_dbg(dp->dev, "%s: Aux Transaction fail!\n",
- __func__);
+
+ dev_dbg(dp->dev, "%s: Aux Transaction fail!\n", __func__);
}
return retval;
}
int exynos_dp_read_byte_from_dpcd(struct exynos_dp_device *dp,
- unsigned int reg_addr,
- unsigned char *data)
+ unsigned int reg_addr,
+ unsigned char *data)
{
u32 reg;
int i;
@@ -560,9 +559,8 @@ int exynos_dp_read_byte_from_dpcd(struct
exynos_dp_device *dp,
retval = exynos_dp_start_aux_transaction(dp);
if (retval == 0)
break;
- else
- dev_dbg(dp->dev, "%s: Aux Transaction fail!\n",
- __func__);
+
+ dev_dbg(dp->dev, "%s: Aux Transaction fail!\n", __func__);
}
/* Read data buffer */
@@ -573,9 +571,9 @@ int exynos_dp_read_byte_from_dpcd(struct
exynos_dp_device *dp,
}
int exynos_dp_write_bytes_to_dpcd(struct exynos_dp_device *dp,
- unsigned int reg_addr,
- unsigned int count,
- unsigned char data[])
+ unsigned int reg_addr,
+ unsigned int count,
+ unsigned char data[])
{
u32 reg;
unsigned int start_offset;
@@ -625,9 +623,9 @@ int exynos_dp_write_bytes_to_dpcd(struct
exynos_dp_device *dp,
retval = exynos_dp_start_aux_transaction(dp);
if (retval == 0)
break;
- else
- dev_dbg(dp->dev, "%s: Aux Transaction fail!\n",
- __func__);
+
+ dev_dbg(dp->dev, "%s: Aux Transaction fail!\n",
+ __func__);
}
start_offset += cur_data_count;
@@ -637,9 +635,9 @@ int exynos_dp_write_bytes_to_dpcd(struct
exynos_dp_device *dp,
}
int exynos_dp_read_bytes_from_dpcd(struct exynos_dp_device *dp,
- unsigned int reg_addr,
- unsigned int count,
- unsigned char data[])
+ unsigned int reg_addr,
+ unsigned int count,
+ unsigned char data[])
{
u32 reg;
unsigned int start_offset;
@@ -683,9 +681,9 @@ int exynos_dp_read_bytes_from_dpcd(struct
exynos_dp_device *dp,
retval = exynos_dp_start_aux_transaction(dp);
if (retval == 0)
break;
- else
- dev_dbg(dp->dev, "%s: Aux Transaction fail!\n",
- __func__);
+
+ dev_dbg(dp->dev, "%s: Aux Transaction fail!\n",
+ __func__);
}
for (cur_data_idx = 0; cur_data_idx < cur_data_count;
@@ -736,9 +734,9 @@ int exynos_dp_select_i2c_device(struct
exynos_dp_device *dp,
}
int exynos_dp_read_byte_from_i2c(struct exynos_dp_device *dp,
- unsigned int device_addr,
- unsigned int reg_addr,
- unsigned int *data)
+ unsigned int device_addr,
+ unsigned int reg_addr,
+ unsigned int *data)
{
u32 reg;
int i;
@@ -767,9 +765,8 @@ int exynos_dp_read_byte_from_i2c(struct
exynos_dp_device *dp,
retval = exynos_dp_start_aux_transaction(dp);
if (retval == 0)
break;
- else
- dev_dbg(dp->dev, "%s: Aux Transaction fail!\n",
- __func__);
+
+ dev_dbg(dp->dev, "%s: Aux Transaction fail!\n", __func__);
}
/* Read data */
@@ -780,10 +777,10 @@ int exynos_dp_read_byte_from_i2c(struct
exynos_dp_device *dp,
}
int exynos_dp_read_bytes_from_i2c(struct exynos_dp_device *dp,
- unsigned int device_addr,
- unsigned int reg_addr,
- unsigned int count,
- unsigned char edid[])
+ unsigned int device_addr,
+ unsigned int reg_addr,
+ unsigned int count,
+ unsigned char edid[])
{
u32 reg;
unsigned int i, j;
@@ -807,8 +804,8 @@ int exynos_dp_read_bytes_from_i2c(struct
exynos_dp_device *dp,
* request without sending address
*/
if (!defer)
- retval = exynos_dp_select_i2c_device(dp,
- device_addr, reg_addr + i);
+ retval = exynos_dp_select_i2c_device(
+ dp, device_addr, reg_addr + i);
else
defer = 0;
@@ -828,15 +825,14 @@ int exynos_dp_read_bytes_from_i2c(struct
exynos_dp_device *dp,
retval = exynos_dp_start_aux_transaction(dp);
if (retval == 0)
break;
- else
- dev_dbg(dp->dev,
- "%s: Aux Transaction fail!\n",
- __func__);
+
+ dev_dbg(dp->dev, "%s: Aux Transaction fail!\n",
+ __func__);
}
/* Check if Rx sends defer */
reg = readl(dp->reg_base + EXYNOS_DP_AUX_RX_COMM);
if (reg == AUX_RX_COMM_AUX_DEFER ||
- reg == AUX_RX_COMM_I2C_DEFER) {
+ reg == AUX_RX_COMM_I2C_DEFER) {
dev_err(dp->dev, "Defer: %d\n\n", reg);
defer = 1;
}
@@ -901,7 +897,7 @@ void exynos_dp_enable_enhanced_mode(struct
exynos_dp_device *dp, bool enable)
}
void exynos_dp_set_training_pattern(struct exynos_dp_device *dp,
- enum pattern_set pattern)
+ enum pattern_set pattern)
{
u32 reg;
@@ -974,7 +970,7 @@ void exynos_dp_set_lane3_pre_emphasis(struct
exynos_dp_device *dp, u32 level)
}
void exynos_dp_set_lane0_link_training(struct exynos_dp_device *dp,
- u32 training_lane)
+ u32 training_lane)
{
u32 reg;
@@ -983,7 +979,7 @@ void exynos_dp_set_lane0_link_training(struct
exynos_dp_device *dp,
}
void exynos_dp_set_lane1_link_training(struct exynos_dp_device *dp,
- u32 training_lane)
+ u32 training_lane)
{
u32 reg;
@@ -992,7 +988,7 @@ void exynos_dp_set_lane1_link_training(struct
exynos_dp_device *dp,
}
void exynos_dp_set_lane2_link_training(struct exynos_dp_device *dp,
- u32 training_lane)
+ u32 training_lane)
{
u32 reg;
@@ -1001,7 +997,7 @@ void exynos_dp_set_lane2_link_training(struct
exynos_dp_device *dp,
}
void exynos_dp_set_lane3_link_training(struct exynos_dp_device *dp,
- u32 training_lane)
+ u32 training_lane)
{
u32 reg;
@@ -1125,9 +1121,9 @@ int
exynos_dp_is_slave_video_stream_clock_on(struct exynos_dp_device *dp)
}
void exynos_dp_set_video_cr_mn(struct exynos_dp_device *dp,
- enum clock_recovery_m_value_type type,
- u32 m_value,
- u32 n_value)
+ enum clock_recovery_m_value_type type,
+ u32 m_value,
+ u32 n_value)
{
u32 reg;
@@ -1221,7 +1217,7 @@ void exynos_dp_config_video_slave_mode(struct
exynos_dp_device *dp)
u32 reg;
reg = readl(dp->reg_base + EXYNOS_DP_FUNC_EN_1);
- reg &= ~(MASTER_VID_FUNC_EN_N|SLAVE_VID_FUNC_EN_N);
+ reg &= ~(MASTER_VID_FUNC_EN_N | SLAVE_VID_FUNC_EN_N);
reg |= MASTER_VID_FUNC_EN_N;
writel(reg, dp->reg_base + EXYNOS_DP_FUNC_EN_1);
--
2.1.2
^ permalink raw reply related [flat|nested] 18+ messages in thread
* [RFC PATCH 1/8] drm: exynos/dp: fix code style
2015-08-06 13:49 [RFC PATCH 0/8] Add Analogix Core Display Port Driver Yakir Yang
2015-08-06 13:58 ` [RFC PATCH 1/8] drm: exynos/dp: fix code style Yakir Yang
@ 2015-08-06 14:04 ` Yakir Yang
2015-08-06 15:05 ` Joe Perches
2015-08-06 14:07 ` [RFC PATCH 2/8] drm: exynos/dp: convert to drm bridge mode Yakir Yang
` (7 subsequent siblings)
9 siblings, 1 reply; 18+ messages in thread
From: Yakir Yang @ 2015-08-06 14:04 UTC (permalink / raw)
To: linux-arm-kernel
make checkpatch.pl script happy
Signed-off-by: Yakir Yang <ykk@rock-chips.com>
---
drivers/gpu/drm/exynos/exynos_dp_core.c | 224 ++++++++++++++++----------------
drivers/gpu/drm/exynos/exynos_dp_core.h | 53 ++++----
drivers/gpu/drm/exynos/exynos_dp_reg.c | 100 +++++++-------
3 files changed, 185 insertions(+), 192 deletions(-)
diff --git a/drivers/gpu/drm/exynos/exynos_dp_core.c b/drivers/gpu/drm/exynos/exynos_dp_core.c
index 172b800..a8097a4 100644
--- a/drivers/gpu/drm/exynos/exynos_dp_core.c
+++ b/drivers/gpu/drm/exynos/exynos_dp_core.c
@@ -114,8 +114,8 @@ static int exynos_dp_read_edid(struct exynos_dp_device *dp)
/* Read Extension Flag, Number of 128-byte EDID extension blocks */
retval = exynos_dp_read_byte_from_i2c(dp, I2C_EDID_DEVICE_ADDR,
- EDID_EXTENSION_FLAG,
- &extend_block);
+ EDID_EXTENSION_FLAG,
+ &extend_block);
if (retval)
return retval;
@@ -123,10 +123,11 @@ static int exynos_dp_read_edid(struct exynos_dp_device *dp)
dev_dbg(dp->dev, "EDID data includes a single extension!\n");
/* Read EDID data */
- retval = exynos_dp_read_bytes_from_i2c(dp, I2C_EDID_DEVICE_ADDR,
- EDID_HEADER_PATTERN,
- EDID_BLOCK_LENGTH,
- &edid[EDID_HEADER_PATTERN]);
+ retval =
+ exynos_dp_read_bytes_from_i2c(dp, I2C_EDID_DEVICE_ADDR,
+ EDID_HEADER_PATTERN,
+ EDID_BLOCK_LENGTH,
+ &edid[EDID_HEADER_PATTERN]);
if (retval != 0) {
dev_err(dp->dev, "EDID Read failed!\n");
return -EIO;
@@ -138,11 +139,11 @@ static int exynos_dp_read_edid(struct exynos_dp_device *dp)
}
/* Read additional EDID data */
- retval = exynos_dp_read_bytes_from_i2c(dp,
- I2C_EDID_DEVICE_ADDR,
- EDID_BLOCK_LENGTH,
- EDID_BLOCK_LENGTH,
- &edid[EDID_BLOCK_LENGTH]);
+ retval =
+ exynos_dp_read_bytes_from_i2c(dp, I2C_EDID_DEVICE_ADDR,
+ EDID_BLOCK_LENGTH,
+ EDID_BLOCK_LENGTH,
+ &edid[EDID_BLOCK_LENGTH]);
if (retval != 0) {
dev_err(dp->dev, "EDID Read failed!\n");
return -EIO;
@@ -154,24 +155,22 @@ static int exynos_dp_read_edid(struct exynos_dp_device *dp)
}
exynos_dp_read_byte_from_dpcd(dp, DP_TEST_REQUEST,
- &test_vector);
+ &test_vector);
if (test_vector & DP_TEST_LINK_EDID_READ) {
- exynos_dp_write_byte_to_dpcd(dp,
- DP_TEST_EDID_CHECKSUM,
+ exynos_dp_write_byte_to_dpcd(
+ dp, DP_TEST_EDID_CHECKSUM,
edid[EDID_BLOCK_LENGTH + EDID_CHECKSUM]);
- exynos_dp_write_byte_to_dpcd(dp,
- DP_TEST_RESPONSE,
+ exynos_dp_write_byte_to_dpcd(
+ dp, DP_TEST_RESPONSE,
DP_TEST_EDID_CHECKSUM_WRITE);
}
} else {
dev_info(dp->dev, "EDID data does not include any extensions.\n");
/* Read EDID data */
- retval = exynos_dp_read_bytes_from_i2c(dp,
- I2C_EDID_DEVICE_ADDR,
- EDID_HEADER_PATTERN,
- EDID_BLOCK_LENGTH,
- &edid[EDID_HEADER_PATTERN]);
+ retval = exynos_dp_read_bytes_from_i2c(
+ dp, I2C_EDID_DEVICE_ADDR, EDID_HEADER_PATTERN,
+ EDID_BLOCK_LENGTH, &edid[EDID_HEADER_PATTERN]);
if (retval != 0) {
dev_err(dp->dev, "EDID Read failed!\n");
return -EIO;
@@ -182,16 +181,15 @@ static int exynos_dp_read_edid(struct exynos_dp_device *dp)
return -EIO;
}
- exynos_dp_read_byte_from_dpcd(dp,
- DP_TEST_REQUEST,
- &test_vector);
+ exynos_dp_read_byte_from_dpcd(dp, DP_TEST_REQUEST,
+ &test_vector);
if (test_vector & DP_TEST_LINK_EDID_READ) {
- exynos_dp_write_byte_to_dpcd(dp,
- DP_TEST_EDID_CHECKSUM,
- edid[EDID_CHECKSUM]);
- exynos_dp_write_byte_to_dpcd(dp,
- DP_TEST_RESPONSE,
- DP_TEST_EDID_CHECKSUM_WRITE);
+ exynos_dp_write_byte_to_dpcd(
+ dp, DP_TEST_EDID_CHECKSUM,
+ edid[EDID_CHECKSUM]);
+ exynos_dp_write_byte_to_dpcd(
+ dp, DP_TEST_RESPONSE,
+ DP_TEST_EDID_CHECKSUM_WRITE);
}
}
@@ -206,8 +204,7 @@ static int exynos_dp_handle_edid(struct exynos_dp_device *dp)
int retval;
/* Read DPCD DP_DPCD_REV~RECEIVE_PORT1_CAP_1 */
- retval = exynos_dp_read_bytes_from_dpcd(dp, DP_DPCD_REV,
- 12, buf);
+ retval = exynos_dp_read_bytes_from_dpcd(dp, DP_DPCD_REV, 12, buf);
if (retval)
return retval;
@@ -222,19 +219,21 @@ static int exynos_dp_handle_edid(struct exynos_dp_device *dp)
}
static void exynos_dp_enable_rx_to_enhanced_mode(struct exynos_dp_device *dp,
- bool enable)
+ bool enable)
{
u8 data;
exynos_dp_read_byte_from_dpcd(dp, DP_LANE_COUNT_SET, &data);
if (enable)
- exynos_dp_write_byte_to_dpcd(dp, DP_LANE_COUNT_SET,
- DP_LANE_COUNT_ENHANCED_FRAME_EN |
- DPCD_LANE_COUNT_SET(data));
+ exynos_dp_write_byte_to_dpcd(
+ dp, DP_LANE_COUNT_SET,
+ DP_LANE_COUNT_ENHANCED_FRAME_EN |
+ DPCD_LANE_COUNT_SET(data));
else
- exynos_dp_write_byte_to_dpcd(dp, DP_LANE_COUNT_SET,
- DPCD_LANE_COUNT_SET(data));
+ exynos_dp_write_byte_to_dpcd(
+ dp, DP_LANE_COUNT_SET,
+ DPCD_LANE_COUNT_SET(data));
}
static int exynos_dp_is_enhanced_mode_available(struct exynos_dp_device *dp)
@@ -261,13 +260,12 @@ static void exynos_dp_training_pattern_dis(struct exynos_dp_device *dp)
{
exynos_dp_set_training_pattern(dp, DP_NONE);
- exynos_dp_write_byte_to_dpcd(dp,
- DP_TRAINING_PATTERN_SET,
- DP_TRAINING_PATTERN_DISABLE);
+ exynos_dp_write_byte_to_dpcd(dp, DP_TRAINING_PATTERN_SET,
+ DP_TRAINING_PATTERN_DISABLE);
}
static void exynos_dp_set_lane_lane_pre_emphasis(struct exynos_dp_device *dp,
- int pre_emphasis, int lane)
+ int pre_emphasis, int lane)
{
switch (lane) {
case 0:
@@ -307,15 +305,14 @@ static int exynos_dp_link_start(struct exynos_dp_device *dp)
/* Setup RX configuration */
buf[0] = dp->link_train.link_rate;
buf[1] = dp->link_train.lane_count;
- retval = exynos_dp_write_bytes_to_dpcd(dp, DP_LINK_BW_SET,
- 2, buf);
+ retval = exynos_dp_write_bytes_to_dpcd(dp, DP_LINK_BW_SET, 2, buf);
if (retval)
return retval;
/* Set TX pre-emphasis to minimum */
for (lane = 0; lane < lane_count; lane++)
- exynos_dp_set_lane_lane_pre_emphasis(dp,
- PRE_EMPHASIS_LEVEL_0, lane);
+ exynos_dp_set_lane_lane_pre_emphasis(dp, PRE_EMPHASIS_LEVEL_0,
+ lane);
/* Wait for PLL lock */
pll_tries = 0;
@@ -333,9 +330,9 @@ static int exynos_dp_link_start(struct exynos_dp_device *dp)
exynos_dp_set_training_pattern(dp, TRAINING_PTN1);
/* Set RX training pattern */
- retval = exynos_dp_write_byte_to_dpcd(dp,
- DP_TRAINING_PATTERN_SET,
- DP_LINK_SCRAMBLING_DISABLE | DP_TRAINING_PATTERN_1);
+ retval = exynos_dp_write_byte_to_dpcd(dp, DP_TRAINING_PATTERN_SET,
+ DP_LINK_SCRAMBLING_DISABLE |
+ DP_TRAINING_PATTERN_1);
if (retval)
return retval;
@@ -344,7 +341,7 @@ static int exynos_dp_link_start(struct exynos_dp_device *dp)
DP_TRAIN_VOLTAGE_SWING_LEVEL_0;
retval = exynos_dp_write_bytes_to_dpcd(dp, DP_TRAINING_LANE0_SET,
- lane_count, buf);
+ lane_count, buf);
return retval;
}
@@ -352,7 +349,7 @@ static int exynos_dp_link_start(struct exynos_dp_device *dp)
static unsigned char exynos_dp_get_lane_status(u8 link_status[2], int lane)
{
int shift = (lane & 1) * 4;
- u8 link_value = link_status[lane>>1];
+ u8 link_value = link_status[lane >> 1];
return (link_value >> shift) & 0xf;
}
@@ -371,7 +368,7 @@ static int exynos_dp_clock_recovery_ok(u8 link_status[2], int lane_count)
}
static int exynos_dp_channel_eq_ok(u8 link_status[2], u8 link_align,
- int lane_count)
+ int lane_count)
{
int lane;
u8 lane_status;
@@ -390,10 +387,10 @@ static int exynos_dp_channel_eq_ok(u8 link_status[2], u8 link_align,
}
static unsigned char exynos_dp_get_adjust_request_voltage(u8 adjust_request[2],
- int lane)
+ int lane)
{
int shift = (lane & 1) * 4;
- u8 link_value = adjust_request[lane>>1];
+ u8 link_value = adjust_request[lane >> 1];
return (link_value >> shift) & 0x3;
}
@@ -403,13 +400,13 @@ static unsigned char exynos_dp_get_adjust_request_pre_emphasis(
int lane)
{
int shift = (lane & 1) * 4;
- u8 link_value = adjust_request[lane>>1];
+ u8 link_value = adjust_request[lane >> 1];
return ((link_value >> shift) & 0xc) >> 2;
}
static void exynos_dp_set_lane_link_training(struct exynos_dp_device *dp,
- u8 training_lane_set, int lane)
+ u8 training_lane_set, int lane)
{
switch (lane) {
case 0:
@@ -465,7 +462,7 @@ static void exynos_dp_reduce_link_rate(struct exynos_dp_device *dp)
}
static void exynos_dp_get_adjust_training_lane(struct exynos_dp_device *dp,
- u8 adjust_request[2])
+ u8 adjust_request[2])
{
int lane, lane_count;
u8 voltage_swing, pre_emphasis, training_lane;
@@ -498,13 +495,13 @@ static int exynos_dp_process_clock_recovery(struct exynos_dp_device *dp)
lane_count = dp->link_train.lane_count;
- retval = exynos_dp_read_bytes_from_dpcd(dp,
- DP_LANE0_1_STATUS, 2, link_status);
+ retval = exynos_dp_read_bytes_from_dpcd(dp, DP_LANE0_1_STATUS,
+ 2, link_status);
if (retval)
return retval;
- retval = exynos_dp_read_bytes_from_dpcd(dp,
- DP_ADJUST_REQUEST_LANE0_1, 2, adjust_request);
+ retval = exynos_dp_read_bytes_from_dpcd(dp, DP_ADJUST_REQUEST_LANE0_1,
+ 2, adjust_request);
if (retval)
return retval;
@@ -512,8 +509,8 @@ static int exynos_dp_process_clock_recovery(struct exynos_dp_device *dp)
/* set training pattern 2 for EQ */
exynos_dp_set_training_pattern(dp, TRAINING_PTN2);
- retval = exynos_dp_write_byte_to_dpcd(dp,
- DP_TRAINING_PATTERN_SET,
+ retval = exynos_dp_write_byte_to_dpcd(
+ dp, DP_TRAINING_PATTERN_SET,
DP_LINK_SCRAMBLING_DISABLE |
DP_TRAINING_PATTERN_2);
if (retval)
@@ -527,8 +524,9 @@ static int exynos_dp_process_clock_recovery(struct exynos_dp_device *dp)
dp, lane);
voltage_swing = exynos_dp_get_adjust_request_voltage(
adjust_request, lane);
- pre_emphasis = exynos_dp_get_adjust_request_pre_emphasis(
- adjust_request, lane);
+ pre_emphasis =
+ exynos_dp_get_adjust_request_pre_emphasis(
+ adjust_request, lane);
if (DPCD_VOLTAGE_SWING_GET(training_lane) ==
voltage_swing &&
@@ -551,11 +549,11 @@ static int exynos_dp_process_clock_recovery(struct exynos_dp_device *dp)
exynos_dp_get_adjust_training_lane(dp, adjust_request);
for (lane = 0; lane < lane_count; lane++)
- exynos_dp_set_lane_link_training(dp,
- dp->link_train.training_lane[lane], lane);
+ exynos_dp_set_lane_link_training(
+ dp, dp->link_train.training_lane[lane], lane);
- retval = exynos_dp_write_bytes_to_dpcd(dp,
- DP_TRAINING_LANE0_SET, lane_count,
+ retval = exynos_dp_write_bytes_to_dpcd(
+ dp, DP_TRAINING_LANE0_SET, lane_count,
dp->link_train.training_lane);
if (retval)
return retval;
@@ -573,8 +571,8 @@ static int exynos_dp_process_equalizer_training(struct exynos_dp_device *dp)
lane_count = dp->link_train.lane_count;
- retval = exynos_dp_read_bytes_from_dpcd(dp,
- DP_LANE0_1_STATUS, 2, link_status);
+ retval = exynos_dp_read_bytes_from_dpcd(dp, DP_LANE0_1_STATUS,
+ 2, link_status);
if (retval)
return retval;
@@ -583,13 +581,13 @@ static int exynos_dp_process_equalizer_training(struct exynos_dp_device *dp)
return -EIO;
}
- retval = exynos_dp_read_bytes_from_dpcd(dp,
- DP_ADJUST_REQUEST_LANE0_1, 2, adjust_request);
+ retval = exynos_dp_read_bytes_from_dpcd(dp, DP_ADJUST_REQUEST_LANE0_1,
+ 2, adjust_request);
if (retval)
return retval;
- retval = exynos_dp_read_byte_from_dpcd(dp,
- DP_LANE_ALIGN_STATUS_UPDATED, &link_align);
+ retval = exynos_dp_read_byte_from_dpcd(
+ dp, DP_LANE_ALIGN_STATUS_UPDATED, &link_align);
if (retval)
return retval;
@@ -628,17 +626,18 @@ static int exynos_dp_process_equalizer_training(struct exynos_dp_device *dp)
}
for (lane = 0; lane < lane_count; lane++)
- exynos_dp_set_lane_link_training(dp,
- dp->link_train.training_lane[lane], lane);
+ exynos_dp_set_lane_link_training(
+ dp, dp->link_train.training_lane[lane], lane);
retval = exynos_dp_write_bytes_to_dpcd(dp, DP_TRAINING_LANE0_SET,
- lane_count, dp->link_train.training_lane);
+ lane_count,
+ dp->link_train.training_lane);
return retval;
}
static void exynos_dp_get_max_rx_bandwidth(struct exynos_dp_device *dp,
- u8 *bandwidth)
+ u8 *bandwidth)
{
u8 data;
@@ -651,7 +650,7 @@ static void exynos_dp_get_max_rx_bandwidth(struct exynos_dp_device *dp,
}
static void exynos_dp_get_max_rx_lane_count(struct exynos_dp_device *dp,
- u8 *lane_count)
+ u8 *lane_count)
{
u8 data;
@@ -664,8 +663,8 @@ static void exynos_dp_get_max_rx_lane_count(struct exynos_dp_device *dp,
}
static void exynos_dp_init_training(struct exynos_dp_device *dp,
- enum link_lane_count_type max_lane,
- enum link_rate_type max_rate)
+ enum link_lane_count_type max_lane,
+ enum link_rate_type max_rate)
{
/*
* MACRO_RST must be applied after the PLL_LOCK to avoid
@@ -678,7 +677,7 @@ static void exynos_dp_init_training(struct exynos_dp_device *dp,
exynos_dp_get_max_rx_lane_count(dp, &dp->link_train.lane_count);
if ((dp->link_train.link_rate != LINK_RATE_1_62GBPS) &&
- (dp->link_train.link_rate != LINK_RATE_2_70GBPS)) {
+ (dp->link_train.link_rate != LINK_RATE_2_70GBPS)) {
dev_err(dp->dev, "Rx Max Link Rate is abnormal :%x !\n",
dp->link_train.link_rate);
dp->link_train.link_rate = LINK_RATE_1_62GBPS;
@@ -738,8 +737,7 @@ static int exynos_dp_sw_link_training(struct exynos_dp_device *dp)
}
static int exynos_dp_set_link_train(struct exynos_dp_device *dp,
- u32 count,
- u32 bwtype)
+ u32 count, u32 bwtype)
{
int i;
int retval;
@@ -830,21 +828,19 @@ static void exynos_dp_enable_scramble(struct exynos_dp_device *dp, bool enable)
if (enable) {
exynos_dp_enable_scrambling(dp);
- exynos_dp_read_byte_from_dpcd(dp,
- DP_TRAINING_PATTERN_SET,
- &data);
- exynos_dp_write_byte_to_dpcd(dp,
- DP_TRAINING_PATTERN_SET,
+ exynos_dp_read_byte_from_dpcd(dp, DP_TRAINING_PATTERN_SET,
+ &data);
+ exynos_dp_write_byte_to_dpcd(
+ dp, DP_TRAINING_PATTERN_SET,
(u8)(data & ~DP_LINK_SCRAMBLING_DISABLE));
} else {
exynos_dp_disable_scrambling(dp);
- exynos_dp_read_byte_from_dpcd(dp,
- DP_TRAINING_PATTERN_SET,
- &data);
- exynos_dp_write_byte_to_dpcd(dp,
- DP_TRAINING_PATTERN_SET,
- (u8)(data | DP_LINK_SCRAMBLING_DISABLE));
+ exynos_dp_read_byte_from_dpcd(dp, DP_TRAINING_PATTERN_SET,
+ &data);
+ exynos_dp_write_byte_to_dpcd(
+ dp, DP_TRAINING_PATTERN_SET,
+ (u8)(data | DP_LINK_SCRAMBLING_DISABLE));
}
}
@@ -915,7 +911,7 @@ static void exynos_dp_commit(struct exynos_drm_display *display)
}
ret = exynos_dp_set_link_train(dp, dp->video_info->lane_count,
- dp->video_info->link_rate);
+ dp->video_info->link_rate);
if (ret) {
dev_err(dp->dev, "unable to do link train\n");
return;
@@ -1004,7 +1000,7 @@ static struct drm_connector_helper_funcs exynos_dp_connector_helper_funcs = {
/* returns the number of bridges attached */
static int exynos_drm_attach_lcd_bridge(struct exynos_dp_device *dp,
- struct drm_encoder *encoder)
+ struct drm_encoder *encoder)
{
int ret;
@@ -1020,7 +1016,7 @@ static int exynos_drm_attach_lcd_bridge(struct exynos_dp_device *dp,
}
static int exynos_dp_create_connector(struct exynos_drm_display *display,
- struct drm_encoder *encoder)
+ struct drm_encoder *encoder)
{
struct exynos_dp_device *dp = display_to_dp(display);
struct drm_connector *connector = &dp->connector;
@@ -1038,7 +1034,8 @@ static int exynos_dp_create_connector(struct exynos_drm_display *display,
connector->polled = DRM_CONNECTOR_POLL_HPD;
ret = drm_connector_init(dp->drm_dev, connector,
- &exynos_dp_connector_funcs, DRM_MODE_CONNECTOR_eDP);
+ &exynos_dp_connector_funcs,
+ DRM_MODE_CONNECTOR_eDP);
if (ret) {
DRM_ERROR("Failed to initialize connector with drm\n");
return ret;
@@ -1148,8 +1145,8 @@ static struct video_info *exynos_dp_dt_parse_pdata(struct device *dev)
struct device_node *dp_node = dev->of_node;
struct video_info *dp_video_config;
- dp_video_config = devm_kzalloc(dev,
- sizeof(*dp_video_config), GFP_KERNEL);
+ dp_video_config = devm_kzalloc(dev, sizeof(*dp_video_config),
+ GFP_KERNEL);
if (!dp_video_config)
return ERR_PTR(-ENOMEM);
@@ -1163,37 +1160,37 @@ static struct video_info *exynos_dp_dt_parse_pdata(struct device *dev)
of_property_read_bool(dp_node, "interlaced");
if (of_property_read_u32(dp_node, "samsung,color-space",
- &dp_video_config->color_space)) {
+ &dp_video_config->color_space)) {
dev_err(dev, "failed to get color-space\n");
return ERR_PTR(-EINVAL);
}
if (of_property_read_u32(dp_node, "samsung,dynamic-range",
- &dp_video_config->dynamic_range)) {
+ &dp_video_config->dynamic_range)) {
dev_err(dev, "failed to get dynamic-range\n");
return ERR_PTR(-EINVAL);
}
if (of_property_read_u32(dp_node, "samsung,ycbcr-coeff",
- &dp_video_config->ycbcr_coeff)) {
+ &dp_video_config->ycbcr_coeff)) {
dev_err(dev, "failed to get ycbcr-coeff\n");
return ERR_PTR(-EINVAL);
}
if (of_property_read_u32(dp_node, "samsung,color-depth",
- &dp_video_config->color_depth)) {
+ &dp_video_config->color_depth)) {
dev_err(dev, "failed to get color-depth\n");
return ERR_PTR(-EINVAL);
}
if (of_property_read_u32(dp_node, "samsung,link-rate",
- &dp_video_config->link_rate)) {
+ &dp_video_config->link_rate)) {
dev_err(dev, "failed to get link-rate\n");
return ERR_PTR(-EINVAL);
}
if (of_property_read_u32(dp_node, "samsung,lane-count",
- &dp_video_config->lane_count)) {
+ &dp_video_config->lane_count)) {
dev_err(dev, "failed to get lane-count\n");
return ERR_PTR(-EINVAL);
}
@@ -1206,7 +1203,7 @@ static int exynos_dp_dt_parse_panel(struct exynos_dp_device *dp)
int ret;
ret = of_get_videomode(dp->dev->of_node, &dp->priv.vm,
- OF_USE_NATIVE_MODE);
+ OF_USE_NATIVE_MODE);
if (ret) {
DRM_ERROR("failed: of_get_videomode() : %d\n", ret);
return ret;
@@ -1302,7 +1299,7 @@ static int exynos_dp_bind(struct device *dev, struct device *master, void *data)
exynos_dp_init_dp(dp);
ret = devm_request_irq(&pdev->dev, dp->irq, exynos_dp_irq_handler,
- irq_flags, "exynos-dp", dp);
+ irq_flags, "exynos-dp", dp);
if (ret) {
dev_err(&pdev->dev, "failed to request irq\n");
return ret;
@@ -1315,7 +1312,7 @@ static int exynos_dp_bind(struct device *dev, struct device *master, void *data)
}
static void exynos_dp_unbind(struct device *dev, struct device *master,
- void *data)
+ void *data)
{
struct exynos_dp_device *dp = dev_get_drvdata(dev);
@@ -1334,7 +1331,7 @@ static int exynos_dp_probe(struct platform_device *pdev)
struct exynos_dp_device *dp;
dp = devm_kzalloc(&pdev->dev, sizeof(struct exynos_dp_device),
- GFP_KERNEL);
+ GFP_KERNEL);
if (!dp)
return -ENOMEM;
@@ -1358,8 +1355,9 @@ static int exynos_dp_probe(struct platform_device *pdev)
of_node_put(bridge_node);
if (!dp->bridge)
return -EPROBE_DEFER;
- } else
+ } else {
return -EPROBE_DEFER;
+ }
}
return component_add(&pdev->dev, &exynos_dp_ops);
diff --git a/drivers/gpu/drm/exynos/exynos_dp_core.h b/drivers/gpu/drm/exynos/exynos_dp_core.h
index a4e7996..c321ad5 100644
--- a/drivers/gpu/drm/exynos/exynos_dp_core.h
+++ b/drivers/gpu/drm/exynos/exynos_dp_core.h
@@ -180,8 +180,8 @@ void exynos_dp_config_interrupt(struct exynos_dp_device *dp);
enum pll_status exynos_dp_get_pll_lock_status(struct exynos_dp_device *dp);
void exynos_dp_set_pll_power_down(struct exynos_dp_device *dp, bool enable);
void exynos_dp_set_analog_power_down(struct exynos_dp_device *dp,
- enum analog_power_block block,
- bool enable);
+ enum analog_power_block block,
+ bool enable);
void exynos_dp_init_analog_func(struct exynos_dp_device *dp);
void exynos_dp_init_hpd(struct exynos_dp_device *dp);
enum dp_irq_type exynos_dp_get_irq_type(struct exynos_dp_device *dp);
@@ -192,50 +192,50 @@ int exynos_dp_get_plug_in_status(struct exynos_dp_device *dp);
void exynos_dp_enable_sw_function(struct exynos_dp_device *dp);
int exynos_dp_start_aux_transaction(struct exynos_dp_device *dp);
int exynos_dp_write_byte_to_dpcd(struct exynos_dp_device *dp,
- unsigned int reg_addr,
- unsigned char data);
+ unsigned int reg_addr,
+ unsigned char data);
int exynos_dp_read_byte_from_dpcd(struct exynos_dp_device *dp,
- unsigned int reg_addr,
- unsigned char *data);
+ unsigned int reg_addr,
+ unsigned char *data);
int exynos_dp_write_bytes_to_dpcd(struct exynos_dp_device *dp,
- unsigned int reg_addr,
- unsigned int count,
- unsigned char data[]);
+ unsigned int reg_addr,
+ unsigned int count,
+ unsigned char data[]);
int exynos_dp_read_bytes_from_dpcd(struct exynos_dp_device *dp,
- unsigned int reg_addr,
- unsigned int count,
- unsigned char data[]);
+ unsigned int reg_addr,
+ unsigned int count,
+ unsigned char data[]);
int exynos_dp_select_i2c_device(struct exynos_dp_device *dp,
unsigned int device_addr,
unsigned int reg_addr);
int exynos_dp_read_byte_from_i2c(struct exynos_dp_device *dp,
- unsigned int device_addr,
- unsigned int reg_addr,
- unsigned int *data);
+ unsigned int device_addr,
+ unsigned int reg_addr,
+ unsigned int *data);
int exynos_dp_read_bytes_from_i2c(struct exynos_dp_device *dp,
- unsigned int device_addr,
- unsigned int reg_addr,
- unsigned int count,
- unsigned char edid[]);
+ unsigned int device_addr,
+ unsigned int reg_addr,
+ unsigned int count,
+ unsigned char edid[]);
void exynos_dp_set_link_bandwidth(struct exynos_dp_device *dp, u32 bwtype);
void exynos_dp_get_link_bandwidth(struct exynos_dp_device *dp, u32 *bwtype);
void exynos_dp_set_lane_count(struct exynos_dp_device *dp, u32 count);
void exynos_dp_get_lane_count(struct exynos_dp_device *dp, u32 *count);
void exynos_dp_enable_enhanced_mode(struct exynos_dp_device *dp, bool enable);
void exynos_dp_set_training_pattern(struct exynos_dp_device *dp,
- enum pattern_set pattern);
+ enum pattern_set pattern);
void exynos_dp_set_lane0_pre_emphasis(struct exynos_dp_device *dp, u32 level);
void exynos_dp_set_lane1_pre_emphasis(struct exynos_dp_device *dp, u32 level);
void exynos_dp_set_lane2_pre_emphasis(struct exynos_dp_device *dp, u32 level);
void exynos_dp_set_lane3_pre_emphasis(struct exynos_dp_device *dp, u32 level);
void exynos_dp_set_lane0_link_training(struct exynos_dp_device *dp,
- u32 training_lane);
+ u32 training_lane);
void exynos_dp_set_lane1_link_training(struct exynos_dp_device *dp,
- u32 training_lane);
+ u32 training_lane);
void exynos_dp_set_lane2_link_training(struct exynos_dp_device *dp,
- u32 training_lane);
+ u32 training_lane);
void exynos_dp_set_lane3_link_training(struct exynos_dp_device *dp,
- u32 training_lane);
+ u32 training_lane);
u32 exynos_dp_get_lane0_link_training(struct exynos_dp_device *dp);
u32 exynos_dp_get_lane1_link_training(struct exynos_dp_device *dp);
u32 exynos_dp_get_lane2_link_training(struct exynos_dp_device *dp);
@@ -246,9 +246,8 @@ void exynos_dp_init_video(struct exynos_dp_device *dp);
void exynos_dp_set_video_color_format(struct exynos_dp_device *dp);
int exynos_dp_is_slave_video_stream_clock_on(struct exynos_dp_device *dp);
void exynos_dp_set_video_cr_mn(struct exynos_dp_device *dp,
- enum clock_recovery_m_value_type type,
- u32 m_value,
- u32 n_value);
+ enum clock_recovery_m_value_type type,
+ u32 m_value, u32 n_value);
void exynos_dp_set_video_timing_mode(struct exynos_dp_device *dp, u32 type);
void exynos_dp_enable_video_master(struct exynos_dp_device *dp, bool enable);
void exynos_dp_start_video(struct exynos_dp_device *dp);
diff --git a/drivers/gpu/drm/exynos/exynos_dp_reg.c b/drivers/gpu/drm/exynos/exynos_dp_reg.c
index c1f87a2..9aa483d 100644
--- a/drivers/gpu/drm/exynos/exynos_dp_reg.c
+++ b/drivers/gpu/drm/exynos/exynos_dp_reg.c
@@ -202,8 +202,8 @@ void exynos_dp_set_pll_power_down(struct exynos_dp_device *dp, bool enable)
}
void exynos_dp_set_analog_power_down(struct exynos_dp_device *dp,
- enum analog_power_block block,
- bool enable)
+ enum analog_power_block block,
+ bool enable)
{
u32 reg;
@@ -399,8 +399,8 @@ void exynos_dp_init_aux(struct exynos_dp_device *dp)
exynos_dp_reset_aux(dp);
/* Disable AUX transaction H/W retry */
- reg = AUX_BIT_PERIOD_EXPECTED_DELAY(3) | AUX_HW_RETRY_COUNT_SEL(0)|
- AUX_HW_RETRY_INTERVAL_600_MICROSECONDS;
+ reg = AUX_BIT_PERIOD_EXPECTED_DELAY(3) | AUX_HW_RETRY_COUNT_SEL(0) |
+ AUX_HW_RETRY_INTERVAL_600_MICROSECONDS;
writel(reg, dp->reg_base + EXYNOS_DP_AUX_HW_RETRY_CTL);
/* Receive AUX Channel DEFER commands equal to DEFFER_COUNT*64 */
@@ -483,8 +483,8 @@ int exynos_dp_start_aux_transaction(struct exynos_dp_device *dp)
}
int exynos_dp_write_byte_to_dpcd(struct exynos_dp_device *dp,
- unsigned int reg_addr,
- unsigned char data)
+ unsigned int reg_addr,
+ unsigned char data)
{
u32 reg;
int i;
@@ -519,17 +519,16 @@ int exynos_dp_write_byte_to_dpcd(struct exynos_dp_device *dp,
retval = exynos_dp_start_aux_transaction(dp);
if (retval == 0)
break;
- else
- dev_dbg(dp->dev, "%s: Aux Transaction fail!\n",
- __func__);
+
+ dev_dbg(dp->dev, "%s: Aux Transaction fail!\n", __func__);
}
return retval;
}
int exynos_dp_read_byte_from_dpcd(struct exynos_dp_device *dp,
- unsigned int reg_addr,
- unsigned char *data)
+ unsigned int reg_addr,
+ unsigned char *data)
{
u32 reg;
int i;
@@ -560,9 +559,8 @@ int exynos_dp_read_byte_from_dpcd(struct exynos_dp_device *dp,
retval = exynos_dp_start_aux_transaction(dp);
if (retval == 0)
break;
- else
- dev_dbg(dp->dev, "%s: Aux Transaction fail!\n",
- __func__);
+
+ dev_dbg(dp->dev, "%s: Aux Transaction fail!\n", __func__);
}
/* Read data buffer */
@@ -573,9 +571,9 @@ int exynos_dp_read_byte_from_dpcd(struct exynos_dp_device *dp,
}
int exynos_dp_write_bytes_to_dpcd(struct exynos_dp_device *dp,
- unsigned int reg_addr,
- unsigned int count,
- unsigned char data[])
+ unsigned int reg_addr,
+ unsigned int count,
+ unsigned char data[])
{
u32 reg;
unsigned int start_offset;
@@ -625,9 +623,9 @@ int exynos_dp_write_bytes_to_dpcd(struct exynos_dp_device *dp,
retval = exynos_dp_start_aux_transaction(dp);
if (retval == 0)
break;
- else
- dev_dbg(dp->dev, "%s: Aux Transaction fail!\n",
- __func__);
+
+ dev_dbg(dp->dev, "%s: Aux Transaction fail!\n",
+ __func__);
}
start_offset += cur_data_count;
@@ -637,9 +635,9 @@ int exynos_dp_write_bytes_to_dpcd(struct exynos_dp_device *dp,
}
int exynos_dp_read_bytes_from_dpcd(struct exynos_dp_device *dp,
- unsigned int reg_addr,
- unsigned int count,
- unsigned char data[])
+ unsigned int reg_addr,
+ unsigned int count,
+ unsigned char data[])
{
u32 reg;
unsigned int start_offset;
@@ -683,9 +681,9 @@ int exynos_dp_read_bytes_from_dpcd(struct exynos_dp_device *dp,
retval = exynos_dp_start_aux_transaction(dp);
if (retval == 0)
break;
- else
- dev_dbg(dp->dev, "%s: Aux Transaction fail!\n",
- __func__);
+
+ dev_dbg(dp->dev, "%s: Aux Transaction fail!\n",
+ __func__);
}
for (cur_data_idx = 0; cur_data_idx < cur_data_count;
@@ -736,9 +734,9 @@ int exynos_dp_select_i2c_device(struct exynos_dp_device *dp,
}
int exynos_dp_read_byte_from_i2c(struct exynos_dp_device *dp,
- unsigned int device_addr,
- unsigned int reg_addr,
- unsigned int *data)
+ unsigned int device_addr,
+ unsigned int reg_addr,
+ unsigned int *data)
{
u32 reg;
int i;
@@ -767,9 +765,8 @@ int exynos_dp_read_byte_from_i2c(struct exynos_dp_device *dp,
retval = exynos_dp_start_aux_transaction(dp);
if (retval == 0)
break;
- else
- dev_dbg(dp->dev, "%s: Aux Transaction fail!\n",
- __func__);
+
+ dev_dbg(dp->dev, "%s: Aux Transaction fail!\n", __func__);
}
/* Read data */
@@ -780,10 +777,10 @@ int exynos_dp_read_byte_from_i2c(struct exynos_dp_device *dp,
}
int exynos_dp_read_bytes_from_i2c(struct exynos_dp_device *dp,
- unsigned int device_addr,
- unsigned int reg_addr,
- unsigned int count,
- unsigned char edid[])
+ unsigned int device_addr,
+ unsigned int reg_addr,
+ unsigned int count,
+ unsigned char edid[])
{
u32 reg;
unsigned int i, j;
@@ -807,8 +804,8 @@ int exynos_dp_read_bytes_from_i2c(struct exynos_dp_device *dp,
* request without sending address
*/
if (!defer)
- retval = exynos_dp_select_i2c_device(dp,
- device_addr, reg_addr + i);
+ retval = exynos_dp_select_i2c_device(
+ dp, device_addr, reg_addr + i);
else
defer = 0;
@@ -828,15 +825,14 @@ int exynos_dp_read_bytes_from_i2c(struct exynos_dp_device *dp,
retval = exynos_dp_start_aux_transaction(dp);
if (retval == 0)
break;
- else
- dev_dbg(dp->dev,
- "%s: Aux Transaction fail!\n",
- __func__);
+
+ dev_dbg(dp->dev, "%s: Aux Transaction fail!\n",
+ __func__);
}
/* Check if Rx sends defer */
reg = readl(dp->reg_base + EXYNOS_DP_AUX_RX_COMM);
if (reg == AUX_RX_COMM_AUX_DEFER ||
- reg == AUX_RX_COMM_I2C_DEFER) {
+ reg == AUX_RX_COMM_I2C_DEFER) {
dev_err(dp->dev, "Defer: %d\n\n", reg);
defer = 1;
}
@@ -901,7 +897,7 @@ void exynos_dp_enable_enhanced_mode(struct exynos_dp_device *dp, bool enable)
}
void exynos_dp_set_training_pattern(struct exynos_dp_device *dp,
- enum pattern_set pattern)
+ enum pattern_set pattern)
{
u32 reg;
@@ -974,7 +970,7 @@ void exynos_dp_set_lane3_pre_emphasis(struct exynos_dp_device *dp, u32 level)
}
void exynos_dp_set_lane0_link_training(struct exynos_dp_device *dp,
- u32 training_lane)
+ u32 training_lane)
{
u32 reg;
@@ -983,7 +979,7 @@ void exynos_dp_set_lane0_link_training(struct exynos_dp_device *dp,
}
void exynos_dp_set_lane1_link_training(struct exynos_dp_device *dp,
- u32 training_lane)
+ u32 training_lane)
{
u32 reg;
@@ -992,7 +988,7 @@ void exynos_dp_set_lane1_link_training(struct exynos_dp_device *dp,
}
void exynos_dp_set_lane2_link_training(struct exynos_dp_device *dp,
- u32 training_lane)
+ u32 training_lane)
{
u32 reg;
@@ -1001,7 +997,7 @@ void exynos_dp_set_lane2_link_training(struct exynos_dp_device *dp,
}
void exynos_dp_set_lane3_link_training(struct exynos_dp_device *dp,
- u32 training_lane)
+ u32 training_lane)
{
u32 reg;
@@ -1125,9 +1121,9 @@ int exynos_dp_is_slave_video_stream_clock_on(struct exynos_dp_device *dp)
}
void exynos_dp_set_video_cr_mn(struct exynos_dp_device *dp,
- enum clock_recovery_m_value_type type,
- u32 m_value,
- u32 n_value)
+ enum clock_recovery_m_value_type type,
+ u32 m_value,
+ u32 n_value)
{
u32 reg;
@@ -1221,7 +1217,7 @@ void exynos_dp_config_video_slave_mode(struct exynos_dp_device *dp)
u32 reg;
reg = readl(dp->reg_base + EXYNOS_DP_FUNC_EN_1);
- reg &= ~(MASTER_VID_FUNC_EN_N|SLAVE_VID_FUNC_EN_N);
+ reg &= ~(MASTER_VID_FUNC_EN_N | SLAVE_VID_FUNC_EN_N);
reg |= MASTER_VID_FUNC_EN_N;
writel(reg, dp->reg_base + EXYNOS_DP_FUNC_EN_1);
--
2.1.2
^ permalink raw reply related [flat|nested] 18+ messages in thread
* [RFC PATCH 2/8] drm: exynos/dp: convert to drm bridge mode
2015-08-06 13:49 [RFC PATCH 0/8] Add Analogix Core Display Port Driver Yakir Yang
2015-08-06 13:58 ` [RFC PATCH 1/8] drm: exynos/dp: fix code style Yakir Yang
2015-08-06 14:04 ` Yakir Yang
@ 2015-08-06 14:07 ` Yakir Yang
2015-08-06 14:19 ` Jingoo Han
2015-08-06 14:19 ` [RFC PATCH 4/8] drm: rockchip/dp: add rockchip platform dp driver Yakir Yang
` (6 subsequent siblings)
9 siblings, 1 reply; 18+ messages in thread
From: Yakir Yang @ 2015-08-06 14:07 UTC (permalink / raw)
To: linux-arm-kernel
In order to move exynos dp code to bridge directory,
we need to convert driver drm bridge mode first. As
dp driver already have a ptn3460 bridge, so we need
to move ptn bridge to the next bridge of dp bridge.
Signed-off-by: Yakir Yang <ykk@rock-chips.com>
---
drivers/gpu/drm/exynos/exynos_dp_core.c | 196 ++++++++++++++++++++------------
drivers/gpu/drm/exynos/exynos_dp_core.h | 2 +
2 files changed, 126 insertions(+), 72 deletions(-)
diff --git a/drivers/gpu/drm/exynos/exynos_dp_core.c b/drivers/gpu/drm/exynos/exynos_dp_core.c
index a8097a4..aa99e23 100644
--- a/drivers/gpu/drm/exynos/exynos_dp_core.c
+++ b/drivers/gpu/drm/exynos/exynos_dp_core.c
@@ -3,6 +3,7 @@
*
* Copyright (C) 2012 Samsung Electronics Co., Ltd.
* Author: Jingoo Han <jg1.han@samsung.com>
+ * Yakir Yang <ykk@rock-chips.com>
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the
@@ -998,59 +999,6 @@ static struct drm_connector_helper_funcs exynos_dp_connector_helper_funcs = {
.best_encoder = exynos_dp_best_encoder,
};
-/* returns the number of bridges attached */
-static int exynos_drm_attach_lcd_bridge(struct exynos_dp_device *dp,
- struct drm_encoder *encoder)
-{
- int ret;
-
- encoder->bridge = dp->bridge;
- dp->bridge->encoder = encoder;
- ret = drm_bridge_attach(encoder->dev, dp->bridge);
- if (ret) {
- DRM_ERROR("Failed to attach bridge to drm\n");
- return ret;
- }
-
- return 0;
-}
-
-static int exynos_dp_create_connector(struct exynos_drm_display *display,
- struct drm_encoder *encoder)
-{
- struct exynos_dp_device *dp = display_to_dp(display);
- struct drm_connector *connector = &dp->connector;
- int ret;
-
- dp->encoder = encoder;
-
- /* Pre-empt DP connector creation if there's a bridge */
- if (dp->bridge) {
- ret = exynos_drm_attach_lcd_bridge(dp, encoder);
- if (!ret)
- return 0;
- }
-
- connector->polled = DRM_CONNECTOR_POLL_HPD;
-
- ret = drm_connector_init(dp->drm_dev, connector,
- &exynos_dp_connector_funcs,
- DRM_MODE_CONNECTOR_eDP);
- if (ret) {
- DRM_ERROR("Failed to initialize connector with drm\n");
- return ret;
- }
-
- drm_connector_helper_add(connector, &exynos_dp_connector_helper_funcs);
- drm_connector_register(connector);
- drm_mode_connector_attach_encoder(connector, encoder);
-
- if (dp->panel)
- ret = drm_panel_attach(dp->panel, &dp->connector);
-
- return ret;
-}
-
static void exynos_dp_phy_init(struct exynos_dp_device *dp)
{
if (dp->phy)
@@ -1115,23 +1063,126 @@ static void exynos_dp_poweroff(struct exynos_dp_device *dp)
}
}
-static void exynos_dp_dpms(struct exynos_drm_display *display, int mode)
+/* returns the number of bridges attached */
+static int exynos_drm_attach_lcd_bridge(struct exynos_dp_device *dp,
+ struct drm_encoder *encoder)
+{
+ int ret;
+
+ dp->bridge->next = dp->ptn_bridge;
+ dp->bridge->encoder = encoder;
+ ret = drm_bridge_attach(encoder->dev, dp->bridge);
+ if (ret) {
+ DRM_ERROR("Failed to attach ptn bridge to drm\n");
+ return ret;
+ }
+
+ return 0;
+}
+
+static int exynos_dp_bridge_attach(struct drm_bridge *bridge)
+{
+
+ struct exynos_dp_device *dp = bridge->driver_private;
+ struct drm_encoder *encoder = dp->encoder;
+ struct drm_connector *connector = &dp->connector;
+ int ret;
+
+ if (!bridge->encoder) {
+ DRM_ERROR("Parent encoder object not found");
+ return -ENODEV;
+ }
+
+ encoder->bridge = bridge;
+
+ /* Pre-empt DP connector creation if there's a bridge */
+ if (dp->ptn_bridge) {
+ ret = exynos_drm_attach_lcd_bridge(dp, encoder);
+ if (ret)
+ return -ENODEV;
+ }
+
+ connector->polled = DRM_CONNECTOR_POLL_HPD;
+
+ ret = drm_connector_init(dp->drm_dev, connector,
+ &exynos_dp_connector_funcs, DRM_MODE_CONNECTOR_eDP);
+ if (ret) {
+ DRM_ERROR("Failed to initialize connector with drm\n");
+ return ret;
+ }
+
+ drm_connector_helper_add(connector, &exynos_dp_connector_helper_funcs);
+ drm_connector_register(connector);
+ drm_mode_connector_attach_encoder(connector, encoder);
+
+ if (dp->panel)
+ ret = drm_panel_attach(dp->panel, &dp->connector);
+
+ return ret;
+}
+
+static void exynos_dp_bridge_nop(struct drm_bridge *bridge)
+{
+ /* do nothing */
+}
+
+static void exynos_dp_bridge_enable(struct drm_bridge *bridge)
+{
+ struct exynos_dp_device *dp = bridge->driver_private;
+
+ exynos_dp_poweron(dp);
+ dp->dpms_mode = DRM_MODE_DPMS_ON;
+}
+
+static void exynos_dp_bridge_disable(struct drm_bridge *bridge)
+{
+ struct exynos_dp_device *dp = bridge->driver_private;
+
+ exynos_dp_poweroff(dp);
+ dp->dpms_mode = DRM_MODE_DPMS_OFF;
+}
+
+static const struct drm_bridge_funcs exynos_dp_bridge_funcs = {
+ .enable = exynos_dp_bridge_enable,
+ .disable = exynos_dp_bridge_disable,
+ .pre_enable = exynos_dp_bridge_nop,
+ .post_disable = exynos_dp_bridge_nop,
+ .attach = exynos_dp_bridge_attach,
+};
+
+static int exynos_dp_create_connector(struct exynos_drm_display *display,
+ struct drm_encoder *encoder)
{
struct exynos_dp_device *dp = display_to_dp(display);
+ struct drm_device *drm_dev = dp->drm_dev;
+ struct drm_bridge *bridge;
+ int ret;
- switch (mode) {
- case DRM_MODE_DPMS_ON:
- exynos_dp_poweron(dp);
- break;
- case DRM_MODE_DPMS_STANDBY:
- case DRM_MODE_DPMS_SUSPEND:
- case DRM_MODE_DPMS_OFF:
- exynos_dp_poweroff(dp);
- break;
- default:
- break;
+ bridge = devm_kzalloc(drm_dev->dev, sizeof(*bridge), GFP_KERNEL);
+ if (!bridge) {
+ DRM_ERROR("failed to allocate for drm bridge\n");
+ return -ENOMEM;
}
- dp->dpms_mode = mode;
+
+ dp->bridge = bridge;
+ dp->encoder = encoder;
+
+ bridge->driver_private = dp;
+ bridge->encoder = dp->encoder;
+ bridge->funcs = &exynos_dp_bridge_funcs;
+
+ ret = drm_bridge_attach(drm_dev, bridge);
+ if (ret) {
+ DRM_ERROR("failed to attach drm bridge\n");
+ return -EINVAL;
+ }
+
+ return 0;
+}
+
+static void exynos_dp_dpms(struct exynos_drm_display *display, int mode)
+{
+ /* do nothing */
}
static struct exynos_drm_display_ops exynos_dp_display_ops = {
@@ -1243,7 +1294,7 @@ static int exynos_dp_bind(struct device *dev, struct device *master, void *data)
}
}
- if (!dp->panel && !dp->bridge) {
+ if (!dp->panel && !dp->ptn_bridge) {
ret = exynos_dp_dt_parse_panel(dp);
if (ret)
return ret;
@@ -1316,7 +1367,7 @@ static void exynos_dp_unbind(struct device *dev, struct device *master,
{
struct exynos_dp_device *dp = dev_get_drvdata(dev);
- exynos_dp_dpms(&dp->display, DRM_MODE_DPMS_OFF);
+ exynos_dp_bridge_disable(dp->bridge);
}
static const struct component_ops exynos_dp_ops = {
@@ -1351,9 +1402,9 @@ static int exynos_dp_probe(struct platform_device *pdev)
if (endpoint) {
bridge_node = of_graph_get_remote_port_parent(endpoint);
if (bridge_node) {
- dp->bridge = of_drm_find_bridge(bridge_node);
+ dp->ptn_bridge = of_drm_find_bridge(bridge_node);
of_node_put(bridge_node);
- if (!dp->bridge)
+ if (!dp->ptn_bridge)
return -EPROBE_DEFER;
} else {
return -EPROBE_DEFER;
@@ -1375,7 +1426,7 @@ static int exynos_dp_suspend(struct device *dev)
{
struct exynos_dp_device *dp = dev_get_drvdata(dev);
- exynos_dp_dpms(&dp->display, DRM_MODE_DPMS_OFF);
+ exynos_dp_bridge_disable(dp->bridge);
return 0;
}
@@ -1383,7 +1434,7 @@ static int exynos_dp_resume(struct device *dev)
{
struct exynos_dp_device *dp = dev_get_drvdata(dev);
- exynos_dp_dpms(&dp->display, DRM_MODE_DPMS_ON);
+ exynos_dp_bridge_enable(dp->bridge);
return 0;
}
#endif
@@ -1410,5 +1461,6 @@ struct platform_driver dp_driver = {
};
MODULE_AUTHOR("Jingoo Han <jg1.han@samsung.com>");
+MODULE_AUTHOR("Yakir Yang <ykk@rock-chips.com>");
MODULE_DESCRIPTION("Samsung SoC DP Driver");
MODULE_LICENSE("GPL v2");
diff --git a/drivers/gpu/drm/exynos/exynos_dp_core.h b/drivers/gpu/drm/exynos/exynos_dp_core.h
index c321ad5..f2584b8 100644
--- a/drivers/gpu/drm/exynos/exynos_dp_core.h
+++ b/drivers/gpu/drm/exynos/exynos_dp_core.h
@@ -3,6 +3,7 @@
*
* Copyright (C) 2012 Samsung Electronics Co., Ltd.
* Author: Jingoo Han <jg1.han@samsung.com>
+ * Yakir Yang <ykk@rock-chips.com>
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the
@@ -154,6 +155,7 @@ struct exynos_dp_device {
struct drm_encoder *encoder;
struct drm_panel *panel;
struct drm_bridge *bridge;
+ struct drm_bridge *ptn_bridge;
struct clk *clock;
unsigned int irq;
void __iomem *reg_base;
--
2.1.2
^ permalink raw reply related [flat|nested] 18+ messages in thread
* [RFC PATCH 2/8] drm: exynos/dp: convert to drm bridge mode
2015-08-06 14:07 ` [RFC PATCH 2/8] drm: exynos/dp: convert to drm bridge mode Yakir Yang
@ 2015-08-06 14:19 ` Jingoo Han
2015-08-06 14:29 ` Yakir Yang
0 siblings, 1 reply; 18+ messages in thread
From: Jingoo Han @ 2015-08-06 14:19 UTC (permalink / raw)
To: linux-arm-kernel
On Thursday, August 06, 2015 11:07 PM, Yakir Yang wrote:
>
> In order to move exynos dp code to bridge directory,
> we need to convert driver drm bridge mode first. As
> dp driver already have a ptn3460 bridge, so we need
> to move ptn bridge to the next bridge of dp bridge.
>
> Signed-off-by: Yakir Yang <ykk@rock-chips.com>
> ---
> drivers/gpu/drm/exynos/exynos_dp_core.c | 196 ++++++++++++++++++++------------
> drivers/gpu/drm/exynos/exynos_dp_core.h | 2 +
> 2 files changed, 126 insertions(+), 72 deletions(-)
>
> diff --git a/drivers/gpu/drm/exynos/exynos_dp_core.c b/drivers/gpu/drm/exynos/exynos_dp_core.c
> index a8097a4..aa99e23 100644
> --- a/drivers/gpu/drm/exynos/exynos_dp_core.c
> +++ b/drivers/gpu/drm/exynos/exynos_dp_core.c
> @@ -3,6 +3,7 @@
> *
> * Copyright (C) 2012 Samsung Electronics Co., Ltd.
> * Author: Jingoo Han <jg1.han@samsung.com>
> + * Yakir Yang <ykk@rock-chips.com>
Please don't add this.
You just fixed some parts of this code. I don't find the reason
why you have to be added to author for this file.
If you want the title for an author, please send the patch
for a new IP, instead of modifying the exiting codes.
> *
> * This program is free software; you can redistribute it and/or modify it
> * under the terms of the GNU General Public License as published by the
> @@ -998,59 +999,6 @@ static struct drm_connector_helper_funcs exynos_dp_connector_helper_funcs = {
> .best_encoder = exynos_dp_best_encoder,
> };
>
> -/* returns the number of bridges attached */
> -static int exynos_drm_attach_lcd_bridge(struct exynos_dp_device *dp,
> - struct drm_encoder *encoder)
> -{
> - int ret;
> -
> - encoder->bridge = dp->bridge;
> - dp->bridge->encoder = encoder;
> - ret = drm_bridge_attach(encoder->dev, dp->bridge);
> - if (ret) {
> - DRM_ERROR("Failed to attach bridge to drm\n");
> - return ret;
> - }
> -
> - return 0;
> -}
> -
> -static int exynos_dp_create_connector(struct exynos_drm_display *display,
> - struct drm_encoder *encoder)
> -{
> - struct exynos_dp_device *dp = display_to_dp(display);
> - struct drm_connector *connector = &dp->connector;
> - int ret;
> -
> - dp->encoder = encoder;
> -
> - /* Pre-empt DP connector creation if there's a bridge */
> - if (dp->bridge) {
> - ret = exynos_drm_attach_lcd_bridge(dp, encoder);
> - if (!ret)
> - return 0;
> - }
> -
> - connector->polled = DRM_CONNECTOR_POLL_HPD;
> -
> - ret = drm_connector_init(dp->drm_dev, connector,
> - &exynos_dp_connector_funcs,
> - DRM_MODE_CONNECTOR_eDP);
> - if (ret) {
> - DRM_ERROR("Failed to initialize connector with drm\n");
> - return ret;
> - }
> -
> - drm_connector_helper_add(connector, &exynos_dp_connector_helper_funcs);
> - drm_connector_register(connector);
> - drm_mode_connector_attach_encoder(connector, encoder);
> -
> - if (dp->panel)
> - ret = drm_panel_attach(dp->panel, &dp->connector);
> -
> - return ret;
> -}
> -
> static void exynos_dp_phy_init(struct exynos_dp_device *dp)
> {
> if (dp->phy)
> @@ -1115,23 +1063,126 @@ static void exynos_dp_poweroff(struct exynos_dp_device *dp)
> }
> }
>
> -static void exynos_dp_dpms(struct exynos_drm_display *display, int mode)
> +/* returns the number of bridges attached */
> +static int exynos_drm_attach_lcd_bridge(struct exynos_dp_device *dp,
> + struct drm_encoder *encoder)
> +{
> + int ret;
> +
> + dp->bridge->next = dp->ptn_bridge;
> + dp->bridge->encoder = encoder;
> + ret = drm_bridge_attach(encoder->dev, dp->bridge);
> + if (ret) {
> + DRM_ERROR("Failed to attach ptn bridge to drm\n");
> + return ret;
> + }
> +
> + return 0;
> +}
> +
> +static int exynos_dp_bridge_attach(struct drm_bridge *bridge)
> +{
> +
> + struct exynos_dp_device *dp = bridge->driver_private;
> + struct drm_encoder *encoder = dp->encoder;
> + struct drm_connector *connector = &dp->connector;
> + int ret;
> +
> + if (!bridge->encoder) {
> + DRM_ERROR("Parent encoder object not found");
> + return -ENODEV;
> + }
> +
> + encoder->bridge = bridge;
> +
> + /* Pre-empt DP connector creation if there's a bridge */
> + if (dp->ptn_bridge) {
> + ret = exynos_drm_attach_lcd_bridge(dp, encoder);
> + if (ret)
> + return -ENODEV;
> + }
> +
> + connector->polled = DRM_CONNECTOR_POLL_HPD;
> +
> + ret = drm_connector_init(dp->drm_dev, connector,
> + &exynos_dp_connector_funcs, DRM_MODE_CONNECTOR_eDP);
> + if (ret) {
> + DRM_ERROR("Failed to initialize connector with drm\n");
> + return ret;
> + }
> +
> + drm_connector_helper_add(connector, &exynos_dp_connector_helper_funcs);
> + drm_connector_register(connector);
> + drm_mode_connector_attach_encoder(connector, encoder);
> +
> + if (dp->panel)
> + ret = drm_panel_attach(dp->panel, &dp->connector);
> +
> + return ret;
> +}
> +
> +static void exynos_dp_bridge_nop(struct drm_bridge *bridge)
> +{
> + /* do nothing */
> +}
> +
> +static void exynos_dp_bridge_enable(struct drm_bridge *bridge)
> +{
> + struct exynos_dp_device *dp = bridge->driver_private;
> +
> + exynos_dp_poweron(dp);
> + dp->dpms_mode = DRM_MODE_DPMS_ON;
> +}
> +
> +static void exynos_dp_bridge_disable(struct drm_bridge *bridge)
> +{
> + struct exynos_dp_device *dp = bridge->driver_private;
> +
> + exynos_dp_poweroff(dp);
> + dp->dpms_mode = DRM_MODE_DPMS_OFF;
> +}
> +
> +static const struct drm_bridge_funcs exynos_dp_bridge_funcs = {
> + .enable = exynos_dp_bridge_enable,
> + .disable = exynos_dp_bridge_disable,
> + .pre_enable = exynos_dp_bridge_nop,
> + .post_disable = exynos_dp_bridge_nop,
> + .attach = exynos_dp_bridge_attach,
> +};
> +
> +static int exynos_dp_create_connector(struct exynos_drm_display *display,
> + struct drm_encoder *encoder)
> {
> struct exynos_dp_device *dp = display_to_dp(display);
> + struct drm_device *drm_dev = dp->drm_dev;
> + struct drm_bridge *bridge;
> + int ret;
>
> - switch (mode) {
> - case DRM_MODE_DPMS_ON:
> - exynos_dp_poweron(dp);
> - break;
> - case DRM_MODE_DPMS_STANDBY:
> - case DRM_MODE_DPMS_SUSPEND:
> - case DRM_MODE_DPMS_OFF:
> - exynos_dp_poweroff(dp);
> - break;
> - default:
> - break;
> + bridge = devm_kzalloc(drm_dev->dev, sizeof(*bridge), GFP_KERNEL);
> + if (!bridge) {
> + DRM_ERROR("failed to allocate for drm bridge\n");
> + return -ENOMEM;
> }
> - dp->dpms_mode = mode;
> +
> + dp->bridge = bridge;
> + dp->encoder = encoder;
> +
> + bridge->driver_private = dp;
> + bridge->encoder = dp->encoder;
> + bridge->funcs = &exynos_dp_bridge_funcs;
> +
> + ret = drm_bridge_attach(drm_dev, bridge);
> + if (ret) {
> + DRM_ERROR("failed to attach drm bridge\n");
> + return -EINVAL;
> + }
> +
> + return 0;
> +}
> +
> +static void exynos_dp_dpms(struct exynos_drm_display *display, int mode)
> +{
> + /* do nothing */
> }
>
> static struct exynos_drm_display_ops exynos_dp_display_ops = {
> @@ -1243,7 +1294,7 @@ static int exynos_dp_bind(struct device *dev, struct device *master, void *data)
> }
> }
>
> - if (!dp->panel && !dp->bridge) {
> + if (!dp->panel && !dp->ptn_bridge) {
> ret = exynos_dp_dt_parse_panel(dp);
> if (ret)
> return ret;
> @@ -1316,7 +1367,7 @@ static void exynos_dp_unbind(struct device *dev, struct device *master,
> {
> struct exynos_dp_device *dp = dev_get_drvdata(dev);
>
> - exynos_dp_dpms(&dp->display, DRM_MODE_DPMS_OFF);
> + exynos_dp_bridge_disable(dp->bridge);
> }
>
> static const struct component_ops exynos_dp_ops = {
> @@ -1351,9 +1402,9 @@ static int exynos_dp_probe(struct platform_device *pdev)
> if (endpoint) {
> bridge_node = of_graph_get_remote_port_parent(endpoint);
> if (bridge_node) {
> - dp->bridge = of_drm_find_bridge(bridge_node);
> + dp->ptn_bridge = of_drm_find_bridge(bridge_node);
> of_node_put(bridge_node);
> - if (!dp->bridge)
> + if (!dp->ptn_bridge)
> return -EPROBE_DEFER;
> } else {
> return -EPROBE_DEFER;
> @@ -1375,7 +1426,7 @@ static int exynos_dp_suspend(struct device *dev)
> {
> struct exynos_dp_device *dp = dev_get_drvdata(dev);
>
> - exynos_dp_dpms(&dp->display, DRM_MODE_DPMS_OFF);
> + exynos_dp_bridge_disable(dp->bridge);
> return 0;
> }
>
> @@ -1383,7 +1434,7 @@ static int exynos_dp_resume(struct device *dev)
> {
> struct exynos_dp_device *dp = dev_get_drvdata(dev);
>
> - exynos_dp_dpms(&dp->display, DRM_MODE_DPMS_ON);
> + exynos_dp_bridge_enable(dp->bridge);
> return 0;
> }
> #endif
> @@ -1410,5 +1461,6 @@ struct platform_driver dp_driver = {
> };
>
> MODULE_AUTHOR("Jingoo Han <jg1.han@samsung.com>");
> +MODULE_AUTHOR("Yakir Yang <ykk@rock-chips.com>");
The same as above.
> MODULE_DESCRIPTION("Samsung SoC DP Driver");
> MODULE_LICENSE("GPL v2");
> diff --git a/drivers/gpu/drm/exynos/exynos_dp_core.h b/drivers/gpu/drm/exynos/exynos_dp_core.h
> index c321ad5..f2584b8 100644
> --- a/drivers/gpu/drm/exynos/exynos_dp_core.h
> +++ b/drivers/gpu/drm/exynos/exynos_dp_core.h
> @@ -3,6 +3,7 @@
> *
> * Copyright (C) 2012 Samsung Electronics Co., Ltd.
> * Author: Jingoo Han <jg1.han@samsung.com>
> + * Yakir Yang <ykk@rock-chips.com>
The same as above.
Here, you just added 1 line. If we add someone to author
in this way, a lot of people should be added to author.
Best regards,
Jingoo Han
> *
> * This program is free software; you can redistribute it and/or modify it
> * under the terms of the GNU General Public License as published by the
> @@ -154,6 +155,7 @@ struct exynos_dp_device {
> struct drm_encoder *encoder;
> struct drm_panel *panel;
> struct drm_bridge *bridge;
> + struct drm_bridge *ptn_bridge;
> struct clk *clock;
> unsigned int irq;
> void __iomem *reg_base;
> --
> 2.1.2
^ permalink raw reply [flat|nested] 18+ messages in thread
* [RFC PATCH 4/8] drm: rockchip/dp: add rockchip platform dp driver
2015-08-06 13:49 [RFC PATCH 0/8] Add Analogix Core Display Port Driver Yakir Yang
` (2 preceding siblings ...)
2015-08-06 14:07 ` [RFC PATCH 2/8] drm: exynos/dp: convert to drm bridge mode Yakir Yang
@ 2015-08-06 14:19 ` Yakir Yang
2015-08-06 14:19 ` [RFC PATCH 5/8] drm: bridge/analogix_dp: add platform device type support Yakir Yang
` (5 subsequent siblings)
9 siblings, 0 replies; 18+ messages in thread
From: Yakir Yang @ 2015-08-06 14:19 UTC (permalink / raw)
To: linux-arm-kernel
Rockchip have three clocks for dp controller, we leave pclk_edp
to analogix_dp driver control, and keep the sclk_edp_24m and
sclk_edp in platform driver.
Signed-off-by: Yakir Yang <ykk@rock-chips.com>
---
drivers/gpu/drm/rockchip/Kconfig | 10 +
drivers/gpu/drm/rockchip/Makefile | 1 +
drivers/gpu/drm/rockchip/analogix_dp-rockchip.c | 419 ++++++++++++++++++++++++
3 files changed, 430 insertions(+)
create mode 100644 drivers/gpu/drm/rockchip/analogix_dp-rockchip.c
diff --git a/drivers/gpu/drm/rockchip/Kconfig b/drivers/gpu/drm/rockchip/Kconfig
index 35215f6..096ed77 100644
--- a/drivers/gpu/drm/rockchip/Kconfig
+++ b/drivers/gpu/drm/rockchip/Kconfig
@@ -25,3 +25,13 @@ config ROCKCHIP_DW_HDMI
for the Synopsys DesignWare HDMI driver. If you want to
enable HDMI on RK3288 based SoC, you should selet this
option.
+
+
+config ROCKCHIP_ANALOGIX_DP
+ tristate "Rockchip specific extensions for Analogix DP driver"
+ depends on DRM_ROCKCHIP
+ select DRM_ANALOGIX_DP
+ help
+ This selects support for Rockchip SoC specific extensions
+ for the Analogix Core DP driver. If you want to enable DP
+ on RK3288 based SoC, you should selet this option.
diff --git a/drivers/gpu/drm/rockchip/Makefile b/drivers/gpu/drm/rockchip/Makefile
index f3d8a19..8ad01fb 100644
--- a/drivers/gpu/drm/rockchip/Makefile
+++ b/drivers/gpu/drm/rockchip/Makefile
@@ -6,5 +6,6 @@ rockchipdrm-y := rockchip_drm_drv.o rockchip_drm_fb.o rockchip_drm_fbdev.o \
rockchip_drm_gem.o
obj-$(CONFIG_ROCKCHIP_DW_HDMI) += dw_hdmi-rockchip.o
+obj-$(CONFIG_ROCKCHIP_ANALOGIX_DP) += analogix_dp-rockchip.o
obj-$(CONFIG_DRM_ROCKCHIP) += rockchipdrm.o rockchip_drm_vop.o
diff --git a/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c b/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c
new file mode 100644
index 0000000..804048c
--- /dev/null
+++ b/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c
@@ -0,0 +1,419 @@
+/*
+ * Rockchip SoC DP (Display Port) interface driver.
+ *
+ * Copyright (C) Fuzhou Rockchip Electronics Co., Ltd.
+ * Author: Andy Yan <andy.yan@rock-chips.com>
+ * Jeff Chen <jeff.chen@rock-chips.com>
+ * Yakir Yang <ykk@rock-chips.com>
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2 of the License, or (at your
+ * option) any later version.
+ */
+#include <drm/drmP.h>
+#include <drm/drm_crtc_helper.h>
+#include <drm/drm_panel.h>
+#include <drm/drm_of.h>
+#include <drm/drm_dp_helper.h>
+
+#include <linux/component.h>
+#include <linux/clk.h>
+#include <linux/mfd/syscon.h>
+#include <linux/regmap.h>
+#include <linux/reset.h>
+
+#include <video/of_videomode.h>
+#include <video/videomode.h>
+
+#include <drm/bridge/analogix_dp.h>
+
+#include "rockchip_drm_drv.h"
+#include "rockchip_drm_vop.h"
+
+#define encoder_to_dp(c) \
+ container_of(c, struct rockchip_dp_device, encoder)
+
+#define plat_data_to_dp(pd) \
+ container_of(pd, struct rockchip_dp_device, plat_data)
+
+/* dp grf register offset */
+#define DP_VOP_SEL 0x025c /* grf_soc_con6 */
+#define DP_REF_CLK_SEL 0x0274 /* grf_soc_con12 */
+
+#define GRF_DP_REF_CLK_SEL_INTER BIT(4)
+#define DP_SEL_VOP_LIT BIT(5)
+
+struct rockchip_dp_device {
+ struct drm_device *drm_dev;
+ struct device *dev;
+ struct drm_encoder encoder;
+ struct drm_display_mode mode;
+
+ struct clk *clk_dp;
+ struct clk *clk_24m_parent;
+ struct clk *clk_24m;
+ struct regmap *grf;
+ struct reset_control *rst;
+
+ struct analogix_dp_plat_data plat_data;
+};
+
+static int rockchip_dp_clk_enable(struct rockchip_dp_device *dp)
+{
+ int ret = 0;
+
+ ret = clk_prepare_enable(dp->clk_dp);
+ if (ret < 0) {
+ dev_err(dp->dev, "cannot enable clk_dp %d\n", ret);
+ goto err_clk_dp;
+ }
+
+ ret = clk_set_rate(dp->clk_24m, 24000000);
+ if (ret < 0) {
+ dev_err(dp->dev, "cannot set dp clk_24m %d\n",
+ ret);
+ goto err_clk_24m;
+ }
+
+ ret = clk_prepare_enable(dp->clk_24m);
+ if (ret < 0) {
+ dev_err(dp->dev, "cannot enable dp clk_24m %d\n",
+ ret);
+ goto err_clk_24m;
+ }
+
+ return 0;
+
+err_clk_24m:
+ clk_disable_unprepare(dp->clk_dp);
+err_clk_dp:
+ return ret;
+}
+
+static int rockchip_dp_clk_disable(struct rockchip_dp_device *dp)
+{
+ clk_disable_unprepare(dp->clk_dp);
+ clk_disable_unprepare(dp->clk_24m);
+
+ return 0;
+}
+
+static int rockchip_dp_pre_init(struct rockchip_dp_device *dp)
+{
+ u32 val;
+ int ret;
+
+ val = GRF_DP_REF_CLK_SEL_INTER | (GRF_DP_REF_CLK_SEL_INTER << 16);
+ ret = regmap_write(dp->grf, DP_REF_CLK_SEL, val);
+ if (ret != 0) {
+ dev_err(dp->dev, "Could not write to GRF: %d\n", ret);
+ return ret;
+ }
+
+ reset_control_assert(dp->rst);
+ usleep_range(10, 20);
+ reset_control_deassert(dp->rst);
+
+ return 0;
+}
+
+static int rockchip_dp_poweron(struct analogix_dp_plat_data *plat_data)
+{
+ struct rockchip_dp_device *dp = plat_data_to_dp(plat_data);
+ int ret;
+
+ ret = rockchip_dp_clk_enable(dp);
+ if (ret < 0) {
+ dev_err(dp->dev, "cannot enable dp clk %d\n", ret);
+ return -1;
+ }
+
+ ret = rockchip_dp_pre_init(dp);
+ if (ret < 0) {
+ dev_err(dp->dev, "dp pre init fail %d\n", ret);
+ return -1;
+ }
+
+ return 0;
+}
+
+static int rockchip_dp_poweroff(struct analogix_dp_plat_data *plat_data)
+{
+ struct rockchip_dp_device *dp = plat_data_to_dp(plat_data);
+
+ rockchip_dp_clk_disable(dp);
+
+ return 0;
+}
+
+static bool
+rockchip_dp_drm_encoder_mode_fixup(struct drm_encoder *encoder,
+ const struct drm_display_mode *mode,
+ struct drm_display_mode *adjusted_mode)
+{
+ /* do nothing */
+ return true;
+}
+
+static void rockchip_dp_drm_encoder_mode_set(struct drm_encoder *encoder,
+ struct drm_display_mode *mode,
+ struct drm_display_mode *adjusted)
+{
+ /* do nothing */
+}
+
+static void rockchip_dp_drm_encoder_prepare(struct drm_encoder *encoder)
+{
+ struct rockchip_dp_device *dp = encoder_to_dp(encoder);
+ u32 val;
+ int ret;
+
+ ret = rockchip_drm_crtc_mode_config(encoder->crtc,
+ DRM_MODE_CONNECTOR_eDP,
+ ROCKCHIP_OUT_MODE_AAAA);
+ if (ret < 0) {
+ dev_err(dp->dev, "Could not set crtc mode config: %d.\n", ret);
+ return;
+ }
+
+ ret = rockchip_drm_encoder_get_mux_id(dp->dev->of_node, encoder);
+ if (ret < 0)
+ return;
+
+ if (ret)
+ val = DP_SEL_VOP_LIT | (DP_SEL_VOP_LIT << 16);
+ else
+ val = DP_SEL_VOP_LIT << 16;
+
+ dev_info(dp->dev, "vop %s output to dp\n", (ret) ? "LIT" : "BIG");
+
+ ret = regmap_write(dp->grf, DP_VOP_SEL, val);
+ if (ret != 0) {
+ dev_err(dp->dev, "Could not write to GRF: %d\n", ret);
+ return;
+ }
+}
+
+static void rockchip_dp_drm_encoder_nop(struct drm_encoder *encoder)
+{
+ /* do nothing */
+}
+
+static struct drm_encoder_helper_funcs rockchip_dp_encoder_helper_funcs = {
+ .mode_fixup = rockchip_dp_drm_encoder_mode_fixup,
+ .mode_set = rockchip_dp_drm_encoder_mode_set,
+ .prepare = rockchip_dp_drm_encoder_prepare,
+ .commit = rockchip_dp_drm_encoder_nop,
+ .disable = rockchip_dp_drm_encoder_nop,
+};
+
+static void rockchip_dp_drm_encoder_destroy(struct drm_encoder *encoder)
+{
+ drm_encoder_cleanup(encoder);
+}
+
+static struct drm_encoder_funcs rockchip_dp_encoder_funcs = {
+ .destroy = rockchip_dp_drm_encoder_destroy,
+};
+
+static int rockchip_dp_init(struct rockchip_dp_device *dp)
+{
+ struct device *dev = dp->dev;
+ struct device_node *np = dev->of_node;
+ int ret;
+
+ dp->grf = syscon_regmap_lookup_by_phandle(np, "rockchip,grf");
+ if (IS_ERR(dp->grf)) {
+ dev_err(dev,
+ "rk3288-dp needs rockchip,grf property\n");
+ return PTR_ERR(dp->grf);
+ }
+
+ dp->clk_dp = devm_clk_get(dev, "clk_dp");
+ if (IS_ERR(dp->clk_dp)) {
+ dev_err(dev, "cannot get clk_dp\n");
+ return PTR_ERR(dp->clk_dp);
+ }
+
+ dp->clk_24m = devm_clk_get(dev, "clk_dp_24m");
+ if (IS_ERR(dp->clk_24m)) {
+ dev_err(dev, "cannot get clk_dp_24m\n");
+ return PTR_ERR(dp->clk_24m);
+ }
+
+ dp->rst = devm_reset_control_get(dev, "dp");
+ if (IS_ERR(dp->rst)) {
+ dev_err(dev, "failed to get reset\n");
+ return PTR_ERR(dp->rst);
+ }
+
+ ret = rockchip_dp_clk_enable(dp);
+ if (ret < 0) {
+ dev_err(dp->dev, "cannot enable dp clk %d\n", ret);
+ return ret;
+ }
+
+ ret = rockchip_dp_pre_init(dp);
+ if (ret < 0) {
+ dev_err(dp->dev, "failed to pre init %d\n", ret);
+ return ret;
+ }
+
+ return 0;
+}
+
+static int rockchip_dp_drm_create_encoder(struct rockchip_dp_device *dp)
+{
+ struct drm_encoder *encoder = &dp->encoder;
+ struct drm_device *drm_dev = dp->drm_dev;
+ struct device *dev = dp->dev;
+ int ret;
+
+ encoder->possible_crtcs = drm_of_find_possible_crtcs(drm_dev,
+ dev->of_node);
+ DRM_DEBUG_KMS("possible_crtcs = 0x%x\n", encoder->possible_crtcs);
+
+ ret = drm_encoder_init(drm_dev, encoder, &rockchip_dp_encoder_funcs,
+ DRM_MODE_ENCODER_TMDS);
+ if (ret) {
+ DRM_ERROR("failed to initialize encoder with drm\n");
+ return ret;
+ }
+
+ drm_encoder_helper_add(encoder, &rockchip_dp_encoder_helper_funcs);
+
+ return 0;
+}
+
+static int rockchip_dp_bind(struct device *dev, struct device *master,
+ void *data)
+{
+ struct rockchip_dp_device *dp = dev_get_drvdata(dev);
+ struct drm_device *drm_dev = data;
+ int ret;
+
+ /*
+ * Just like the probe function said, we don't need the
+ * device drvrate anymore, we should leave the charge to
+ * analogix dp driver, set the device drvdata to NULL.
+ */
+ dev_set_drvdata(dev, NULL);
+
+ ret = rockchip_dp_init(dp);
+ if (ret < 0)
+ return ret;
+
+ dp->drm_dev = drm_dev;
+
+ ret = rockchip_dp_drm_create_encoder(dp);
+ if (ret) {
+ DRM_ERROR("failed to create drm encoder\n");
+ return ret;
+ }
+
+ dp->plat_data.attach = NULL;
+ dp->plat_data.power_on = rockchip_dp_poweron;
+ dp->plat_data.power_off = rockchip_dp_poweroff;
+
+ return analogix_dp_bind(dev, dp->drm_dev, &dp->encoder,
+ &dp->plat_data);
+}
+
+static void rockchip_dp_unbind(struct device *dev, struct device *master,
+ void *data)
+{
+ return analogix_dp_unbind(dev, master, data);
+}
+
+static const struct component_ops rockchip_dp_component_ops = {
+ .bind = rockchip_dp_bind,
+ .unbind = rockchip_dp_unbind,
+};
+
+static int rockchip_dp_probe(struct platform_device *pdev)
+{
+ struct device *dev = &pdev->dev;
+ struct device_node *panel_node;
+ struct rockchip_dp_device *dp;
+ struct drm_panel *panel;
+
+ panel_node = of_parse_phandle(dev->of_node, "rockchip,panel", 0);
+ if (!panel_node) {
+ DRM_ERROR("failed to find rockchip,panel dt node\n");
+ return -ENODEV;
+ }
+
+ panel = of_drm_find_panel(panel_node);
+ if (!panel) {
+ DRM_ERROR("failed to find panel\n");
+ of_node_put(panel_node);
+ return -EPROBE_DEFER;
+ }
+
+ of_node_put(panel_node);
+
+ dp = devm_kzalloc(dev, sizeof(*dp), GFP_KERNEL);
+ if (!dp)
+ return -ENOMEM;
+
+ dp->dev = dev;
+
+ dp->plat_data.panel = panel;
+
+ /*
+ * We just use the drvdata until driver run into component
+ * add function, and then we would set drvdata to null, so
+ * that analogix dp driver could take charge of the drvdata.
+ */
+ platform_set_drvdata(pdev, dp);
+
+ return component_add(dev, &rockchip_dp_component_ops);
+}
+
+static int rockchip_dp_remove(struct platform_device *pdev)
+{
+ component_del(&pdev->dev, &rockchip_dp_component_ops);
+
+ return 0;
+}
+
+#ifdef CONFIG_PM_SLEEP
+static int rockchip_dp_suspend(struct device *dev)
+{
+ return analogix_dp_suspend(dev);
+}
+
+static int rockchip_dp_resume(struct device *dev)
+{
+ return analogix_dp_resume(dev);
+}
+#endif
+
+static const struct dev_pm_ops rockchip_dp_pm_ops = {
+ SET_SYSTEM_SLEEP_PM_OPS(rockchip_dp_suspend, rockchip_dp_resume)
+};
+
+static const struct of_device_id rockchip_dp_dt_ids[] = {
+ {.compatible = "rockchip,rk3288-dp",},
+ {}
+};
+MODULE_DEVICE_TABLE(of, rockchip_dp_dt_ids);
+
+static struct platform_driver rockchip_dp_driver = {
+ .probe = rockchip_dp_probe,
+ .remove = rockchip_dp_remove,
+ .driver = {
+ .name = "rockchip-dp",
+ .owner = THIS_MODULE,
+ .pm = &rockchip_dp_pm_ops,
+ .of_match_table = of_match_ptr(rockchip_dp_dt_ids),
+ },
+};
+
+module_platform_driver(rockchip_dp_driver);
+
+MODULE_AUTHOR("Jeff chen <jeff.chen@rock-chips.com>");
+MODULE_AUTHOR("Yakir Yang <ykk@rock-chips.com>");
+MODULE_DESCRIPTION("Rockchip Specific Analogix-DP Driver Extension");
+MODULE_LICENSE("GPL v2");
--
2.1.2
^ permalink raw reply related [flat|nested] 18+ messages in thread
* [RFC PATCH 5/8] drm: bridge/analogix_dp: add platform device type support
2015-08-06 13:49 [RFC PATCH 0/8] Add Analogix Core Display Port Driver Yakir Yang
` (3 preceding siblings ...)
2015-08-06 14:19 ` [RFC PATCH 4/8] drm: rockchip/dp: add rockchip platform dp driver Yakir Yang
@ 2015-08-06 14:19 ` Yakir Yang
2015-08-06 14:22 ` [RFC PATCH 6/8] drm: bridge: analogix_dp: add some rk3288 special registers setting Yakir Yang
` (4 subsequent siblings)
9 siblings, 0 replies; 18+ messages in thread
From: Yakir Yang @ 2015-08-06 14:19 UTC (permalink / raw)
To: linux-arm-kernel
Signed-off-by: Yakir Yang <ykk@rock-chips.com>
---
drivers/gpu/drm/exynos/analogix_dp-exynos.c | 1 +
drivers/gpu/drm/rockchip/analogix_dp-rockchip.c | 1 +
include/drm/bridge/analogix_dp.h | 6 ++++++
3 files changed, 8 insertions(+)
diff --git a/drivers/gpu/drm/exynos/analogix_dp-exynos.c b/drivers/gpu/drm/exynos/analogix_dp-exynos.c
index b8d09d4..0668e77 100644
--- a/drivers/gpu/drm/exynos/analogix_dp-exynos.c
+++ b/drivers/gpu/drm/exynos/analogix_dp-exynos.c
@@ -124,6 +124,7 @@ static int exynos_dp_bind(struct device *dev, struct device *master, void *data)
dp->dev = dev;
dp->drm_dev = drm_dev;
+ dp->plat_data.dev_type = EXYNOS_DP;
dp->plat_data.power_on = exynos_dp_poweron;
dp->plat_data.power_off = exynos_dp_poweroff;
dp->plat_data.attach = exynos_dp_bridge_attach;
diff --git a/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c b/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c
index 804048c..b532c21 100644
--- a/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c
+++ b/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c
@@ -312,6 +312,7 @@ static int rockchip_dp_bind(struct device *dev, struct device *master,
return ret;
}
+ dp->plat_data.dev_type = RK3288_DP;
dp->plat_data.attach = NULL;
dp->plat_data.power_on = rockchip_dp_poweron;
dp->plat_data.power_off = rockchip_dp_poweroff;
diff --git a/include/drm/bridge/analogix_dp.h b/include/drm/bridge/analogix_dp.h
index 9a207f8..f317003 100644
--- a/include/drm/bridge/analogix_dp.h
+++ b/include/drm/bridge/analogix_dp.h
@@ -3,7 +3,13 @@
#include <drm/drm_crtc.h>
+enum analogix_dp_devtype {
+ EXYNOS_DP,
+ RK3288_DP,
+};
+
struct analogix_dp_plat_data {
+ enum analogix_dp_devtype dev_type;
struct drm_panel *panel;
int (*power_on)(struct analogix_dp_plat_data *);
--
2.1.2
^ permalink raw reply related [flat|nested] 18+ messages in thread
* [RFC PATCH 6/8] drm: bridge: analogix_dp: add some rk3288 special registers setting
2015-08-06 13:49 [RFC PATCH 0/8] Add Analogix Core Display Port Driver Yakir Yang
` (4 preceding siblings ...)
2015-08-06 14:19 ` [RFC PATCH 5/8] drm: bridge/analogix_dp: add platform device type support Yakir Yang
@ 2015-08-06 14:22 ` Yakir Yang
2015-08-06 14:24 ` [RFC PATCH 7/8] drm: bridge: analogix_dp: try force hpd after plug in lookup failed Yakir Yang
` (3 subsequent siblings)
9 siblings, 0 replies; 18+ messages in thread
From: Yakir Yang @ 2015-08-06 14:22 UTC (permalink / raw)
To: linux-arm-kernel
RK3288 need some special registers setting, we can separate
them out by the dev_type of plat_data.
Signed-off-by: Yakir Yang <ykk@rock-chips.com>
---
drivers/gpu/drm/bridge/analogix_dp_reg.c | 76 ++++++++++++++++++++------------
drivers/gpu/drm/bridge/analogix_dp_reg.h | 12 +++++
2 files changed, 60 insertions(+), 28 deletions(-)
diff --git a/drivers/gpu/drm/bridge/analogix_dp_reg.c b/drivers/gpu/drm/bridge/analogix_dp_reg.c
index dfbbde7..4d6e08a 100644
--- a/drivers/gpu/drm/bridge/analogix_dp_reg.c
+++ b/drivers/gpu/drm/bridge/analogix_dp_reg.c
@@ -16,6 +16,8 @@
#include <linux/delay.h>
#include <linux/gpio.h>
+#include <drm/bridge/analogix_dp.h>
+
#include "analogix_dp_core.h"
#include "analogix_dp_reg.h"
@@ -73,6 +75,14 @@ void analogix_dp_init_analog_param(struct analogix_dp_device *dp)
reg = SEL_24M | TX_DVDD_BIT_1_0625V;
writel(reg, dp->reg_base + ANALOGIX_DP_ANALOG_CTL_2);
+ if (dp->plat_data && (dp->plat_data->dev_type == RK3288_DP)) {
+ writel(REF_CLK_24M, dp->reg_base + ANALOGIX_DP_PLL_REG_1);
+ writel(0x95, dp->reg_base + ANALOGIX_DP_PLL_REG_2);
+ writel(0x40, dp->reg_base + ANALOGIX_DP_PLL_REG_3);
+ writel(0x58, dp->reg_base + ANALOGIX_DP_PLL_REG_4);
+ writel(0x22, dp->reg_base + ANALOGIX_DP_PLL_REG_5);
+ }
+
reg = DRIVE_DVDD_BIT_1_0625V | VCO_BIT_600_MICRO;
writel(reg, dp->reg_base + ANALOGIX_DP_ANALOG_CTL_3);
@@ -207,81 +217,85 @@ void analogix_dp_set_analog_power_down(struct analogix_dp_device *dp,
bool enable)
{
u32 reg;
+ u32 phy_pd_addr = ANALOGIX_DP_PHY_PD;
+
+ if (dp->plat_data && (dp->plat_data->dev_type == RK3288_DP))
+ phy_pd_addr = ANALOGIX_DP_PD;
switch (block) {
case AUX_BLOCK:
if (enable) {
- reg = readl(dp->reg_base + ANALOGIX_DP_PHY_PD);
+ reg = readl(dp->reg_base + phy_dp_addr);
reg |= AUX_PD;
- writel(reg, dp->reg_base + ANALOGIX_DP_PHY_PD);
+ writel(reg, dp->reg_base + phy_dp_addr);
} else {
- reg = readl(dp->reg_base + ANALOGIX_DP_PHY_PD);
+ reg = readl(dp->reg_base + phy_dp_addr);
reg &= ~AUX_PD;
- writel(reg, dp->reg_base + ANALOGIX_DP_PHY_PD);
+ writel(reg, dp->reg_base + phy_dp_addr);
}
break;
case CH0_BLOCK:
if (enable) {
- reg = readl(dp->reg_base + ANALOGIX_DP_PHY_PD);
+ reg = readl(dp->reg_base + phy_dp_addr);
reg |= CH0_PD;
- writel(reg, dp->reg_base + ANALOGIX_DP_PHY_PD);
+ writel(reg, dp->reg_base + phy_dp_addr);
} else {
- reg = readl(dp->reg_base + ANALOGIX_DP_PHY_PD);
+ reg = readl(dp->reg_base + phy_dp_addr);
reg &= ~CH0_PD;
- writel(reg, dp->reg_base + ANALOGIX_DP_PHY_PD);
+ writel(reg, dp->reg_base + phy_dp_addr);
}
break;
case CH1_BLOCK:
if (enable) {
- reg = readl(dp->reg_base + ANALOGIX_DP_PHY_PD);
+ reg = readl(dp->reg_base + phy_dp_addr);
reg |= CH1_PD;
- writel(reg, dp->reg_base + ANALOGIX_DP_PHY_PD);
+ writel(reg, dp->reg_base + phy_dp_addr);
} else {
- reg = readl(dp->reg_base + ANALOGIX_DP_PHY_PD);
+ reg = readl(dp->reg_base + phy_dp_addr);
reg &= ~CH1_PD;
- writel(reg, dp->reg_base + ANALOGIX_DP_PHY_PD);
+ writel(reg, dp->reg_base + phy_dp_addr);
}
break;
case CH2_BLOCK:
if (enable) {
- reg = readl(dp->reg_base + ANALOGIX_DP_PHY_PD);
+ reg = readl(dp->reg_base + phy_dp_addr);
reg |= CH2_PD;
- writel(reg, dp->reg_base + ANALOGIX_DP_PHY_PD);
+ writel(reg, dp->reg_base + phy_dp_addr);
} else {
- reg = readl(dp->reg_base + ANALOGIX_DP_PHY_PD);
+ reg = readl(dp->reg_base + phy_dp_addr);
reg &= ~CH2_PD;
- writel(reg, dp->reg_base + ANALOGIX_DP_PHY_PD);
+ writel(reg, dp->reg_base + phy_dp_addr);
}
break;
case CH3_BLOCK:
if (enable) {
- reg = readl(dp->reg_base + ANALOGIX_DP_PHY_PD);
+ reg = readl(dp->reg_base + phy_dp_addr);
reg |= CH3_PD;
- writel(reg, dp->reg_base + ANALOGIX_DP_PHY_PD);
+ writel(reg, dp->reg_base + phy_dp_addr);
} else {
- reg = readl(dp->reg_base + ANALOGIX_DP_PHY_PD);
+ reg = readl(dp->reg_base + phy_dp_addr);
reg &= ~CH3_PD;
- writel(reg, dp->reg_base + ANALOGIX_DP_PHY_PD);
+ writel(reg, dp->reg_base + phy_dp_addr);
}
break;
case ANALOG_TOTAL:
if (enable) {
- reg = readl(dp->reg_base + ANALOGIX_DP_PHY_PD);
+ reg = readl(dp->reg_base + phy_dp_addr);
reg |= DP_PHY_PD;
- writel(reg, dp->reg_base + ANALOGIX_DP_PHY_PD);
+ writel(reg, dp->reg_base + phy_dp_addr);
} else {
- reg = readl(dp->reg_base + ANALOGIX_DP_PHY_PD);
+ reg = readl(dp->reg_base + phy_dp_addr);
reg &= ~DP_PHY_PD;
- writel(reg, dp->reg_base + ANALOGIX_DP_PHY_PD);
+ writel(reg, dp->reg_base + phy_dp_addr);
}
break;
case POWER_ALL:
if (enable) {
reg = DP_PHY_PD | AUX_PD | CH3_PD | CH2_PD |
CH1_PD | CH0_PD;
- writel(reg, dp->reg_base + ANALOGIX_DP_PHY_PD);
+ writel(reg, dp->reg_base + phy_dp_addr);
} else {
- writel(0x00, dp->reg_base + ANALOGIX_DP_PHY_PD);
+ writel(0x00, dp->reg_base + phy_dp_addr);
}
break;
default:
@@ -400,8 +414,14 @@ void analogix_dp_init_aux(struct analogix_dp_device *dp)
analogix_dp_reset_aux(dp);
/* Disable AUX transaction H/W retry */
- reg = AUX_BIT_PERIOD_EXPECTED_DELAY(3) | AUX_HW_RETRY_COUNT_SEL(0) |
- AUX_HW_RETRY_INTERVAL_600_MICROSECONDS;
+ if (dp->plat_data && (dp->plat_data->dev_type == RK3288_DP))
+ reg = AUX_BIT_PERIOD_EXPECTED_DELAY(0) |
+ AUX_HW_RETRY_COUNT_SEL(3) |
+ AUX_HW_RETRY_INTERVAL_600_MICROSECONDS;
+ else
+ reg = AUX_BIT_PERIOD_EXPECTED_DELAY(3) |
+ AUX_HW_RETRY_COUNT_SEL(0) |
+ AUX_HW_RETRY_INTERVAL_600_MICROSECONDS;
writel(reg, dp->reg_base + ANALOGIX_DP_AUX_HW_RETRY_CTL);
/* Receive AUX Channel DEFER commands equal to DEFFER_COUNT*64 */
diff --git a/drivers/gpu/drm/bridge/analogix_dp_reg.h b/drivers/gpu/drm/bridge/analogix_dp_reg.h
index 98153e2..96c538a 100644
--- a/drivers/gpu/drm/bridge/analogix_dp_reg.h
+++ b/drivers/gpu/drm/bridge/analogix_dp_reg.h
@@ -24,6 +24,14 @@
#define ANALOGIX_DP_VIDEO_CTL_8 0x3C
#define ANALOGIX_DP_VIDEO_CTL_10 0x44
+#define ANALOGIX_DP_PLL_REG_1 0xfc
+#define ANALOGIX_DP_PLL_REG_2 0x9e4
+#define ANALOGIX_DP_PLL_REG_3 0x9e8
+#define ANALOGIX_DP_PLL_REG_4 0x9ec
+#define ANALOGIX_DP_PLL_REG_5 0xa00
+
+#define ANALOGIX_DP_PD 0x12c
+
#define ANALOGIX_DP_LANE_MAP 0x35C
#define ANALOGIX_DP_ANALOG_CTL_1 0x370
@@ -156,6 +164,10 @@
#define VSYNC_POLARITY_CFG (0x1 << 1)
#define HSYNC_POLARITY_CFG (0x1 << 0)
+/* ANALOGIX_DP_PLL_REG_1 */
+#define REF_CLK_24M (0x1 << 1)
+#define REF_CLK_27M (0x0 << 1)
+
/* ANALOGIX_DP_LANE_MAP */
#define LANE3_MAP_LOGIC_LANE_0 (0x0 << 6)
#define LANE3_MAP_LOGIC_LANE_1 (0x1 << 6)
--
2.1.2
^ permalink raw reply related [flat|nested] 18+ messages in thread
* [RFC PATCH 7/8] drm: bridge: analogix_dp: try force hpd after plug in lookup failed
2015-08-06 13:49 [RFC PATCH 0/8] Add Analogix Core Display Port Driver Yakir Yang
` (5 preceding siblings ...)
2015-08-06 14:22 ` [RFC PATCH 6/8] drm: bridge: analogix_dp: add some rk3288 special registers setting Yakir Yang
@ 2015-08-06 14:24 ` Yakir Yang
2015-08-06 14:26 ` [RFC PATCH 8/8] drm: bridge/analogix_dp: expand the delay time for hpd detect Yakir Yang
` (2 subsequent siblings)
9 siblings, 0 replies; 18+ messages in thread
From: Yakir Yang @ 2015-08-06 14:24 UTC (permalink / raw)
To: linux-arm-kernel
Some edp screen do not have hpd signal, so we can't just return
failed when hpd plug in detect failed.
Besides TRM indicate that if HPD_STATUS(RO) is 0, AUX CH will not
work, so we need to give a force hpd action to set HPD_STATUS manually.
Signed-off-by: Yakir Yang <ykk@rock-chips.com>
---
drivers/gpu/drm/bridge/analogix_dp_core.c | 28 +++++++++++++++++++++++-----
drivers/gpu/drm/bridge/analogix_dp_core.h | 1 +
drivers/gpu/drm/bridge/analogix_dp_reg.c | 9 +++++++++
3 files changed, 33 insertions(+), 5 deletions(-)
diff --git a/drivers/gpu/drm/bridge/analogix_dp_core.c b/drivers/gpu/drm/bridge/analogix_dp_core.c
index 28724d4..7e67f19 100644
--- a/drivers/gpu/drm/bridge/analogix_dp_core.c
+++ b/drivers/gpu/drm/bridge/analogix_dp_core.c
@@ -68,15 +68,33 @@ static int analogix_dp_detect_hpd(struct analogix_dp_device *dp)
{
int timeout_loop = 0;
- while (analogix_dp_get_plug_in_status(dp) != 0) {
+ while (timeout_loop < DP_TIMEOUT_LOOP_COUNT) {
+ if (analogix_dp_get_plug_in_status(dp) == 0)
+ return 0;
+
timeout_loop++;
- if (DP_TIMEOUT_LOOP_COUNT < timeout_loop) {
- dev_err(dp->dev, "failed to get hpd plug status\n");
- return -ETIMEDOUT;
- }
usleep_range(10, 11);
}
+ /*
+ * Some edp screen do not have hpd signal, so we can't just
+ * return failed when hpd plug in detect failed.
+ *
+ * Besides TRM indicate that if HPD_STATUS(RO) is 0, AUX CH
+ * will not work, so we need to give a force hpd action to
+ * set HPD_STATUS manually.
+ */
+ dev_dbg(dp->dev, "failed to get hpd plug status, try to force hpd\n");
+
+ analogix_dp_force_hpd(dp);
+
+ if (analogix_dp_get_plug_in_status(dp) != 0) {
+ dev_err(dp->dev, "failed to get hpd plug in status\n");
+ return -ETIMEDOUT;
+ }
+
+ dev_dbg(dp->dev, "success to get plug in status after force hpd\n");
+
return 0;
}
diff --git a/drivers/gpu/drm/bridge/analogix_dp_core.h b/drivers/gpu/drm/bridge/analogix_dp_core.h
index fe72695..43cec77 100644
--- a/drivers/gpu/drm/bridge/analogix_dp_core.h
+++ b/drivers/gpu/drm/bridge/analogix_dp_core.h
@@ -183,6 +183,7 @@ void analogix_dp_set_analog_power_down(struct analogix_dp_device *dp,
bool enable);
void analogix_dp_init_analog_func(struct analogix_dp_device *dp);
void analogix_dp_init_hpd(struct analogix_dp_device *dp);
+void analogix_dp_force_hpd(struct analogix_dp_device *dp);
enum dp_irq_type analogix_dp_get_irq_type(struct analogix_dp_device *dp);
void analogix_dp_clear_hotplug_interrupts(struct analogix_dp_device *dp);
void analogix_dp_reset_aux(struct analogix_dp_device *dp);
diff --git a/drivers/gpu/drm/bridge/analogix_dp_reg.c b/drivers/gpu/drm/bridge/analogix_dp_reg.c
index 4d6e08a..3fb215b 100644
--- a/drivers/gpu/drm/bridge/analogix_dp_reg.c
+++ b/drivers/gpu/drm/bridge/analogix_dp_reg.c
@@ -366,6 +366,15 @@ void analogix_dp_init_hpd(struct analogix_dp_device *dp)
writel(reg, dp->reg_base + ANALOGIX_DP_SYS_CTL_3);
}
+void analogix_dp_force_hpd(struct analogix_dp_device *dp)
+{
+ u32 reg;
+
+ reg = readl(dp->reg_base + ANALOGIX_DP_SYS_CTL_3);
+ reg = (F_HPD | HPD_CTRL);
+ writel(reg, dp->reg_base + ANALOGIX_DP_SYS_CTL_3);
+}
+
enum dp_irq_type analogix_dp_get_irq_type(struct analogix_dp_device *dp)
{
u32 reg;
--
2.1.2
^ permalink raw reply related [flat|nested] 18+ messages in thread
* [RFC PATCH 8/8] drm: bridge/analogix_dp: expand the delay time for hpd detect
2015-08-06 13:49 [RFC PATCH 0/8] Add Analogix Core Display Port Driver Yakir Yang
` (6 preceding siblings ...)
2015-08-06 14:24 ` [RFC PATCH 7/8] drm: bridge: analogix_dp: try force hpd after plug in lookup failed Yakir Yang
@ 2015-08-06 14:26 ` Yakir Yang
2015-08-06 14:41 ` [RFC PATCH 0/8] Add Analogix Core Display Port Driver Jingoo Han
[not found] ` <1438870763-23796-1-git-send-email-ykk@rock-chips.com>
9 siblings, 0 replies; 18+ messages in thread
From: Yakir Yang @ 2015-08-06 14:26 UTC (permalink / raw)
To: linux-arm-kernel
Some edp screen with no hpd signal would need some delay time
to ensure that screen would be ready for work, so we can expand
the delay time in hpd detect function, it works prefectly on my
rk3288 sdk board.
Signed-off-by: Yakir Yang <ykk@rock-chips.com>
---
drivers/gpu/drm/bridge/analogix_dp_core.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/bridge/analogix_dp_core.c b/drivers/gpu/drm/bridge/analogix_dp_core.c
index 7e67f19..447c94d 100644
--- a/drivers/gpu/drm/bridge/analogix_dp_core.c
+++ b/drivers/gpu/drm/bridge/analogix_dp_core.c
@@ -73,7 +73,7 @@ static int analogix_dp_detect_hpd(struct analogix_dp_device *dp)
return 0;
timeout_loop++;
- usleep_range(10, 11);
+ usleep_range(100, 110);
}
/*
--
2.1.2
^ permalink raw reply related [flat|nested] 18+ messages in thread
* [RFC PATCH 2/8] drm: exynos/dp: convert to drm bridge mode
2015-08-06 14:19 ` Jingoo Han
@ 2015-08-06 14:29 ` Yakir Yang
2015-08-07 11:25 ` Daniel Vetter
0 siblings, 1 reply; 18+ messages in thread
From: Yakir Yang @ 2015-08-06 14:29 UTC (permalink / raw)
To: linux-arm-kernel
Hi Jingoo,
? 2015/8/6 22:19, Jingoo Han ??:
> On Thursday, August 06, 2015 11:07 PM, Yakir Yang wrote:
>> In order to move exynos dp code to bridge directory,
>> we need to convert driver drm bridge mode first. As
>> dp driver already have a ptn3460 bridge, so we need
>> to move ptn bridge to the next bridge of dp bridge.
>>
>> Signed-off-by: Yakir Yang <ykk@rock-chips.com>
>> ---
>> drivers/gpu/drm/exynos/exynos_dp_core.c | 196 ++++++++++++++++++++------------
>> drivers/gpu/drm/exynos/exynos_dp_core.h | 2 +
>> 2 files changed, 126 insertions(+), 72 deletions(-)
>>
>> diff --git a/drivers/gpu/drm/exynos/exynos_dp_core.c b/drivers/gpu/drm/exynos/exynos_dp_core.c
>> index a8097a4..aa99e23 100644
>> --- a/drivers/gpu/drm/exynos/exynos_dp_core.c
>> +++ b/drivers/gpu/drm/exynos/exynos_dp_core.c
>> @@ -3,6 +3,7 @@
>> *
>> * Copyright (C) 2012 Samsung Electronics Co., Ltd.
>> * Author: Jingoo Han <jg1.han@samsung.com>
>> + * Yakir Yang <ykk@rock-chips.com>
> Please don't add this.
> You just fixed some parts of this code. I don't find the reason
> why you have to be added to author for this file.
> If you want the title for an author, please send the patch
> for a new IP, instead of modifying the exiting codes.
Okay, thanks for your remind ;)
>> [...]
>> MODULE_AUTHOR("Jingoo Han <jg1.han@samsung.com>");
>> +MODULE_AUTHOR("Yakir Yang <ykk@rock-chips.com>");
> The same as above.
Done
>> MODULE_DESCRIPTION("Samsung SoC DP Driver");
>> MODULE_LICENSE("GPL v2");
>> diff --git a/drivers/gpu/drm/exynos/exynos_dp_core.h b/drivers/gpu/drm/exynos/exynos_dp_core.h
>> index c321ad5..f2584b8 100644
>> --- a/drivers/gpu/drm/exynos/exynos_dp_core.h
>> +++ b/drivers/gpu/drm/exynos/exynos_dp_core.h
>> @@ -3,6 +3,7 @@
>> *
>> * Copyright (C) 2012 Samsung Electronics Co., Ltd.
>> * Author: Jingoo Han <jg1.han@samsung.com>
>> + * Yakir Yang <ykk@rock-chips.com>
> The same as above.
> Here, you just added 1 line. If we add someone to author
> in this way, a lot of people should be added to author.
Done
- Yakir
> Best regards,
> Jingoo Han
>
>
>
>
>
^ permalink raw reply [flat|nested] 18+ messages in thread
* [RFC PATCH 0/8] Add Analogix Core Display Port Driver
2015-08-06 13:49 [RFC PATCH 0/8] Add Analogix Core Display Port Driver Yakir Yang
` (7 preceding siblings ...)
2015-08-06 14:26 ` [RFC PATCH 8/8] drm: bridge/analogix_dp: expand the delay time for hpd detect Yakir Yang
@ 2015-08-06 14:41 ` Jingoo Han
2015-08-06 15:00 ` Yakir Yang
[not found] ` <1438870763-23796-1-git-send-email-ykk@rock-chips.com>
9 siblings, 1 reply; 18+ messages in thread
From: Jingoo Han @ 2015-08-06 14:41 UTC (permalink / raw)
To: linux-arm-kernel
On Thursday, August 06, 2015 10:49 PM, Yakir Yang wrote:
>
> Hi all,
> Samsung exynos and Rockchip rk3288 almost share same dp controller,
> so I split the common code out, then rk3288 and exynos can re-used the
> same dp core driver. Cause I can't find the exact IP name of exynos dp
> controller, so I decide to name dp core driver with "analogix" which I
> find in rk3288 eDP TRM ;)
OK, I see.
The Samsung Exynos eDP contoller and Rockchip rk3288 eDP contoller share
the same IP. So, a lot of parts can be re-used. I agree with this.
However, we have to review the code carefully, as others did.
I also cannot find the exact IP name. The "analogix" may be the vendor name
of this IP.
Best regards,
Jingoo Han
>
> Beyond that, there are three light registers setting differents bewteen
> exynos and rk3288.
> 1. RK3288 have five special pll resigters which not indicata in exynos
> dp controller.
> 2. The address of DP_PHY_PD(dp phy power manager register) are different
> between rk3288 and exynos.
> 3. Rk3288 and exynos have different setting with AUX_HW_RETRY_CTL(dp debug
> register).
>
> My series patches can be divider into two parts: One for spliting the
> analogix_dp code from exynos dp driver. Another are trying to add rk3288
> dp driver support.
>
> Best regards,
> - Yakir
>
>
> Yakir Yang (8):
> drm: exynos/dp: fix code style
> drm: exynos/dp: convert to drm bridge mode
> drm: bridge: analogix_dp: split exynos dp driver to bridge dir
> drm: rockchip/dp: add rockchip platform dp driver
> drm: bridge/analogix_dp: add platform device type support
> drm: bridge: analogix_dp: add some rk3288 special registers setting
> drm: bridge: analogix_dp: try force hpd after plug in lookup failed
> drm: bridge/analogix_dp: expand the delay time for hpd detect
>
> drivers/gpu/drm/bridge/Kconfig | 5 +
> drivers/gpu/drm/bridge/Makefile | 1 +
> drivers/gpu/drm/bridge/analogix_dp_core.c | 1397 +++++++++++++++++++
> drivers/gpu/drm/bridge/analogix_dp_core.h | 287 ++++
> drivers/gpu/drm/bridge/analogix_dp_reg.c | 1295 ++++++++++++++++++
> .../exynos_dp_reg.h => bridge/analogix_dp_reg.h} | 272 ++--
> drivers/gpu/drm/exynos/Kconfig | 5 +-
> drivers/gpu/drm/exynos/Makefile | 2 +-
> drivers/gpu/drm/exynos/analogix_dp-exynos.c | 241 ++++
> drivers/gpu/drm/exynos/exynos_dp_core.c | 1416 --------------------
> drivers/gpu/drm/exynos/exynos_dp_core.h | 282 ----
> drivers/gpu/drm/exynos/exynos_dp_reg.c | 100 +-
> drivers/gpu/drm/rockchip/Kconfig | 10 +
> drivers/gpu/drm/rockchip/Makefile | 1 +
> drivers/gpu/drm/rockchip/analogix_dp-rockchip.c | 420 ++++++
> include/drm/bridge/analogix_dp.h | 28 +
> 16 files changed, 3880 insertions(+), 1882 deletions(-)
> create mode 100644 drivers/gpu/drm/bridge/analogix_dp_core.c
> create mode 100644 drivers/gpu/drm/bridge/analogix_dp_core.h
> create mode 100644 drivers/gpu/drm/bridge/analogix_dp_reg.c
> rename drivers/gpu/drm/{exynos/exynos_dp_reg.h => bridge/analogix_dp_reg.h} (62%)
> create mode 100644 drivers/gpu/drm/exynos/analogix_dp-exynos.c
> delete mode 100644 drivers/gpu/drm/exynos/exynos_dp_core.c
> delete mode 100644 drivers/gpu/drm/exynos/exynos_dp_core.h
> create mode 100644 drivers/gpu/drm/rockchip/analogix_dp-rockchip.c
> create mode 100644 include/drm/bridge/analogix_dp.h
>
> --
> 2.1.2
^ permalink raw reply [flat|nested] 18+ messages in thread
* [RFC PATCH 3/8] drm: bridge: analogix_dp: split exynos dp driver to bridge dir
[not found] ` <000101d0d054$f34e9c70$d9ebd550$@com>
@ 2015-08-06 14:57 ` Yakir Yang
0 siblings, 0 replies; 18+ messages in thread
From: Yakir Yang @ 2015-08-06 14:57 UTC (permalink / raw)
To: linux-arm-kernel
Jingoo,
? 2015/8/6 22:33, Jingoo Han ??:
> On Thursday, August 06, 2015 11:19 PM, Yakir Yang wrote:
>> Split the dp core driver from exynos directory to bridge
>> directory, and rename the core driver to analogix_dp_*,
>> leave the platform code to analogix_dp-exynos.
>>
>> Signed-off-by: Yakir Yang <ykk@rock-chips.com>
>> ---
>> drivers/gpu/drm/bridge/Kconfig | 5 +
>> drivers/gpu/drm/bridge/Makefile | 1 +
>> .../exynos_dp_core.c => bridge/analogix_dp_core.c} | 751 +++++-------
>> drivers/gpu/drm/bridge/analogix_dp_core.h | 286 +++++
>> drivers/gpu/drm/bridge/analogix_dp_reg.c | 1266 ++++++++++++++++++++
>> .../exynos_dp_reg.h => bridge/analogix_dp_reg.h} | 260 ++--
>> drivers/gpu/drm/exynos/Kconfig | 5 +-
>> drivers/gpu/drm/exynos/Makefile | 2 +-
>> drivers/gpu/drm/exynos/analogix_dp-exynos.c | 240 ++++
>> drivers/gpu/drm/exynos/exynos_dp_core.h | 283 -----
>> include/drm/bridge/analogix_dp.h | 22 +
>> 11 files changed, 2287 insertions(+), 834 deletions(-)
>> rename drivers/gpu/drm/{exynos/exynos_dp_core.c => bridge/analogix_dp_core.c} (54%)
>> create mode 100644 drivers/gpu/drm/bridge/analogix_dp_core.h
>> create mode 100644 drivers/gpu/drm/bridge/analogix_dp_reg.c
>> rename drivers/gpu/drm/{exynos/exynos_dp_reg.h => bridge/analogix_dp_reg.h} (63%)
>> create mode 100644 drivers/gpu/drm/exynos/analogix_dp-exynos.c
>> delete mode 100644 drivers/gpu/drm/exynos/exynos_dp_core.h
>> create mode 100644 include/drm/bridge/analogix_dp.h
>>
>> [...]
>> rename from drivers/gpu/drm/exynos/exynos_dp_core.c
>> rename to drivers/gpu/drm/bridge/analogix_dp_core.c
>> index aa99e23..28724d4 100644
>> --- a/drivers/gpu/drm/exynos/exynos_dp_core.c
>> +++ b/drivers/gpu/drm/bridge/analogix_dp_core.c
>> @@ -1,7 +1,8 @@
>> /*
>> - * Samsung SoC DP (Display Port) interface driver.
>> + * Analogix Core DP (Display Port) interface driver.
>> *
>> * Copyright (C) 2012 Samsung Electronics Co., Ltd.
>> + * Copyright (C) FuZhou Rockchip Electronics Co., Ltd.
> What is the reason to add this copyright?
> You just replace 'exynos' prefix with 'analogix' prefix.
> I cannot find the reason to add the copyright.
>
Oh! Thanks for your point out, sorry for this one
- Yakir
>> *
>> --
>> 2.1.2
>
>
>
>
^ permalink raw reply [flat|nested] 18+ messages in thread
* [RFC PATCH 0/8] Add Analogix Core Display Port Driver
2015-08-06 14:41 ` [RFC PATCH 0/8] Add Analogix Core Display Port Driver Jingoo Han
@ 2015-08-06 15:00 ` Yakir Yang
0 siblings, 0 replies; 18+ messages in thread
From: Yakir Yang @ 2015-08-06 15:00 UTC (permalink / raw)
To: linux-arm-kernel
Jingoo,
? 2015/8/6 22:41, Jingoo Han ??:
> On Thursday, August 06, 2015 10:49 PM, Yakir Yang wrote:
>> Hi all,
>> Samsung exynos and Rockchip rk3288 almost share same dp controller,
>> so I split the common code out, then rk3288 and exynos can re-used the
>> same dp core driver. Cause I can't find the exact IP name of exynos dp
>> controller, so I decide to name dp core driver with "analogix" which I
>> find in rk3288 eDP TRM ;)
>
> OK, I see.
> The Samsung Exynos eDP contoller and Rockchip rk3288 eDP contoller share
> the same IP. So, a lot of parts can be re-used. I agree with this.
> However, we have to review the code carefully, as others did.
Yeah, feel happy to be reviewed ;)
> I also cannot find the exact IP name. The "analogix" may be the vendor name
> of this IP.
Okay, so "analogix" is okay for now
Thanks,
- Yakir
> Best regards,
> Jingoo Han
>
>> Beyond that, there are three light registers setting differents bewteen
>> exynos and rk3288.
>> 1. RK3288 have five special pll resigters which not indicata in exynos
>> dp controller.
>> 2. The address of DP_PHY_PD(dp phy power manager register) are different
>> between rk3288 and exynos.
>> 3. Rk3288 and exynos have different setting with AUX_HW_RETRY_CTL(dp debug
>> register).
>>
>> My series patches can be divider into two parts: One for spliting the
>> analogix_dp code from exynos dp driver. Another are trying to add rk3288
>> dp driver support.
>>
>> Best regards,
>> - Yakir
>>
>>
>> --
>> 2.1.2
>
>
>
>
^ permalink raw reply [flat|nested] 18+ messages in thread
* [RFC PATCH 1/8] drm: exynos/dp: fix code style
2015-08-06 14:04 ` Yakir Yang
@ 2015-08-06 15:05 ` Joe Perches
2015-08-06 15:20 ` Yakir Yang
0 siblings, 1 reply; 18+ messages in thread
From: Joe Perches @ 2015-08-06 15:05 UTC (permalink / raw)
To: linux-arm-kernel
On Thu, 2015-08-06 at 09:04 -0500, Yakir Yang wrote:
> make checkpatch.pl script happy
That should not be the primary reason to submit a patch.
Making it easier for human code reader to understand
what the code does should be though.
> diff --git a/drivers/gpu/drm/exynos/exynos_dp_core.c b/drivers/gpu/drm/exynos/exynos_dp_core.c
[]
> @@ -123,10 +123,11 @@ static int exynos_dp_read_edid(struct exynos_dp_device *dp)
> dev_dbg(dp->dev, "EDID data includes a single extension!\n");
>
> /* Read EDID data */
> - retval = exynos_dp_read_bytes_from_i2c(dp, I2C_EDID_DEVICE_ADDR,
> - EDID_HEADER_PATTERN,
> - EDID_BLOCK_LENGTH,
> - &edid[EDID_HEADER_PATTERN]);
> + retval =
> + exynos_dp_read_bytes_from_i2c(dp, I2C_EDID_DEVICE_ADDR,
> + EDID_HEADER_PATTERN,
> + EDID_BLOCK_LENGTH,
> + &edid[EDID_HEADER_PATTERN]);
This is a relatively uncommon style.
Because the code uses relatively long variable and
function names as well as longish macro #defines,
prefer to ignore the 80 column limit.
^ permalink raw reply [flat|nested] 18+ messages in thread
* [RFC PATCH 1/8] drm: exynos/dp: fix code style
2015-08-06 15:05 ` Joe Perches
@ 2015-08-06 15:20 ` Yakir Yang
0 siblings, 0 replies; 18+ messages in thread
From: Yakir Yang @ 2015-08-06 15:20 UTC (permalink / raw)
To: linux-arm-kernel
Joe,
? 2015/8/6 23:05, Joe Perches ??:
> On Thu, 2015-08-06 at 09:04 -0500, Yakir Yang wrote:
>> make checkpatch.pl script happy
> That should not be the primary reason to submit a patch.
>
> Making it easier for human code reader to understand
> what the code does should be though.
Thanks for your reply, but I do think that fix code style and make
checkpatch.pl passed is my primary reason to submit this patch. I can't
think out more directly words ;( ,
>> diff --git a/drivers/gpu/drm/exynos/exynos_dp_core.c b/drivers/gpu/drm/exynos/exynos_dp_core.c
> []
>> @@ -123,10 +123,11 @@ static int exynos_dp_read_edid(struct exynos_dp_device *dp)
>> dev_dbg(dp->dev, "EDID data includes a single extension!\n");
>>
>> /* Read EDID data */
>> - retval = exynos_dp_read_bytes_from_i2c(dp, I2C_EDID_DEVICE_ADDR,
>> - EDID_HEADER_PATTERN,
>> - EDID_BLOCK_LENGTH,
>> - &edid[EDID_HEADER_PATTERN]);
>> + retval =
>> + exynos_dp_read_bytes_from_i2c(dp, I2C_EDID_DEVICE_ADDR,
>> + EDID_HEADER_PATTERN,
>> + EDID_BLOCK_LENGTH,
>> + &edid[EDID_HEADER_PATTERN]);
> This is a relatively uncommon style.
>
> Because the code uses relatively long variable and
> function names as well as longish macro #defines,
> prefer to ignore the 80 column limit.
Okay, I think it would be better to modify like those:
retval = exynos_dp_read_bytes_from_i2c(
dp, I2C_EDID_DEVICE_ADDR,
EDID_HEADER_PATTERN,
EDID_BLOCK_LENGTH,
&edid[EDID_HEADER_PATTERN]);
Is it okay ?
- Yakir
>
>
>
>
^ permalink raw reply [flat|nested] 18+ messages in thread
* [RFC PATCH 2/8] drm: exynos/dp: convert to drm bridge mode
2015-08-06 14:29 ` Yakir Yang
@ 2015-08-07 11:25 ` Daniel Vetter
2015-08-07 13:18 ` Yakir Yang
0 siblings, 1 reply; 18+ messages in thread
From: Daniel Vetter @ 2015-08-07 11:25 UTC (permalink / raw)
To: linux-arm-kernel
On Thu, Aug 06, 2015 at 10:29:29PM +0800, Yakir Yang wrote:
> Hi Jingoo,
>
> ? 2015/8/6 22:19, Jingoo Han ??:
> >On Thursday, August 06, 2015 11:07 PM, Yakir Yang wrote:
> >>In order to move exynos dp code to bridge directory,
> >>we need to convert driver drm bridge mode first. As
> >>dp driver already have a ptn3460 bridge, so we need
> >>to move ptn bridge to the next bridge of dp bridge.
> >>
> >>Signed-off-by: Yakir Yang <ykk@rock-chips.com>
> >>---
> >> drivers/gpu/drm/exynos/exynos_dp_core.c | 196 ++++++++++++++++++++------------
> >> drivers/gpu/drm/exynos/exynos_dp_core.h | 2 +
> >> 2 files changed, 126 insertions(+), 72 deletions(-)
> >>
> >>diff --git a/drivers/gpu/drm/exynos/exynos_dp_core.c b/drivers/gpu/drm/exynos/exynos_dp_core.c
> >>index a8097a4..aa99e23 100644
> >>--- a/drivers/gpu/drm/exynos/exynos_dp_core.c
> >>+++ b/drivers/gpu/drm/exynos/exynos_dp_core.c
> >>@@ -3,6 +3,7 @@
> >> *
> >> * Copyright (C) 2012 Samsung Electronics Co., Ltd.
> >> * Author: Jingoo Han <jg1.han@samsung.com>
> >>+ * Yakir Yang <ykk@rock-chips.com>
> >Please don't add this.
> >You just fixed some parts of this code. I don't find the reason
> >why you have to be added to author for this file.
> >If you want the title for an author, please send the patch
> >for a new IP, instead of modifying the exiting codes.
>
> Okay, thanks for your remind ;)
tbh the author lines are completely irrelevant, git blame/log is the
authoritative source for that. Copyright is a bit a different matter
entirely, but in general we seem to be not too good at updating.
Really if that's all you have to comment and no substantial technical
concerns or questions then just can such a bikeshed mail.
-Daniel
--
Daniel Vetter
Software Engineer, Intel Corporation
http://blog.ffwll.ch
^ permalink raw reply [flat|nested] 18+ messages in thread
* [RFC PATCH 2/8] drm: exynos/dp: convert to drm bridge mode
2015-08-07 11:25 ` Daniel Vetter
@ 2015-08-07 13:18 ` Yakir Yang
0 siblings, 0 replies; 18+ messages in thread
From: Yakir Yang @ 2015-08-07 13:18 UTC (permalink / raw)
To: linux-arm-kernel
Daniel,
? 2015/8/7 19:25, Daniel Vetter ??:
> On Thu, Aug 06, 2015 at 10:29:29PM +0800, Yakir Yang wrote:
>> Hi Jingoo,
>>
>> ? 2015/8/6 22:19, Jingoo Han ??:
>>> On Thursday, August 06, 2015 11:07 PM, Yakir Yang wrote:
>>>> In order to move exynos dp code to bridge directory,
>>>> we need to convert driver drm bridge mode first. As
>>>> dp driver already have a ptn3460 bridge, so we need
>>>> to move ptn bridge to the next bridge of dp bridge.
>>>>
>>>> Signed-off-by: Yakir Yang <ykk@rock-chips.com>
>>>> ---
>>>> drivers/gpu/drm/exynos/exynos_dp_core.c | 196 ++++++++++++++++++++------------
>>>> drivers/gpu/drm/exynos/exynos_dp_core.h | 2 +
>>>> 2 files changed, 126 insertions(+), 72 deletions(-)
>>>>
>>>> diff --git a/drivers/gpu/drm/exynos/exynos_dp_core.c b/drivers/gpu/drm/exynos/exynos_dp_core.c
>>>> index a8097a4..aa99e23 100644
>>>> --- a/drivers/gpu/drm/exynos/exynos_dp_core.c
>>>> +++ b/drivers/gpu/drm/exynos/exynos_dp_core.c
>>>> @@ -3,6 +3,7 @@
>>>> *
>>>> * Copyright (C) 2012 Samsung Electronics Co., Ltd.
>>>> * Author: Jingoo Han <jg1.han@samsung.com>
>>>> + * Yakir Yang <ykk@rock-chips.com>
>>> Please don't add this.
>>> You just fixed some parts of this code. I don't find the reason
>>> why you have to be added to author for this file.
>>> If you want the title for an author, please send the patch
>>> for a new IP, instead of modifying the exiting codes.
>> Okay, thanks for your remind ;)
> tbh the author lines are completely irrelevant, git blame/log is the
> authoritative source for that. Copyright is a bit a different matter
> entirely, but in general we seem to be not too good at updating.
Thanks for your good explain ;)
- Yakir
> Really if that's all you have to comment and no substantial technical
> concerns or questions then just can such a bikeshed mail.
> -Daniel
^ permalink raw reply [flat|nested] 18+ messages in thread
end of thread, other threads:[~2015-08-07 13:18 UTC | newest]
Thread overview: 18+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2015-08-06 13:49 [RFC PATCH 0/8] Add Analogix Core Display Port Driver Yakir Yang
2015-08-06 13:58 ` [RFC PATCH 1/8] drm: exynos/dp: fix code style Yakir Yang
2015-08-06 14:04 ` Yakir Yang
2015-08-06 15:05 ` Joe Perches
2015-08-06 15:20 ` Yakir Yang
2015-08-06 14:07 ` [RFC PATCH 2/8] drm: exynos/dp: convert to drm bridge mode Yakir Yang
2015-08-06 14:19 ` Jingoo Han
2015-08-06 14:29 ` Yakir Yang
2015-08-07 11:25 ` Daniel Vetter
2015-08-07 13:18 ` Yakir Yang
2015-08-06 14:19 ` [RFC PATCH 4/8] drm: rockchip/dp: add rockchip platform dp driver Yakir Yang
2015-08-06 14:19 ` [RFC PATCH 5/8] drm: bridge/analogix_dp: add platform device type support Yakir Yang
2015-08-06 14:22 ` [RFC PATCH 6/8] drm: bridge: analogix_dp: add some rk3288 special registers setting Yakir Yang
2015-08-06 14:24 ` [RFC PATCH 7/8] drm: bridge: analogix_dp: try force hpd after plug in lookup failed Yakir Yang
2015-08-06 14:26 ` [RFC PATCH 8/8] drm: bridge/analogix_dp: expand the delay time for hpd detect Yakir Yang
2015-08-06 14:41 ` [RFC PATCH 0/8] Add Analogix Core Display Port Driver Jingoo Han
2015-08-06 15:00 ` Yakir Yang
[not found] ` <1438870763-23796-1-git-send-email-ykk@rock-chips.com>
[not found] ` <000101d0d054$f34e9c70$d9ebd550$@com>
2015-08-06 14:57 ` [RFC PATCH 3/8] drm: bridge: analogix_dp: split exynos dp driver to bridge dir Yakir Yang
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