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Tue, 17 Jun 2025 17:36:31 +0000 (GMT) From: "Pritam Manohar Sutar" To: "'Krzysztof Kozlowski'" Cc: , , , , , , , , , , , , , , , , , , , , , In-Reply-To: <20250616-boisterous-mouse-of-current-adfd67@kuoka> Subject: RE: [PATCH v3 2/9] phy: exyons5-usbdrd: support HS phy for ExynosAutov920 Date: Tue, 17 Jun 2025 23:06:30 +0530 Message-ID: <000201dbdfae$5ef17e70$1cd47b50$@samsung.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Mailer: Microsoft Outlook 16.0 Thread-Index: AQNTkACKxnsdZBPuyPiYuNftoBZF1gLGzMbPAZuXxZEB509h9LDl7H+g Content-Language: en-in X-CMS-MailID: 20250617173634epcas5p3dbbe9a86be00bc8124444dc9a2cea1bc X-Msg-Generator: CA Content-Type: text/plain; charset="utf-8" X-Sendblock-Type: REQ_APPROVE CMS-TYPE: 105P cpgsPolicy: CPGSC10-542,Y X-CFilter-Loop: Reflected X-CMS-RootMailID: 20250613055043epcas5p2437abc65042529a2012a6ca80559ac80 References: <20250613055613.866909-1-pritam.sutar@samsung.com> <20250613055613.866909-3-pritam.sutar@samsung.com> <20250616-boisterous-mouse-of-current-adfd67@kuoka> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20250617_181730_555009_E78CEC02 X-CRM114-Status: GOOD ( 19.88 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Hi Krzysztof, > -----Original Message----- > From: Krzysztof Kozlowski > Sent: 16 June 2025 01:43 PM > To: Pritam Manohar Sutar > Cc: vkoul=40kernel.org; kishon=40kernel.org; robh=40kernel.org; > krzk+dt=40kernel.org; conor+dt=40kernel.org; alim.akhtar=40samsung.com; > andre.draszik=40linaro.org; peter.griffin=40linaro.org; kauschluss=40disr= oot.org; > ivo.ivanov.ivanov1=40gmail.com; m.szyprowski=40samsung.com; > s.nawrocki=40samsung.com; linux-phy=40lists.infradead.org; > devicetree=40vger.kernel.org; linux-kernel=40vger.kernel.org; linux-arm- > kernel=40lists.infradead.org; linux-samsung-soc=40vger.kernel.org; > rosa.pila=40samsung.com; dev.tailor=40samsung.com; > faraz.ata=40samsung.com; muhammed.ali=40samsung.com; > selvarasu.g=40samsung.com > Subject: Re: =5BPATCH v3 2/9=5D phy: exyons5-usbdrd: support HS phy for > ExynosAutov920 >=20 > On Fri, Jun 13, 2025 at 11:26:06AM GMT, Pritam Manohar Sutar wrote: > > This SoC has a single USB 3.1 DRD combo phy that supports both > > UTMI+ (HS) and PIPE3 (SS) and three USB2.0 DRD HS phy controllers > > those only support the UTMI+ (HS) interface. > > > > Support only UTMI+ port for this SoC which is very similar to what the > > existing Exynos850 supports. > > > > The combo phy support is out of scope of this commit. > > > > Add required change in phy driver to support HS phy for this SoC. > > > > Signed-off-by: Pritam Manohar Sutar > > --- > > drivers/phy/samsung/phy-exynos5-usbdrd.c =7C 25 > > ++++++++++++++++++++++++ > > 1 file changed, 25 insertions(+) > > > > diff --git a/drivers/phy/samsung/phy-exynos5-usbdrd.c > > b/drivers/phy/samsung/phy-exynos5-usbdrd.c > > index 917a76d584f0..15965b4c6f78 100644 > > --- a/drivers/phy/samsung/phy-exynos5-usbdrd.c > > +++ b/drivers/phy/samsung/phy-exynos5-usbdrd.c > > =40=40 -2025,6 +2025,28 =40=40 static const struct exynos5_usbdrd_phy_d= rvdata > exynos850_usbdrd_phy =3D =7B > > .n_regulators =3D ARRAY_SIZE(exynos5_regulator_names), > > =7D; > > > > +static const struct phy_ops exynosautov920_usbdrd_phy_ops =3D =7B > > + .init =3D exynos850_usbdrd_phy_init, > > + .exit =3D exynos850_usbdrd_phy_exit, > > + .owner =3D THIS_MODULE, > > +=7D; > > + > > +static const struct exynos5_usbdrd_phy_config > phy_cfg_exynosautov920=5B=5D =3D =7B > > + =7B > > + .id =3D EXYNOS5_DRDPHY_UTMI, > > + .phy_init =3D exynos850_usbdrd_utmi_init, > > + =7D, > > +=7D; > > + > > +static const struct exynos5_usbdrd_phy_drvdata > exynosautov920_usbdrd_phy =3D =7B > > + .phy_cfg =3D phy_cfg_exynosautov920, > > + .phy_ops =3D &exynosautov920_usbdrd_phy_ops, > > + .clk_names =3D exynos5_clk_names, > > + .n_clks =3D ARRAY_SIZE(exynos5_clk_names), > > + .core_clk_names =3D exynos5_core_clk_names, > > + .n_core_clks =3D ARRAY_SIZE(exynos5_core_clk_names), >=20 > Where are the supplies? Where is power on/off seqequence in the phy ops? >=20 > No pmu control (missing offset)? >=20 LDO regulators are always on. USB don=E2=80=99t=20control=20them=20for=20E= xynosAutov920.=0D=0APhy=20isol=20is=20shared=20across=20the=20USBs.=20And= =20it=20is=20handled=20in=20bootloader=20(if=20one=20causes=20phy=20exit,= =20it=20isolates=20all=20the=20phys).=20=0D=0A=0D=0AHence,=20supplies=20and= =20power=20on/off=20are=20removed=20from=20phy=20ops.=0D=0A=0D=0A>=20You=20= have=20entire=20commit=20msg=20to=20explain=20unusual=20things.=0D=0A>=20= =0D=0A=0D=0AWill=20update=20the=20same=20with=20commit=20message=20in=20nex= t=20version=20of=20the=20patch-set=20(v4).=20=0D=0A=0D=0A>=20Best=20regards= ,=0D=0A>=20Krzysztof=0D=0A=0D=0A=0D=0AThank=20you,=0D=0A=0D=0ARegards,=0D= =0APritam=0D=0A=0D=0A