From: will.deacon@arm.com (Will Deacon)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH] ARM: gic: use handle_fasteoi_irq for SPIs
Date: Wed, 16 Feb 2011 16:17:55 -0000 [thread overview]
Message-ID: <000a01cbcdf5$11a9e6a0$34fdb3e0$@deacon@arm.com> (raw)
In-Reply-To: <AANLkTikaZkRMHH1bUmO0pWYT1FgTC+83F5KxPySasG-S@mail.gmail.com>
Hi Rabin,
> >> Several of the platforms using the GIC also have GPIO code which uses
> >> set_irq_chained_handler(). I think you will have to modify all of
> >> these to call irq_eoi() appropriately and not the other functions.
> >> Some of these will also likely be used with other interrupt handlers
> >> than the GIC, though.
> >
> > Hmm, I had a quick look at some platforms that do this (mach-dove and
> > plat-spear) and I don't see what the problem is. They use their own irq_chip
> > structures, with their own function pointers, so this doesn't seem to relate
> > to the GIC at all. What am I missing?!
>
> The chained handlers are usually installed on GIC interrupts. So, when
> a chained handler does something like this
>
> desc->irq_data.chip->irq_unmask(&desc->irq_data);
>
> the desc->irq_data.chip refers to the gic_chip. These handlers are
> written with the knowledge of what flow handler the GIC uses and what
> functions it implements, so when you change that, the chained handler
> code will not work correctly, and they'll need to be updated just like
> you've updated the cascade IRQ handler.
Ah yes, thanks for the explanation. After looking at the plat-omap code
I finally understand what's going on and I can't help but feel that the
chained GPIO handlers are terminally broken! The generic irq chip high-level
handlers (handle_{edge,level}_irq for example) at least check to see if
the irq_chip functions are non-NULL before calling them.
Ideally, the chained handler would be able to query the irq_chip to find
out what types of IRQ flow-control it supports and then assume that behaviour.
> In fact, I think that 846afbd1 ("GIC: Dont disable INT in ack callback")
> has broken not just GIC cascading interrupts but assumptions in several
> of these chained handlers, since several of them seem to have been
> written assuming (invalidly) that irq_ack() masks the interrupt, but
> this is no longer the case with the GIC after that commit.
Yep - it was further reaching that I originally thought. The question now is:
is it worth changing all of these handlers or are we better off hacking the gic
code so that .irq_ack calls .irq_eoi? In the case of the latter, your performance
will suck in a virtualised environment, but that's better than broken.
Cheers,
Will
next prev parent reply other threads:[~2011-02-16 16:17 UTC|newest]
Thread overview: 23+ messages / expand[flat|nested] mbox.gz Atom feed top
2011-02-14 15:26 [PATCH] ARM: gic: use handle_fasteoi_irq for SPIs Will Deacon
2011-02-16 11:29 ` Rabin Vincent
2011-02-16 13:09 ` Will Deacon
[not found] ` <-4413647205110644369@unknownmsgid>
2011-02-16 14:05 ` Rabin Vincent
2011-02-16 16:17 ` Will Deacon [this message]
[not found] ` <146267380211262372@unknownmsgid>
2011-02-16 17:35 ` Rabin Vincent
2011-02-16 19:20 ` Thomas Gleixner
2011-02-17 9:17 ` Russell King - ARM Linux
2011-02-17 9:38 ` Thomas Gleixner
2011-02-17 10:19 ` Russell King - ARM Linux
2011-02-17 10:43 ` Thomas Gleixner
2011-02-17 10:56 ` Russell King - ARM Linux
2011-02-17 11:21 ` Thomas Gleixner
2011-02-17 16:26 ` Will Deacon
2011-02-17 17:34 ` Thomas Gleixner
2011-02-17 23:38 ` Abhijeet Dharmapurikar
2011-02-18 11:29 ` Will Deacon
2011-02-18 11:42 ` Thomas Gleixner
2011-02-18 12:09 ` Will Deacon
[not found] ` <-8083923411736601789@unknownmsgid>
2011-02-18 18:30 ` Colin Cross
2011-02-18 18:36 ` Santosh Shilimkar
2011-02-18 18:57 ` Will Deacon
-- strict thread matches above, loose matches on Subject: below --
2011-02-10 12:29 Will Deacon
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