From: kgene.kim@samsung.com (Kukjin Kim)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH v6 5/7] ARM: S5PV210: Access for DMCx registers
Date: Wed, 04 Aug 2010 20:17:50 +0900 [thread overview]
Message-ID: <001901cb33c6$b05542f0$10ffc8d0$%kim@samsung.com> (raw)
In-Reply-To: <1280829866-26001-6-git-send-email-myungjoo.ham@samsung.com>
MyungJoo Ham wrote:
>
> The CPUFREQ driver requires an access to DMCx registers. We
> define physical addresses and mapping between physical and virtual
> addresses of DMCx registers.
>
> Signed-off-by: MyungJoo Ham <myungjoo.ham@samsung.com>
> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
> ---
> arch/arm/mach-s5pv210/cpu.c | 12 +++++++++++-
> arch/arm/mach-s5pv210/include/mach/map.h | 4 ++++
> 2 files changed, 15 insertions(+), 1 deletions(-)
>
> diff --git a/arch/arm/mach-s5pv210/cpu.c b/arch/arm/mach-s5pv210/cpu.c
> index 74d4c08..2066695 100644
> --- a/arch/arm/mach-s5pv210/cpu.c
> +++ b/arch/arm/mach-s5pv210/cpu.c
> @@ -60,7 +60,17 @@ static struct map_desc s5pv210_iodesc[] __initdata = {
> .pfn = __phys_to_pfn(S5PV210_PA_SROMC),
> .length = SZ_4K,
> .type = MT_DEVICE,
> - }
> + }, {
> + .virtual = (unsigned long)S5P_VA_DMC0,
> + .pfn = __phys_to_pfn(S5PV210_PA_DMC0),
> + .length = SZ_4K,
> + .type = MT_DEVICE,
> + }, {
> + .virtual = (unsigned long)S5P_VA_DMC1,
> + .pfn = __phys_to_pfn(S5PV210_PA_DMC1),
> + .length = SZ_4K,
> + .type = MT_DEVICE,
> + },
> };
>
> static void s5pv210_idle(void)
> diff --git a/arch/arm/mach-s5pv210/include/mach/map.h b/arch/arm/mach-
> s5pv210/include/mach/map.h
> index 17687f0..daf6456 100644
> --- a/arch/arm/mach-s5pv210/include/mach/map.h
> +++ b/arch/arm/mach-s5pv210/include/mach/map.h
> @@ -108,4 +108,8 @@
> #define SAMSUNG_PA_ADC S5PV210_PA_ADC
> #define SAMSUNG_PA_KEYPAD S5PV210_PA_KEYPAD
>
> +/* DMC */
No need an obvious comment like above...
> +#define S5PV210_PA_DMC0 (0xF0000000)
> +#define S5PV210_PA_DMC1 (0xF1400000)
As I said, if you need adding new definition into the mach/map.h, please
keep the address order like others.
It can help to us for easily reading...
> +
> #endif /* __ASM_ARCH_MAP_H */
> --
And as I commented, to merge your 4th(previous, just adding VA) and 5th
patch to one is better...just for adding DMC map IO.
Thanks.
Best regards,
Kgene.
--
Kukjin Kim <kgene.kim@samsung.com>, Senior Engineer,
SW Solution Development Team, Samsung Electronics Co., Ltd.
next prev parent reply other threads:[~2010-08-04 11:17 UTC|newest]
Thread overview: 14+ messages / expand[flat|nested] mbox.gz Atom feed top
2010-08-03 10:04 [PATCH v6 0/7] ARM: S5PV210: CPUFREQ Initial Support MyungJoo Ham
2010-08-03 10:04 ` [PATCH v6 1/7] ARM: S5PV210: Allow to probe EVT revision number MyungJoo Ham
2010-08-03 10:04 ` [PATCH v6 2/7] ARM: Samsung SoC: added hclk/pclk info to s3c_freq for s5pv210 cpu-freq MyungJoo Ham
2010-08-03 10:04 ` [PATCH v6 3/7] ARM: S5P: Added default pll values for APLL 800/1000MHz MyungJoo Ham
2010-08-03 10:04 ` [PATCH v6 4/7] ARM: S5P: Virtual Addresses for DMCx registers MyungJoo Ham
2010-08-03 10:04 ` [PATCH v6 5/7] ARM: S5PV210: Access " MyungJoo Ham
2010-08-03 10:04 ` [PATCH v6 6/7] ARM: S5PV210: clock registers (CLK_DIV/SRC/STAT) MyungJoo Ham
2010-08-03 10:04 ` [PATCH v6 7/7] ARM: S5PV210: Initial CPUFREQ Support MyungJoo Ham
2010-08-04 11:44 ` Kukjin Kim
2010-08-04 11:34 ` [PATCH v6 6/7] ARM: S5PV210: clock registers (CLK_DIV/SRC/STAT) Kukjin Kim
2010-08-04 11:17 ` Kukjin Kim [this message]
2010-08-04 13:36 ` [PATCH v6 5/7] ARM: S5PV210: Access for DMCx registers Kyungmin Park
2010-08-10 5:29 ` MyungJoo Ham
2010-08-04 11:29 ` [PATCH v6 1/7] ARM: S5PV210: Allow to probe EVT revision number Kukjin Kim
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