[PATCH 0/5] ARM: S5P: Update DMA operation clock

[PATCH 0/5] ARM: S5P: Update DMA operation clock

[Kukjin Kim]

This patch updates Peri-DMA (PL330) operation clock on S5P SoCs which
have PL330 DMAC. Basically, registered PDMA clocks as disabled clock
and enabled when called pl330-probe() in s3c-pl330.c.

[PATCH 1/5] ARM: S5P6442: Add DMA operation clock
[PATCH 2/5] ARM: S5PV210: Add DMA operation clock
[PATCH 3/5] ARM: S5P64X0: Set DMA clock disable as default
[PATCH 4/5] ARM: S5P: Reorder DMA platform device id
[PATCH 5/5] ARM: SAMSUNG: Add to enable/disable clock on S3C PL330

[PATCH 1/5] ARM: S5P6442: Add DMA operation clock

[Kukjin Kim]

From: Seungwhan Youn <sw.youn@samsung.com>

This patch adds DMA operation clock which is disabled as default.

Signed-off-by: Seungwhan Youn <sw.youn@samsung.com>
Acked-by: Jassi Brar <jassi.brar@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
---
 arch/arm/mach-s5p6442/clock.c                   |   28 +++++++++++++++++++++++
 arch/arm/mach-s5p6442/include/mach/regs-clock.h |    1 +
 2 files changed, 29 insertions(+), 0 deletions(-)

diff --git a/arch/arm/mach-s5p6442/clock.c b/arch/arm/mach-s5p6442/clock.c
index dcd20f1..16d6e7e 100644
--- a/arch/arm/mach-s5p6442/clock.c
+++ b/arch/arm/mach-s5p6442/clock.c
@@ -192,6 +192,11 @@ static struct clk clk_pclkd1 = {
 	.parent		= &clk_hclkd1,
 };
 
+int s5p6442_clk_ip0_ctrl(struct clk *clk, int enable)
+{
+	return s5p_gatectrl(S5P_CLKGATE_IP0, clk, enable);
+}
+
 int s5p6442_clk_ip3_ctrl(struct clk *clk, int enable)
 {
 	return s5p_gatectrl(S5P_CLKGATE_IP3, clk, enable);
@@ -335,6 +340,16 @@ void __init_or_cpufreq s5p6442_setup_clocks(void)
 	clk_pclkd1.rate = pclkd1;
 }
 
+static struct clk init_clocks_disable[] = {
+	{
+		.name		= "pdma",
+		.id		= -1,
+		.parent		= &clk_pclkd1,
+		.enable		= s5p6442_clk_ip0_ctrl,
+		.ctrlbit	= (1 << 3),
+	},
+};
+
 static struct clk init_clocks[] = {
 	{
 		.name		= "systimer",
@@ -393,10 +408,23 @@ static struct clk *clks[] __initdata = {
 
 void __init s5p6442_register_clocks(void)
 {
+	struct clk *clkptr;
+	int i, ret;
+
 	s3c24xx_register_clocks(clks, ARRAY_SIZE(clks));
 
 	s3c_register_clksrc(clksrcs, ARRAY_SIZE(clksrcs));
 	s3c_register_clocks(init_clocks, ARRAY_SIZE(init_clocks));
 
+	clkptr = init_clocks_disable;
+	for (i = 0; i < ARRAY_SIZE(init_clocks_disable); i++, clkptr++) {
+		ret = s3c24xx_register_clock(clkptr);
+		if (ret < 0) {
+			printk(KERN_ERR "Fail to register clock %s (%d)\n",
+					clkptr->name, ret);
+		} else
+			(clkptr->enable)(clkptr, 0);
+	}
+
 	s3c_pwmclk_init();
 }
diff --git a/arch/arm/mach-s5p6442/include/mach/regs-clock.h b/arch/arm/mach-s5p6442/include/mach/regs-clock.h
index d8360b5..00828a3 100644
--- a/arch/arm/mach-s5p6442/include/mach/regs-clock.h
+++ b/arch/arm/mach-s5p6442/include/mach/regs-clock.h
@@ -46,6 +46,7 @@
 #define S5P_CLK_DIV5		S5P_CLKREG(0x314)
 #define S5P_CLK_DIV6		S5P_CLKREG(0x318)
 
+#define S5P_CLKGATE_IP0		S5P_CLKREG(0x460)
 #define S5P_CLKGATE_IP3		S5P_CLKREG(0x46C)
 
 /* CLK_OUT */
-- 
1.6.2.5

[PATCH 2/5] ARM: S5PV210: Add DMA operation clock

[Kukjin Kim]

From: Seungwhan Youn <sw.youn@samsung.com>

This patch adds DMA operation clock which is disabled as default.

Signed-off-by: Seungwhan Youn <sw.youn@samsung.com>
Acked-by: Jassi Brar <jassi.brar@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
---
 arch/arm/mach-s5pv210/clock.c |   12 ++++++++++++
 1 files changed, 12 insertions(+), 0 deletions(-)

diff --git a/arch/arm/mach-s5pv210/clock.c b/arch/arm/mach-s5pv210/clock.c
index 38ad7e5..019c3a6 100644
--- a/arch/arm/mach-s5pv210/clock.c
+++ b/arch/arm/mach-s5pv210/clock.c
@@ -311,6 +311,18 @@ static struct clk_ops clk_fout_apll_ops = {
 
 static struct clk init_clocks_disable[] = {
 	{
+		.name		= "pdma",
+		.id		= 0,
+		.parent		= &clk_hclk_psys.clk,
+		.enable		= s5pv210_clk_ip0_ctrl,
+		.ctrlbit	= (1 << 3),
+	}, {
+		.name		= "pdma",
+		.id		= 1,
+		.parent		= &clk_hclk_psys.clk,
+		.enable		= s5pv210_clk_ip0_ctrl,
+		.ctrlbit	= (1 << 4),
+	}, {
 		.name		= "rot",
 		.id		= -1,
 		.parent		= &clk_hclk_dsys.clk,
-- 
1.6.2.5

[PATCH 3/5] ARM: S5P64X0: Set DMA clock disable as default

[Kukjin Kim]

From: Seungwhan Youn <sw.youn@samsung.com>

This patch modify to DMA operation clock into disable list for default
clock setting.

Signed-off-by: Seungwhan Youn <sw.youn@samsung.com>
Acked-by: Jassi Brar <jassi.brar@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
---
 arch/arm/mach-s5p64x0/clock-s5p6440.c |   12 ++++++------
 arch/arm/mach-s5p64x0/clock-s5p6450.c |   12 ++++++------
 2 files changed, 12 insertions(+), 12 deletions(-)

diff --git a/arch/arm/mach-s5p64x0/clock-s5p6440.c b/arch/arm/mach-s5p64x0/clock-s5p6440.c
index 0d728d3..e4883dc 100644
--- a/arch/arm/mach-s5p64x0/clock-s5p6440.c
+++ b/arch/arm/mach-s5p64x0/clock-s5p6440.c
@@ -153,6 +153,12 @@ static struct clk init_clocks_disable[] = {
 		.enable		= s5p64x0_hclk0_ctrl,
 		.ctrlbit	= (1 << 8),
 	}, {
+		.name		= "pdma",
+		.id		= -1,
+		.parent		= &clk_hclk_low.clk,
+		.enable		= s5p64x0_hclk0_ctrl,
+		.ctrlbit	= (1 << 12),
+	}, {
 		.name		= "hsmmc",
 		.id		= 0,
 		.parent		= &clk_hclk_low.clk,
@@ -334,12 +340,6 @@ static struct clk init_clocks[] = {
 		.enable		= s5p64x0_hclk0_ctrl,
 		.ctrlbit	= (1 << 21),
 	}, {
-		.name		= "dma",
-		.id		= -1,
-		.parent		= &clk_hclk_low.clk,
-		.enable		= s5p64x0_hclk0_ctrl,
-		.ctrlbit	= (1 << 12),
-	}, {
 		.name		= "uart",
 		.id		= 0,
 		.parent		= &clk_pclk_low.clk,
diff --git a/arch/arm/mach-s5p64x0/clock-s5p6450.c b/arch/arm/mach-s5p64x0/clock-s5p6450.c
index 1b9b0f9..7dbf3c9 100644
--- a/arch/arm/mach-s5p64x0/clock-s5p6450.c
+++ b/arch/arm/mach-s5p64x0/clock-s5p6450.c
@@ -189,6 +189,12 @@ static struct clk init_clocks_disable[] = {
 		.enable		= s5p64x0_hclk0_ctrl,
 		.ctrlbit	= (1 << 3),
 	}, {
+		.name		= "pdma",
+		.id		= -1,
+		.parent		= &clk_hclk_low.clk,
+		.enable		= s5p64x0_hclk0_ctrl,
+		.ctrlbit	= (1 << 12),
+	}, {
 		.name		= "hsmmc",
 		.id		= 0,
 		.parent		= &clk_hclk_low.clk,
@@ -286,12 +292,6 @@ static struct clk init_clocks[] = {
 		.enable		= s5p64x0_hclk0_ctrl,
 		.ctrlbit	= (1 << 21),
 	}, {
-		.name		= "dma",
-		.id		= -1,
-		.parent		= &clk_hclk_low.clk,
-		.enable		= s5p64x0_hclk0_ctrl,
-		.ctrlbit	= (1 << 12),
-	}, {
 		.name		= "uart",
 		.id		= 0,
 		.parent		= &clk_pclk_low.clk,
-- 
1.6.2.5

[PATCH 4/5] ARM: S5P: Reorder DMA platform device id

[Kukjin Kim]

From: Seungwhan Youn <sw.youn@samsung.com>

This patch is matched-up DMA platform device id to it's clock id.

Signed-off-by: Seungwhan Youn <sw.youn@samsung.com>
Acked-by: Jassi Brar <jassi.brar@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
---
 arch/arm/mach-s5p6442/dma.c |    2 +-
 arch/arm/mach-s5p64x0/dma.c |    2 +-
 arch/arm/mach-s5pc100/dma.c |    4 ++--
 arch/arm/mach-s5pv210/dma.c |    4 ++--
 4 files changed, 6 insertions(+), 6 deletions(-)

diff --git a/arch/arm/mach-s5p6442/dma.c b/arch/arm/mach-s5p6442/dma.c
index ad4f870..7dfb136 100644
--- a/arch/arm/mach-s5p6442/dma.c
+++ b/arch/arm/mach-s5p6442/dma.c
@@ -82,7 +82,7 @@ static struct s3c_pl330_platdata s5p6442_pdma_pdata = {
 
 static struct platform_device s5p6442_device_pdma = {
 	.name		= "s3c-pl330",
-	.id		= 1,
+	.id		= -1,
 	.num_resources	= ARRAY_SIZE(s5p6442_pdma_resource),
 	.resource	= s5p6442_pdma_resource,
 	.dev		= {
diff --git a/arch/arm/mach-s5p64x0/dma.c b/arch/arm/mach-s5p64x0/dma.c
index 29a8c24..d7ad944 100644
--- a/arch/arm/mach-s5p64x0/dma.c
+++ b/arch/arm/mach-s5p64x0/dma.c
@@ -122,7 +122,7 @@ static struct s3c_pl330_platdata s5p6450_pdma_pdata = {
 
 static struct platform_device s5p64x0_device_pdma = {
 	.name		= "s3c-pl330",
-	.id		= 0,
+	.id		= -1,
 	.num_resources	= ARRAY_SIZE(s5p64x0_pdma_resource),
 	.resource	= s5p64x0_pdma_resource,
 	.dev		= {
diff --git a/arch/arm/mach-s5pc100/dma.c b/arch/arm/mach-s5pc100/dma.c
index 0f55175..bf4cd0f 100644
--- a/arch/arm/mach-s5pc100/dma.c
+++ b/arch/arm/mach-s5pc100/dma.c
@@ -81,7 +81,7 @@ static struct s3c_pl330_platdata s5pc100_pdma0_pdata = {
 
 static struct platform_device s5pc100_device_pdma0 = {
 	.name		= "s3c-pl330",
-	.id		= 1,
+	.id		= 0,
 	.num_resources	= ARRAY_SIZE(s5pc100_pdma0_resource),
 	.resource	= s5pc100_pdma0_resource,
 	.dev		= {
@@ -143,7 +143,7 @@ static struct s3c_pl330_platdata s5pc100_pdma1_pdata = {
 
 static struct platform_device s5pc100_device_pdma1 = {
 	.name		= "s3c-pl330",
-	.id		= 2,
+	.id		= 1,
 	.num_resources	= ARRAY_SIZE(s5pc100_pdma1_resource),
 	.resource	= s5pc100_pdma1_resource,
 	.dev		= {
diff --git a/arch/arm/mach-s5pv210/dma.c b/arch/arm/mach-s5pv210/dma.c
index 778ad5f..497d343 100644
--- a/arch/arm/mach-s5pv210/dma.c
+++ b/arch/arm/mach-s5pv210/dma.c
@@ -82,7 +82,7 @@ static struct s3c_pl330_platdata s5pv210_pdma0_pdata = {
 
 static struct platform_device s5pv210_device_pdma0 = {
 	.name		= "s3c-pl330",
-	.id		= 1,
+	.id		= 0,
 	.num_resources	= ARRAY_SIZE(s5pv210_pdma0_resource),
 	.resource	= s5pv210_pdma0_resource,
 	.dev		= {
@@ -144,7 +144,7 @@ static struct s3c_pl330_platdata s5pv210_pdma1_pdata = {
 
 static struct platform_device s5pv210_device_pdma1 = {
 	.name		= "s3c-pl330",
-	.id		= 2,
+	.id		= 1,
 	.num_resources	= ARRAY_SIZE(s5pv210_pdma1_resource),
 	.resource	= s5pv210_pdma1_resource,
 	.dev		= {
-- 
1.6.2.5

[PATCH 5/5] ARM: SAMSUNG: Add to enable/disable clock on S3C PL330

[Kukjin Kim]

From: Seungwhan Youn <sw.youn@samsung.com>

This patch adds to enable/disable DMA operation clock on S3C-PL330
DMA controller driver.

Signed-off-by: Seungwhan Youn <sw.youn@samsung.com>
Acked-by: Jassi Brar <jassi.brar@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
---
 arch/arm/plat-samsung/s3c-pl330.c |   34 +++++++++++++++++++++++++++-------
 1 files changed, 27 insertions(+), 7 deletions(-)

diff --git a/arch/arm/plat-samsung/s3c-pl330.c b/arch/arm/plat-samsung/s3c-pl330.c
index a91305a..b4ff8d7 100644
--- a/arch/arm/plat-samsung/s3c-pl330.c
+++ b/arch/arm/plat-samsung/s3c-pl330.c
@@ -15,6 +15,8 @@
 #include <linux/io.h>
 #include <linux/slab.h>
 #include <linux/platform_device.h>
+#include <linux/clk.h>
+#include <linux/err.h>
 
 #include <asm/hardware/pl330.h>
 
@@ -27,6 +29,7 @@
  * @node: To attach to the global list of DMACs.
  * @pi: PL330 configuration info for the DMAC.
  * @kmcache: Pool to quickly allocate xfers for all channels in the dmac.
+ * @clk: Pointer of DMAC operation clock.
  */
 struct s3c_pl330_dmac {
 	unsigned		busy_chan;
@@ -34,6 +37,7 @@ struct s3c_pl330_dmac {
 	struct list_head	node;
 	struct pl330_info	*pi;
 	struct kmem_cache	*kmcache;
+	struct clk		*clk;
 };
 
 /**
@@ -1072,16 +1076,25 @@ static int pl330_probe(struct platform_device *pdev)
 	if (ret)
 		goto probe_err4;
 
-	ret = pl330_add(pl330_info);
-	if (ret)
-		goto probe_err5;
-
 	/* Allocate a new DMAC */
 	s3c_pl330_dmac = kmalloc(sizeof(*s3c_pl330_dmac), GFP_KERNEL);
 	if (!s3c_pl330_dmac) {
 		ret = -ENOMEM;
+		goto probe_err5;
+	}
+
+	/* Get operation clock and enable it */
+	s3c_pl330_dmac->clk = clk_get(&pdev->dev, "pdma");
+	if (IS_ERR(s3c_pl330_dmac->clk)) {
+		dev_err(&pdev->dev, "Cannot get operation clock.\n");
+		ret = -EINVAL;
 		goto probe_err6;
 	}
+	clk_enable(s3c_pl330_dmac->clk);
+
+	ret = pl330_add(pl330_info);
+	if (ret)
+		goto probe_err7;
 
 	/* Hook the info */
 	s3c_pl330_dmac->pi = pl330_info;
@@ -1094,7 +1107,7 @@ static int pl330_probe(struct platform_device *pdev)
 
 	if (!s3c_pl330_dmac->kmcache) {
 		ret = -ENOMEM;
-		goto probe_err7;
+		goto probe_err8;
 	}
 
 	/* Get the list of peripherals */
@@ -1120,10 +1133,13 @@ static int pl330_probe(struct platform_device *pdev)
 
 	return 0;
 
+probe_err8:
+	pl330_del(pl330_info);
 probe_err7:
-	kfree(s3c_pl330_dmac);
+	clk_disable(s3c_pl330_dmac->clk);
+	clk_put(s3c_pl330_dmac->clk);
 probe_err6:
-	pl330_del(pl330_info);
+	kfree(s3c_pl330_dmac);
 probe_err5:
 	free_irq(irq, pl330_info);
 probe_err4:
@@ -1188,6 +1204,10 @@ static int pl330_remove(struct platform_device *pdev)
 		}
 	}
 
+	/* Disable operation clock */
+	clk_disable(dmac->clk);
+	clk_put(dmac->clk);
+
 	/* Remove the DMAC */
 	list_del(&dmac->node);
 	kfree(dmac);
-- 
1.6.2.5

[PATCH 5/5] ARM: SAMSUNG: Add to enable/disable clock on S3C PL330

[Kyungmin Park]

On Thu, Oct 21, 2010 at 9:58 AM, Kukjin Kim <kgene.kim@samsung.com> wrote:
> From: Seungwhan Youn <sw.youn@samsung.com>
>
> This patch adds to enable/disable DMA operation clock on S3C-PL330
> DMA controller driver.

The title and description seems to clock gating but actual code is
just enable at probe and disable at remove.

Can you make it REAL clock gating, enable clock only when using?

Thank you,
Kyungmin Park
>
> Signed-off-by: Seungwhan Youn <sw.youn@samsung.com>
> Acked-by: Jassi Brar <jassi.brar@samsung.com>
> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
> ---
> ?arch/arm/plat-samsung/s3c-pl330.c | ? 34 +++++++++++++++++++++++++++-------
> ?1 files changed, 27 insertions(+), 7 deletions(-)
>
> diff --git a/arch/arm/plat-samsung/s3c-pl330.c b/arch/arm/plat-samsung/s3c-pl330.c
> index a91305a..b4ff8d7 100644
> --- a/arch/arm/plat-samsung/s3c-pl330.c
> +++ b/arch/arm/plat-samsung/s3c-pl330.c
> @@ -15,6 +15,8 @@
> ?#include <linux/io.h>
> ?#include <linux/slab.h>
> ?#include <linux/platform_device.h>
> +#include <linux/clk.h>
> +#include <linux/err.h>
>
> ?#include <asm/hardware/pl330.h>
>
> @@ -27,6 +29,7 @@
> ?* @node: To attach to the global list of DMACs.
> ?* @pi: PL330 configuration info for the DMAC.
> ?* @kmcache: Pool to quickly allocate xfers for all channels in the dmac.
> + * @clk: Pointer of DMAC operation clock.
> ?*/
> ?struct s3c_pl330_dmac {
> ? ? ? ?unsigned ? ? ? ? ? ? ? ?busy_chan;
> @@ -34,6 +37,7 @@ struct s3c_pl330_dmac {
> ? ? ? ?struct list_head ? ? ? ?node;
> ? ? ? ?struct pl330_info ? ? ? *pi;
> ? ? ? ?struct kmem_cache ? ? ? *kmcache;
> + ? ? ? struct clk ? ? ? ? ? ? ?*clk;
> ?};
>
> ?/**
> @@ -1072,16 +1076,25 @@ static int pl330_probe(struct platform_device *pdev)
> ? ? ? ?if (ret)
> ? ? ? ? ? ? ? ?goto probe_err4;
>
> - ? ? ? ret = pl330_add(pl330_info);
> - ? ? ? if (ret)
> - ? ? ? ? ? ? ? goto probe_err5;
> -
> ? ? ? ?/* Allocate a new DMAC */
> ? ? ? ?s3c_pl330_dmac = kmalloc(sizeof(*s3c_pl330_dmac), GFP_KERNEL);
> ? ? ? ?if (!s3c_pl330_dmac) {
> ? ? ? ? ? ? ? ?ret = -ENOMEM;
> + ? ? ? ? ? ? ? goto probe_err5;
> + ? ? ? }
> +
> + ? ? ? /* Get operation clock and enable it */
> + ? ? ? s3c_pl330_dmac->clk = clk_get(&pdev->dev, "pdma");
> + ? ? ? if (IS_ERR(s3c_pl330_dmac->clk)) {
> + ? ? ? ? ? ? ? dev_err(&pdev->dev, "Cannot get operation clock.\n");
> + ? ? ? ? ? ? ? ret = -EINVAL;
> ? ? ? ? ? ? ? ?goto probe_err6;
> ? ? ? ?}
> + ? ? ? clk_enable(s3c_pl330_dmac->clk);
> +
> + ? ? ? ret = pl330_add(pl330_info);
> + ? ? ? if (ret)
> + ? ? ? ? ? ? ? goto probe_err7;
>
> ? ? ? ?/* Hook the info */
> ? ? ? ?s3c_pl330_dmac->pi = pl330_info;
> @@ -1094,7 +1107,7 @@ static int pl330_probe(struct platform_device *pdev)
>
> ? ? ? ?if (!s3c_pl330_dmac->kmcache) {
> ? ? ? ? ? ? ? ?ret = -ENOMEM;
> - ? ? ? ? ? ? ? goto probe_err7;
> + ? ? ? ? ? ? ? goto probe_err8;
> ? ? ? ?}
>
> ? ? ? ?/* Get the list of peripherals */
> @@ -1120,10 +1133,13 @@ static int pl330_probe(struct platform_device *pdev)
>
> ? ? ? ?return 0;
>
> +probe_err8:
> + ? ? ? pl330_del(pl330_info);
> ?probe_err7:
> - ? ? ? kfree(s3c_pl330_dmac);
> + ? ? ? clk_disable(s3c_pl330_dmac->clk);
> + ? ? ? clk_put(s3c_pl330_dmac->clk);
> ?probe_err6:
> - ? ? ? pl330_del(pl330_info);
> + ? ? ? kfree(s3c_pl330_dmac);
> ?probe_err5:
> ? ? ? ?free_irq(irq, pl330_info);
> ?probe_err4:
> @@ -1188,6 +1204,10 @@ static int pl330_remove(struct platform_device *pdev)
> ? ? ? ? ? ? ? ?}
> ? ? ? ?}
>
> + ? ? ? /* Disable operation clock */
> + ? ? ? clk_disable(dmac->clk);
> + ? ? ? clk_put(dmac->clk);
> +
> ? ? ? ?/* Remove the DMAC */
> ? ? ? ?list_del(&dmac->node);
> ? ? ? ?kfree(dmac);
> --
> 1.6.2.5
>
> --
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[PATCH 5/5] ARM: SAMSUNG: Add to enable/disable clock on S3C PL330

[Jassi Brar]

On Thu, Oct 21, 2010 at 10:32 AM, Kyungmin Park <kmpark@infradead.org> wrote:
> On Thu, Oct 21, 2010 at 9:58 AM, Kukjin Kim <kgene.kim@samsung.com> wrote:
>> From: Seungwhan Youn <sw.youn@samsung.com>
>>
>> This patch adds to enable/disable DMA operation clock on S3C-PL330
>> DMA controller driver.
>
> The title and description seems to clock gating but actual code is
> just enable at probe and disable at remove.
>
> Can you make it REAL clock gating, enable clock only when using?

Of course we can. But that will need some intrusive changes.
Later, we'll implement that desirable feature.
For now, many SoCs don't detect PL330 since the clocks are gated
by default and we don't enable them in driver. So, this is just to get
latest SoCs' PL330 working.

[PATCH 5/5] ARM: SAMSUNG: Add to enable/disable clock on S3C PL330

[Kyungmin Park]

On Thu, Oct 21, 2010 at 10:45 AM, Jassi Brar <jassisinghbrar@gmail.com> wrote:
> On Thu, Oct 21, 2010 at 10:32 AM, Kyungmin Park <kmpark@infradead.org> wrote:
>> On Thu, Oct 21, 2010 at 9:58 AM, Kukjin Kim <kgene.kim@samsung.com> wrote:
>>> From: Seungwhan Youn <sw.youn@samsung.com>
>>>
>>> This patch adds to enable/disable DMA operation clock on S3C-PL330
>>> DMA controller driver.
>>
>> The title and description seems to clock gating but actual code is
>> just enable at probe and disable at remove.
>>
>> Can you make it REAL clock gating, enable clock only when using?
>
> Of course we can. But that will need some intrusive changes.
> Later, we'll implement that desirable feature.
> For now, many SoCs don't detect PL330 since the clocks are gated
> by default and we don't enable them in driver. So, this is just to get
> latest SoCs' PL330 working.

I see even though I don't know "later" is how much

and include the s5pc210 code also at this patchset.

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[PATCH 5/5] ARM: SAMSUNG: Add to enable/disable clock on S3C PL330

[Jassi Brar]

On Thu, Oct 21, 2010 at 10:49 AM, Kyungmin Park <kmpark@infradead.org> wrote:
>>> Can you make it REAL clock gating, enable clock only when using?
>>
>> Of course we can. But that will need some intrusive changes.
>> Later, we'll implement that desirable feature.
>> For now, many SoCs don't detect PL330 since the clocks are gated
>> by default and we don't enable them in driver. So, this is just to get
>> latest SoCs' PL330 working.
>
> I see even though I don't know "later" is how much

We (apparently) don't have fixed policy about which devices have their clocks
enabled by default and which don't.
So, by default PL330 clock is enabled on some platforms and not on others.
This patch only makes sure the PL330 works on all platforms at boot-time.


> and include the s5pc210 code also at this patchset.
Yes, all platforms should be enabled for PL330 driver.

[PATCH 5/5] ARM: SAMSUNG: Add to enable/disable clock on S3C PL330

[Kyungmin Park]

On Thu, Oct 21, 2010 at 10:54 AM, Jassi Brar <jassisinghbrar@gmail.com> wrote:
> On Thu, Oct 21, 2010 at 10:49 AM, Kyungmin Park <kmpark@infradead.org> wrote:
>>>> Can you make it REAL clock gating, enable clock only when using?
>>>
>>> Of course we can. But that will need some intrusive changes.
>>> Later, we'll implement that desirable feature.
>>> For now, many SoCs don't detect PL330 since the clocks are gated
>>> by default and we don't enable them in driver. So, this is just to get
>>> latest SoCs' PL330 working.
>>
>> I see even though I don't know "later" is how much
>
> We (apparently) don't have fixed policy about which devices have their clocks
> enabled by default and which don't.
> So, by default PL330 clock is enabled on some platforms and not on others.
> This patch only makes sure the PL330 works on all platforms at boot-time.
>
>
>> and include the s5pc210 code also at this patchset.
> Yes, all platforms should be enabled for PL330 driver.
BTW, what's the id of mdma and which clock at c210?
> --
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> the body of a message to majordomo at vger.kernel.org
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>

[PATCH 5/5] ARM: SAMSUNG: Add to enable/disable clock on S3C PL330

[Jassi Brar]

On Thu, Oct 21, 2010 at 11:12 AM, Kyungmin Park <kmpark@infradead.org> wrote:

> BTW, what's the id of mdma and which clock at c210?

MDMA is not yet supported in Samsung mainline.
Any ID can be assigned as long as it doesn't conflict with other DMAs
and resources correctly attached to it.

[PATCH 5/5] ARM: SAMSUNG: Add to enable/disable clock on S3C PL330

[Kukjin Kim]

Kyungmin Park wrote:
> 
> On Thu, Oct 21, 2010 at 9:58 AM, Kukjin Kim <kgene.kim@samsung.com> wrote:
> > From: Seungwhan Youn <sw.youn@samsung.com>
> >
> > This patch adds to enable/disable DMA operation clock on S3C-PL330
> > DMA controller driver.
> 
> The title and description seems to clock gating but actual code is
> just enable at probe and disable at remove.
> 
> Can you make it REAL clock gating, enable clock only when using?
> 

This is just to move DMA enable/disable clock into DMA driver(S3C PL330).
So it would be better if we could discuss about what you said next time.

Basically, I prefer most clocks should be registered as disabled, then if
required enable, just should be controlled in each driver.

Thanks.

Best regards,
Kgene.
--
Kukjin Kim <kgene.kim@samsung.com>, Senior Engineer,
SW Solution Development Team, Samsung Electronics Co., Ltd.

[PATCH 5/5] ARM: SAMSUNG: Add to enable/disable clock on S3C PL330

[Kukjin Kim]

Jassi Brar wrote:
> 
> On Thu, Oct 21, 2010 at 10:49 AM, Kyungmin Park <kmpark@infradead.org> wrote:
> >>> Can you make it REAL clock gating, enable clock only when using?
> >>
> >> Of course we can. But that will need some intrusive changes.
> >> Later, we'll implement that desirable feature.
> >> For now, many SoCs don't detect PL330 since the clocks are gated
> >> by default and we don't enable them in driver. So, this is just to get
> >> latest SoCs' PL330 working.
> >
> > I see even though I don't know "later" is how much
> 
> We (apparently) don't have fixed policy about which devices have their clocks
> enabled by default and which don't.
> So, by default PL330 clock is enabled on some platforms and not on others.
> This patch only makes sure the PL330 works on all platforms at boot-time.
> 
> 
> > and include the s5pc210 code also at this patchset.
> Yes, all platforms should be enabled for PL330 driver.

If we want to use S5PV310/S5PC210 DMA now, need implementation some stuff of it.

Thanks.

Best regards,
Kgene.
--
Kukjin Kim <kgene.kim@samsung.com>, Senior Engineer,
SW Solution Development Team, Samsung Electronics Co., Ltd.

[PATCH 5/5] ARM: SAMSUNG: Add to enable/disable clock on S3C PL330

[Kyungmin Park]

On Thu, Oct 21, 2010 at 11:36 AM, Kukjin Kim <kgene.kim@samsung.com> wrote:
> Kyungmin Park wrote:
>>
>> On Thu, Oct 21, 2010 at 9:58 AM, Kukjin Kim <kgene.kim@samsung.com> wrote:
>> > From: Seungwhan Youn <sw.youn@samsung.com>
>> >
>> > This patch adds to enable/disable DMA operation clock on S3C-PL330
>> > DMA controller driver.
>>
>> The title and description seems to clock gating but actual code is
>> just enable at probe and disable at remove.
>>
>> Can you make it REAL clock gating, enable clock only when using?
>>
>
> This is just to move DMA enable/disable clock into DMA driver(S3C PL330).
> So it would be better if we could discuss about what you said next time.
>
> Basically, I prefer most clocks should be registered as disabled, then if
> required enable, just should be controlled in each driver.

And support clock & block gating basically at drivers.
>
> Thanks.
>
> Best regards,
> Kgene.
> --
> Kukjin Kim <kgene.kim@samsung.com>, Senior Engineer,
> SW Solution Development Team, Samsung Electronics Co., Ltd.
>
> --
> To unsubscribe from this list: send the line "unsubscribe linux-samsung-soc" in
> the body of a message to majordomo at vger.kernel.org
> More majordomo info at ?http://vger.kernel.org/majordomo-info.html
>

[PATCH 1/5] ARM: S5P6442: Add DMA operation clock

[Ben Dooks]

On 21/10/10 01:58, Kukjin Kim wrote:
> From: Seungwhan Youn <sw.youn@samsung.com>
> 
> This patch adds DMA operation clock which is disabled as default.
> 
> Signed-off-by: Seungwhan Youn <sw.youn@samsung.com>
> Acked-by: Jassi Brar <jassi.brar@samsung.com>
> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
> ---
>  arch/arm/mach-s5p6442/clock.c                   |   28 +++++++++++++++++++++++
>  arch/arm/mach-s5p6442/include/mach/regs-clock.h |    1 +
>  2 files changed, 29 insertions(+), 0 deletions(-)
> 
> diff --git a/arch/arm/mach-s5p6442/clock.c b/arch/arm/mach-s5p6442/clock.c
> index dcd20f1..16d6e7e 100644
> --- a/arch/arm/mach-s5p6442/clock.c
> +++ b/arch/arm/mach-s5p6442/clock.c
> @@ -192,6 +192,11 @@ static struct clk clk_pclkd1 = {
>  	.parent		= &clk_hclkd1,
>  };
>  
> +int s5p6442_clk_ip0_ctrl(struct clk *clk, int enable)
> +{
> +	return s5p_gatectrl(S5P_CLKGATE_IP0, clk, enable);
> +}
> +
>  int s5p6442_clk_ip3_ctrl(struct clk *clk, int enable)
>  {
>  	return s5p_gatectrl(S5P_CLKGATE_IP3, clk, enable);
> @@ -335,6 +340,16 @@ void __init_or_cpufreq s5p6442_setup_clocks(void)
>  	clk_pclkd1.rate = pclkd1;
>  }
>  
> +static struct clk init_clocks_disable[] = {
> +	{
> +		.name		= "pdma",
> +		.id		= -1,
> +		.parent		= &clk_pclkd1,
> +		.enable		= s5p6442_clk_ip0_ctrl,
> +		.ctrlbit	= (1 << 3),
> +	},
> +};
> +
>  static struct clk init_clocks[] = {
>  	{
>  		.name		= "systimer",
> @@ -393,10 +408,23 @@ static struct clk *clks[] __initdata = {
>  
>  void __init s5p6442_register_clocks(void)
>  {
> +	struct clk *clkptr;
> +	int i, ret;
> +
>  	s3c24xx_register_clocks(clks, ARRAY_SIZE(clks));
>  
>  	s3c_register_clksrc(clksrcs, ARRAY_SIZE(clksrcs));
>  	s3c_register_clocks(init_clocks, ARRAY_SIZE(init_clocks));
>  
> +	clkptr = init_clocks_disable;
> +	for (i = 0; i < ARRAY_SIZE(init_clocks_disable); i++, clkptr++) {
> +		ret = s3c24xx_register_clock(clkptr);
> +		if (ret < 0) {
> +			printk(KERN_ERR "Fail to register clock %s (%d)\n",
> +					clkptr->name, ret);
> +		} else
> +			(clkptr->enable)(clkptr, 0);
> +	}

how about using s3c_register_clocks and then s3c_disable_clocks() ?

[PATCH 1/5] ARM: S5P6442: Add DMA operation clock

[Kukjin Kim]

Ben Dooks wrote:
> 
> On 21/10/10 01:58, Kukjin Kim wrote:
> > From: Seungwhan Youn <sw.youn@samsung.com>
> >
> > This patch adds DMA operation clock which is disabled as default.
> >
> > Signed-off-by: Seungwhan Youn <sw.youn@samsung.com>
> > Acked-by: Jassi Brar <jassi.brar@samsung.com>
> > Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
> > ---
> >  arch/arm/mach-s5p6442/clock.c                   |   28
> +++++++++++++++++++++++
> >  arch/arm/mach-s5p6442/include/mach/regs-clock.h |    1 +
> >  2 files changed, 29 insertions(+), 0 deletions(-)
> >
> > diff --git a/arch/arm/mach-s5p6442/clock.c
b/arch/arm/mach-s5p6442/clock.c
> > index dcd20f1..16d6e7e 100644
> > --- a/arch/arm/mach-s5p6442/clock.c
> > +++ b/arch/arm/mach-s5p6442/clock.c
> > @@ -192,6 +192,11 @@ static struct clk clk_pclkd1 = {
> >  	.parent		= &clk_hclkd1,
> >  };
> >
> > +int s5p6442_clk_ip0_ctrl(struct clk *clk, int enable)
> > +{
> > +	return s5p_gatectrl(S5P_CLKGATE_IP0, clk, enable);
> > +}
> > +
> >  int s5p6442_clk_ip3_ctrl(struct clk *clk, int enable)
> >  {
> >  	return s5p_gatectrl(S5P_CLKGATE_IP3, clk, enable);
> > @@ -335,6 +340,16 @@ void __init_or_cpufreq s5p6442_setup_clocks(void)
> >  	clk_pclkd1.rate = pclkd1;
> >  }
> >
> > +static struct clk init_clocks_disable[] = {
> > +	{
> > +		.name		= "pdma",
> > +		.id		= -1,
> > +		.parent		= &clk_pclkd1,
> > +		.enable		= s5p6442_clk_ip0_ctrl,
> > +		.ctrlbit	= (1 << 3),
> > +	},
> > +};
> > +
> >  static struct clk init_clocks[] = {
> >  	{
> >  		.name		= "systimer",
> > @@ -393,10 +408,23 @@ static struct clk *clks[] __initdata = {
> >
> >  void __init s5p6442_register_clocks(void)
> >  {
> > +	struct clk *clkptr;
> > +	int i, ret;
> > +
> >  	s3c24xx_register_clocks(clks, ARRAY_SIZE(clks));
> >
> >  	s3c_register_clksrc(clksrcs, ARRAY_SIZE(clksrcs));
> >  	s3c_register_clocks(init_clocks, ARRAY_SIZE(init_clocks));
> >
> > +	clkptr = init_clocks_disable;
> > +	for (i = 0; i < ARRAY_SIZE(init_clocks_disable); i++, clkptr++) {
> > +		ret = s3c24xx_register_clock(clkptr);
> > +		if (ret < 0) {
> > +			printk(KERN_ERR "Fail to register clock %s (%d)\n",
> > +					clkptr->name, ret);
> > +		} else
> > +			(clkptr->enable)(clkptr, 0);
> > +	}
> 
> how about using s3c_register_clocks and then s3c_disable_clocks() ?

Yeah, your suggestion is better to me also :-)
But I think other Samsung SoCs need it too..so I'd like to apply this now
then will update all regarding stuff for our Samsung SoCs soon..if you're
ok.

Thanks.

Best regards,
Kgene.
--
Kukjin Kim <kgene.kim@samsung.com>, Senior Engineer,
SW Solution Development Team, Samsung Electronics Co., Ltd.