* [PATCH 01/11] ARM: EXYNOS4: Add EXYNOS4 CPU initialization support
2011-02-14 8:22 [PATCH 0/11] ARM: EXYNOS4: Change ARCH name, ARCH_EXYNOS4 from ARCH_S5PV310 Kukjin Kim
@ 2011-02-14 8:22 ` Kukjin Kim
2011-02-14 8:22 ` [PATCH 02/11] ARM: EXYNOS4: Update Clock part Kukjin Kim
` (11 subsequent siblings)
12 siblings, 0 replies; 20+ messages in thread
From: Kukjin Kim @ 2011-02-14 8:22 UTC (permalink / raw)
To: linux-arm-kernel
This patch adds EXYNOS4 CPU support files in mach-exynos4,
and basically they are moved from mach-s5pv310 so that it
can support Samsung's new CPU name, EXYNOS4.
The EXYNOS4 ingegrates a ARM Cortex A9 multi-core.
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
---
arch/arm/{mach-s5pv310 => mach-exynos4}/cpu.c | 87 ++++++------
arch/arm/{mach-s5pv310 => mach-exynos4}/cpufreq.c | 100 +++++++-------
arch/arm/{mach-s5pv310 => mach-exynos4}/dma.c | 50 ++++---
arch/arm/{mach-s5pv310 => mach-exynos4}/gpiolib.c | 154 ++++++++++----------
arch/arm/{mach-s5pv310 => mach-exynos4}/headsmp.S | 6 +-
arch/arm/{mach-s5pv310 => mach-exynos4}/hotplug.c | 2 +-
.../include/mach/debug-macro.S | 6 +-
.../include/mach/dma.h | 0
.../include/mach/entry-macro.S | 4 +-
arch/arm/mach-exynos4/include/mach/gpio.h | 135 +++++++++++++++++
.../include/mach/hardware.h | 8 +-
.../include/mach/io.h | 8 +-
arch/arm/mach-exynos4/include/mach/map.h | 144 ++++++++++++++++++
.../include/mach/memory.h | 8 +-
arch/arm/mach-exynos4/include/mach/regs-gpio.h | 42 ++++++
.../include/mach/regs-mem.h | 6 +-
.../include/mach/regs-pmu.h | 8 +-
.../include/mach/regs-sysmmu.h | 6 +-
.../include/mach/smp.h | 2 +-
.../include/mach/sysmmu.h | 18 +-
.../include/mach/system.h | 8 +-
.../include/mach/timex.h | 8 +-
.../include/mach/uncompress.h | 8 +-
.../include/mach/vmalloc.h | 8 +-
arch/arm/{mach-s5pv310 => mach-exynos4}/init.c | 10 +-
arch/arm/{mach-s5pv310 => mach-exynos4}/platsmp.c | 12 +-
.../{mach-s5pv310 => mach-exynos4}/setup-i2c0.c | 4 +-
arch/arm/mach-s5pv310/include/mach/gpio.h | 135 -----------------
arch/arm/mach-s5pv310/include/mach/map.h | 144 ------------------
arch/arm/mach-s5pv310/include/mach/regs-gpio.h | 42 ------
arch/arm/plat-s5p/cpu.c | 25 ++--
arch/arm/plat-s5p/include/plat/exynos4.h | 34 +++++
arch/arm/plat-s5p/include/plat/s5pv310.h | 34 -----
33 files changed, 637 insertions(+), 629 deletions(-)
rename arch/arm/{mach-s5pv310 => mach-exynos4}/cpu.c (67%)
rename arch/arm/{mach-s5pv310 => mach-exynos4}/cpufreq.c (82%)
rename arch/arm/{mach-s5pv310 => mach-exynos4}/dma.c (74%)
rename arch/arm/{mach-s5pv310 => mach-exynos4}/gpiolib.c (58%)
rename arch/arm/{mach-s5pv310 => mach-exynos4}/headsmp.S (85%)
rename arch/arm/{mach-s5pv310 => mach-exynos4}/hotplug.c (98%)
rename arch/arm/{mach-s5pv310 => mach-exynos4}/include/mach/debug-macro.S (86%)
rename arch/arm/{mach-s5pv310 => mach-exynos4}/include/mach/dma.h (100%)
rename arch/arm/{mach-s5pv310 => mach-exynos4}/include/mach/entry-macro.S (95%)
create mode 100644 arch/arm/mach-exynos4/include/mach/gpio.h
rename arch/arm/{mach-s5pv310 => mach-exynos4}/include/mach/hardware.h (67%)
rename arch/arm/{mach-s5pv310 => mach-exynos4}/include/mach/io.h (76%)
create mode 100644 arch/arm/mach-exynos4/include/mach/map.h
rename arch/arm/{mach-s5pv310 => mach-exynos4}/include/mach/memory.h (71%)
create mode 100644 arch/arm/mach-exynos4/include/mach/regs-gpio.h
rename arch/arm/{mach-s5pv310 => mach-exynos4}/include/mach/regs-mem.h (74%)
rename arch/arm/{mach-s5pv310 => mach-exynos4}/include/mach/regs-pmu.h (77%)
rename arch/arm/{mach-s5pv310 => mach-exynos4}/include/mach/regs-sysmmu.h (79%)
rename arch/arm/{mach-s5pv310 => mach-exynos4}/include/mach/smp.h (85%)
rename arch/arm/{mach-s5pv310 => mach-exynos4}/include/mach/sysmmu.h (85%)
rename arch/arm/{mach-s5pv310 => mach-exynos4}/include/mach/system.h (69%)
rename arch/arm/{mach-s5pv310 => mach-exynos4}/include/mach/timex.h (81%)
rename arch/arm/{mach-s5pv310 => mach-exynos4}/include/mach/uncompress.h (80%)
rename arch/arm/{mach-s5pv310 => mach-exynos4}/include/mach/vmalloc.h (72%)
rename arch/arm/{mach-s5pv310 => mach-exynos4}/init.c (73%)
rename arch/arm/{mach-s5pv310 => mach-exynos4}/platsmp.c (92%)
rename arch/arm/{mach-s5pv310 => mach-exynos4}/setup-i2c0.c (87%)
delete mode 100644 arch/arm/mach-s5pv310/include/mach/gpio.h
delete mode 100644 arch/arm/mach-s5pv310/include/mach/map.h
delete mode 100644 arch/arm/mach-s5pv310/include/mach/regs-gpio.h
create mode 100644 arch/arm/plat-s5p/include/plat/exynos4.h
delete mode 100644 arch/arm/plat-s5p/include/plat/s5pv310.h
diff --git a/arch/arm/mach-s5pv310/cpu.c b/arch/arm/mach-exynos4/cpu.c
similarity index 67%
rename from arch/arm/mach-s5pv310/cpu.c
rename to arch/arm/mach-exynos4/cpu.c
index 0db0fb6..b0ec6d3 100644
--- a/arch/arm/mach-s5pv310/cpu.c
+++ b/arch/arm/mach-exynos4/cpu.c
@@ -1,7 +1,7 @@
-/* linux/arch/arm/mach-s5pv310/cpu.c
+/* linux/arch/arm/mach-exynos4/cpu.c
*
- * Copyright (c) 2010 Samsung Electronics Co., Ltd.
- * http://www.samsung.com/
+ * Copyright (c) 2010-2011 Samsung Electronics Co., Ltd.
+ * http://www.samsung.com
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
@@ -19,7 +19,7 @@
#include <plat/cpu.h>
#include <plat/clock.h>
-#include <plat/s5pv310.h>
+#include <plat/exynos4.h>
#include <plat/sdhci.h>
#include <mach/regs-irq.h>
@@ -29,55 +29,55 @@ extern int combiner_init(unsigned int combiner_nr, void __iomem *base,
extern void combiner_cascade_irq(unsigned int combiner_nr, unsigned int irq);
/* Initial IO mappings */
-static struct map_desc s5pv310_iodesc[] __initdata = {
+static struct map_desc exynos4_iodesc[] __initdata = {
{
.virtual = (unsigned long)S5P_VA_SYSRAM,
- .pfn = __phys_to_pfn(S5PV310_PA_SYSRAM),
+ .pfn = __phys_to_pfn(EXYNOS4_PA_SYSRAM),
.length = SZ_4K,
.type = MT_DEVICE,
}, {
.virtual = (unsigned long)S5P_VA_CMU,
- .pfn = __phys_to_pfn(S5PV310_PA_CMU),
+ .pfn = __phys_to_pfn(EXYNOS4_PA_CMU),
.length = SZ_128K,
.type = MT_DEVICE,
}, {
.virtual = (unsigned long)S5P_VA_PMU,
- .pfn = __phys_to_pfn(S5PV310_PA_PMU),
+ .pfn = __phys_to_pfn(EXYNOS4_PA_PMU),
.length = SZ_64K,
.type = MT_DEVICE,
}, {
.virtual = (unsigned long)S5P_VA_COMBINER_BASE,
- .pfn = __phys_to_pfn(S5PV310_PA_COMBINER),
+ .pfn = __phys_to_pfn(EXYNOS4_PA_COMBINER),
.length = SZ_4K,
.type = MT_DEVICE,
}, {
.virtual = (unsigned long)S5P_VA_COREPERI_BASE,
- .pfn = __phys_to_pfn(S5PV310_PA_COREPERI),
+ .pfn = __phys_to_pfn(EXYNOS4_PA_COREPERI),
.length = SZ_8K,
.type = MT_DEVICE,
}, {
.virtual = (unsigned long)S5P_VA_L2CC,
- .pfn = __phys_to_pfn(S5PV310_PA_L2CC),
+ .pfn = __phys_to_pfn(EXYNOS4_PA_L2CC),
.length = SZ_4K,
.type = MT_DEVICE,
}, {
.virtual = (unsigned long)S5P_VA_GPIO1,
- .pfn = __phys_to_pfn(S5PV310_PA_GPIO1),
+ .pfn = __phys_to_pfn(EXYNOS4_PA_GPIO1),
.length = SZ_4K,
.type = MT_DEVICE,
}, {
.virtual = (unsigned long)S5P_VA_GPIO2,
- .pfn = __phys_to_pfn(S5PV310_PA_GPIO2),
+ .pfn = __phys_to_pfn(EXYNOS4_PA_GPIO2),
.length = SZ_4K,
.type = MT_DEVICE,
}, {
.virtual = (unsigned long)S5P_VA_GPIO3,
- .pfn = __phys_to_pfn(S5PV310_PA_GPIO3),
+ .pfn = __phys_to_pfn(EXYNOS4_PA_GPIO3),
.length = SZ_256,
.type = MT_DEVICE,
}, {
.virtual = (unsigned long)S5P_VA_DMC0,
- .pfn = __phys_to_pfn(S5PV310_PA_DMC0),
+ .pfn = __phys_to_pfn(EXYNOS4_PA_DMC0),
.length = SZ_4K,
.type = MT_DEVICE,
}, {
@@ -87,13 +87,13 @@ static struct map_desc s5pv310_iodesc[] __initdata = {
.type = MT_DEVICE,
}, {
.virtual = (unsigned long)S5P_VA_SROMC,
- .pfn = __phys_to_pfn(S5PV310_PA_SROMC),
+ .pfn = __phys_to_pfn(EXYNOS4_PA_SROMC),
.length = SZ_4K,
.type = MT_DEVICE,
},
};
-static void s5pv310_idle(void)
+static void exynos4_idle(void)
{
if (!need_resched())
cpu_do_idle();
@@ -101,32 +101,33 @@ static void s5pv310_idle(void)
local_irq_enable();
}
-/* s5pv310_map_io
+/*
+ * exynos4_map_io
*
* register the standard cpu IO areas
-*/
-void __init s5pv310_map_io(void)
+ */
+void __init exynos4_map_io(void)
{
- iotable_init(s5pv310_iodesc, ARRAY_SIZE(s5pv310_iodesc));
+ iotable_init(exynos4_iodesc, ARRAY_SIZE(exynos4_iodesc));
/* initialize device information early */
- s5pv310_default_sdhci0();
- s5pv310_default_sdhci1();
- s5pv310_default_sdhci2();
- s5pv310_default_sdhci3();
+ exynos4_default_sdhci0();
+ exynos4_default_sdhci1();
+ exynos4_default_sdhci2();
+ exynos4_default_sdhci3();
}
-void __init s5pv310_init_clocks(int xtal)
+void __init exynos4_init_clocks(int xtal)
{
printk(KERN_DEBUG "%s: initializing clocks\n", __func__);
s3c24xx_register_baseclocks(xtal);
s5p_register_clocks(xtal);
- s5pv310_register_clocks();
- s5pv310_setup_clocks();
+ exynos4_register_clocks();
+ exynos4_setup_clocks();
}
-void __init s5pv310_init_irq(void)
+void __init exynos4_init_irq(void)
{
int irq;
@@ -148,29 +149,29 @@ void __init s5pv310_init_irq(void)
}
/* The parameters of s5p_init_irq() are for VIC init.
- * Theses parameters should be NULL and 0 because S5PV310
+ * Theses parameters should be NULL and 0 because EXYNOS4
* uses GIC instead of VIC.
*/
s5p_init_irq(NULL, 0);
}
-struct sysdev_class s5pv310_sysclass = {
- .name = "s5pv310-core",
+struct sysdev_class exynos4_sysclass = {
+ .name = "exynos4-core",
};
-static struct sys_device s5pv310_sysdev = {
- .cls = &s5pv310_sysclass,
+static struct sys_device exynos4_sysdev = {
+ .cls = &exynos4_sysclass,
};
-static int __init s5pv310_core_init(void)
+static int __init exynos4_core_init(void)
{
- return sysdev_class_register(&s5pv310_sysclass);
+ return sysdev_class_register(&exynos4_sysclass);
}
-core_initcall(s5pv310_core_init);
+core_initcall(exynos4_core_init);
#ifdef CONFIG_CACHE_L2X0
-static int __init s5pv310_l2x0_cache_init(void)
+static int __init exynos4_l2x0_cache_init(void)
{
/* TAG, Data Latency Control: 2cycle */
__raw_writel(0x110, S5P_VA_L2CC + L2X0_TAG_LATENCY_CTRL);
@@ -188,15 +189,15 @@ static int __init s5pv310_l2x0_cache_init(void)
return 0;
}
-early_initcall(s5pv310_l2x0_cache_init);
+early_initcall(exynos4_l2x0_cache_init);
#endif
-int __init s5pv310_init(void)
+int __init exynos4_init(void)
{
- printk(KERN_INFO "S5PV310: Initializing architecture\n");
+ printk(KERN_INFO "EXYNOS4: Initializing architecture\n");
/* set idle function */
- pm_idle = s5pv310_idle;
+ pm_idle = exynos4_idle;
- return sysdev_register(&s5pv310_sysdev);
+ return sysdev_register(&exynos4_sysdev);
}
diff --git a/arch/arm/mach-s5pv310/cpufreq.c b/arch/arm/mach-exynos4/cpufreq.c
similarity index 82%
rename from arch/arm/mach-s5pv310/cpufreq.c
rename to arch/arm/mach-exynos4/cpufreq.c
index b04cbc7..174f080 100644
--- a/arch/arm/mach-s5pv310/cpufreq.c
+++ b/arch/arm/mach-exynos4/cpufreq.c
@@ -1,9 +1,9 @@
-/* linux/arch/arm/mach-s5pv310/cpufreq.c
+/* linux/arch/arm/mach-exynos4/cpufreq.c
*
- * Copyright (c) 2010 Samsung Electronics Co., Ltd.
+ * Copyright (c) 2010-2011 Samsung Electronics Co., Ltd.
* http://www.samsung.com
*
- * S5PV310 - CPU frequency scaling support
+ * EXYNOS4 - CPU frequency scaling support
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
@@ -39,7 +39,7 @@ static struct regulator *int_regulator;
static struct cpufreq_freqs freqs;
static unsigned int memtype;
-enum s5pv310_memory_type {
+enum exynos4_memory_type {
DDR2 = 4,
LPDDR2,
DDR3,
@@ -49,7 +49,7 @@ enum cpufreq_level_index {
L0, L1, L2, L3, CPUFREQ_LEVEL_END,
};
-static struct cpufreq_frequency_table s5pv310_freq_table[] = {
+static struct cpufreq_frequency_table exynos4_freq_table[] = {
{L0, 1000*1000},
{L1, 800*1000},
{L2, 400*1000},
@@ -160,7 +160,7 @@ struct cpufreq_voltage_table {
unsigned int int_volt;
};
-static struct cpufreq_voltage_table s5pv310_volt_table[CPUFREQ_LEVEL_END] = {
+static struct cpufreq_voltage_table exynos4_volt_table[CPUFREQ_LEVEL_END] = {
{
.index = L0,
.arm_volt = 1200000,
@@ -180,7 +180,7 @@ static struct cpufreq_voltage_table s5pv310_volt_table[CPUFREQ_LEVEL_END] = {
},
};
-static unsigned int s5pv310_apll_pms_table[CPUFREQ_LEVEL_END] = {
+static unsigned int exynos4_apll_pms_table[CPUFREQ_LEVEL_END] = {
/* APLL FOUT L0: 1000MHz */
((250 << 16) | (6 << 8) | 1),
@@ -194,17 +194,17 @@ static unsigned int s5pv310_apll_pms_table[CPUFREQ_LEVEL_END] = {
((200 << 16) | (6 << 8) | 4),
};
-int s5pv310_verify_speed(struct cpufreq_policy *policy)
+int exynos4_verify_speed(struct cpufreq_policy *policy)
{
- return cpufreq_frequency_table_verify(policy, s5pv310_freq_table);
+ return cpufreq_frequency_table_verify(policy, exynos4_freq_table);
}
-unsigned int s5pv310_getspeed(unsigned int cpu)
+unsigned int exynos4_getspeed(unsigned int cpu)
{
return clk_get_rate(cpu_clk) / 1000;
}
-void s5pv310_set_clkdiv(unsigned int div_index)
+void exynos4_set_clkdiv(unsigned int div_index)
{
unsigned int tmp;
@@ -321,7 +321,7 @@ void s5pv310_set_clkdiv(unsigned int div_index)
} while (tmp & 0x11);
}
-static void s5pv310_set_apll(unsigned int index)
+static void exynos4_set_apll(unsigned int index)
{
unsigned int tmp;
@@ -340,7 +340,7 @@ static void s5pv310_set_apll(unsigned int index)
/* 3. Change PLL PMS values */
tmp = __raw_readl(S5P_APLL_CON0);
tmp &= ~((0x3ff << 16) | (0x3f << 8) | (0x7 << 0));
- tmp |= s5pv310_apll_pms_table[index];
+ tmp |= exynos4_apll_pms_table[index];
__raw_writel(tmp, S5P_APLL_CON0);
/* 4. wait_lock_time */
@@ -357,77 +357,77 @@ static void s5pv310_set_apll(unsigned int index)
} while (tmp != (0x1 << S5P_CLKSRC_CPU_MUXCORE_SHIFT));
}
-static void s5pv310_set_frequency(unsigned int old_index, unsigned int new_index)
+static void exynos4_set_frequency(unsigned int old_index, unsigned int new_index)
{
unsigned int tmp;
if (old_index > new_index) {
/* The frequency changing to L0 needs to change apll */
- if (freqs.new == s5pv310_freq_table[L0].frequency) {
+ if (freqs.new == exynos4_freq_table[L0].frequency) {
/* 1. Change the system clock divider values */
- s5pv310_set_clkdiv(new_index);
+ exynos4_set_clkdiv(new_index);
/* 2. Change the apll m,p,s value */
- s5pv310_set_apll(new_index);
+ exynos4_set_apll(new_index);
} else {
/* 1. Change the system clock divider values */
- s5pv310_set_clkdiv(new_index);
+ exynos4_set_clkdiv(new_index);
/* 2. Change just s value in apll m,p,s value */
tmp = __raw_readl(S5P_APLL_CON0);
tmp &= ~(0x7 << 0);
- tmp |= (s5pv310_apll_pms_table[new_index] & 0x7);
+ tmp |= (exynos4_apll_pms_table[new_index] & 0x7);
__raw_writel(tmp, S5P_APLL_CON0);
}
}
else if (old_index < new_index) {
/* The frequency changing from L0 needs to change apll */
- if (freqs.old == s5pv310_freq_table[L0].frequency) {
+ if (freqs.old == exynos4_freq_table[L0].frequency) {
/* 1. Change the apll m,p,s value */
- s5pv310_set_apll(new_index);
+ exynos4_set_apll(new_index);
/* 2. Change the system clock divider values */
- s5pv310_set_clkdiv(new_index);
+ exynos4_set_clkdiv(new_index);
} else {
/* 1. Change just s value in apll m,p,s value */
tmp = __raw_readl(S5P_APLL_CON0);
tmp &= ~(0x7 << 0);
- tmp |= (s5pv310_apll_pms_table[new_index] & 0x7);
+ tmp |= (exynos4_apll_pms_table[new_index] & 0x7);
__raw_writel(tmp, S5P_APLL_CON0);
/* 2. Change the system clock divider values */
- s5pv310_set_clkdiv(new_index);
+ exynos4_set_clkdiv(new_index);
}
}
}
-static int s5pv310_target(struct cpufreq_policy *policy,
+static int exynos4_target(struct cpufreq_policy *policy,
unsigned int target_freq,
unsigned int relation)
{
unsigned int index, old_index;
unsigned int arm_volt, int_volt;
- freqs.old = s5pv310_getspeed(policy->cpu);
+ freqs.old = exynos4_getspeed(policy->cpu);
- if (cpufreq_frequency_table_target(policy, s5pv310_freq_table,
+ if (cpufreq_frequency_table_target(policy, exynos4_freq_table,
freqs.old, relation, &old_index))
return -EINVAL;
- if (cpufreq_frequency_table_target(policy, s5pv310_freq_table,
+ if (cpufreq_frequency_table_target(policy, exynos4_freq_table,
target_freq, relation, &index))
return -EINVAL;
- freqs.new = s5pv310_freq_table[index].frequency;
+ freqs.new = exynos4_freq_table[index].frequency;
freqs.cpu = policy->cpu;
if (freqs.new == freqs.old)
return 0;
/* get the voltage value */
- arm_volt = s5pv310_volt_table[index].arm_volt;
- int_volt = s5pv310_volt_table[index].int_volt;
+ arm_volt = exynos4_volt_table[index].arm_volt;
+ int_volt = exynos4_volt_table[index].int_volt;
cpufreq_notify_transition(&freqs, CPUFREQ_PRECHANGE);
@@ -441,7 +441,7 @@ static int s5pv310_target(struct cpufreq_policy *policy,
}
/* Clock Configuration Procedure */
- s5pv310_set_frequency(old_index, index);
+ exynos4_set_frequency(old_index, index);
/* control regulator */
if (freqs.new < freqs.old) {
@@ -458,52 +458,52 @@ static int s5pv310_target(struct cpufreq_policy *policy,
}
#ifdef CONFIG_PM
-static int s5pv310_cpufreq_suspend(struct cpufreq_policy *policy,
+static int exynos4_cpufreq_suspend(struct cpufreq_policy *policy,
pm_message_t pmsg)
{
return 0;
}
-static int s5pv310_cpufreq_resume(struct cpufreq_policy *policy)
+static int exynos4_cpufreq_resume(struct cpufreq_policy *policy)
{
return 0;
}
#endif
-static int s5pv310_cpufreq_cpu_init(struct cpufreq_policy *policy)
+static int exynos4_cpufreq_cpu_init(struct cpufreq_policy *policy)
{
- policy->cur = policy->min = policy->max = s5pv310_getspeed(policy->cpu);
+ policy->cur = policy->min = policy->max = exynos4_getspeed(policy->cpu);
- cpufreq_frequency_table_get_attr(s5pv310_freq_table, policy->cpu);
+ cpufreq_frequency_table_get_attr(exynos4_freq_table, policy->cpu);
/* set the transition latency value */
policy->cpuinfo.transition_latency = 100000;
/*
- * S5PV310 multi-core processors has 2 cores
+ * EXYNOS4 multi-core processors has 2 cores
* that the frequency cannot be set independently.
* Each cpu is bound to the same speed.
* So the affected cpu is all of the cpus.
*/
cpumask_setall(policy->cpus);
- return cpufreq_frequency_table_cpuinfo(policy, s5pv310_freq_table);
+ return cpufreq_frequency_table_cpuinfo(policy, exynos4_freq_table);
}
-static struct cpufreq_driver s5pv310_driver = {
+static struct cpufreq_driver exynos4_driver = {
.flags = CPUFREQ_STICKY,
- .verify = s5pv310_verify_speed,
- .target = s5pv310_target,
- .get = s5pv310_getspeed,
- .init = s5pv310_cpufreq_cpu_init,
- .name = "s5pv310_cpufreq",
+ .verify = exynos4_verify_speed,
+ .target = exynos4_target,
+ .get = exynos4_getspeed,
+ .init = exynos4_cpufreq_cpu_init,
+ .name = "exynos4_cpufreq",
#ifdef CONFIG_PM
- .suspend = s5pv310_cpufreq_suspend,
- .resume = s5pv310_cpufreq_resume,
+ .suspend = exynos4_cpufreq_suspend,
+ .resume = exynos4_cpufreq_resume,
#endif
};
-static int __init s5pv310_cpufreq_init(void)
+static int __init exynos4_cpufreq_init(void)
{
cpu_clk = clk_get(NULL, "armclk");
if (IS_ERR(cpu_clk))
@@ -550,7 +550,7 @@ static int __init s5pv310_cpufreq_init(void)
printk(KERN_DEBUG "%s: memtype= 0x%x\n", __func__, memtype);
}
- return cpufreq_register_driver(&s5pv310_driver);
+ return cpufreq_register_driver(&exynos4_driver);
out:
if (!IS_ERR(cpu_clk))
@@ -577,4 +577,4 @@ out:
return -EINVAL;
}
-late_initcall(s5pv310_cpufreq_init);
+late_initcall(exynos4_cpufreq_init);
diff --git a/arch/arm/mach-s5pv310/dma.c b/arch/arm/mach-exynos4/dma.c
similarity index 74%
rename from arch/arm/mach-s5pv310/dma.c
rename to arch/arm/mach-exynos4/dma.c
index 20066c7..564bb53 100644
--- a/arch/arm/mach-s5pv310/dma.c
+++ b/arch/arm/mach-exynos4/dma.c
@@ -1,4 +1,8 @@
-/*
+/* linux/arch/arm/mach-exynos4/dma.c
+ *
+ * Copyright (c) 2011 Samsung Electronics Co., Ltd.
+ * http://www.samsung.com
+ *
* Copyright (C) 2010 Samsung Electronics Co. Ltd.
* Jaswinder Singh <jassi.brar@samsung.com>
*
@@ -30,10 +34,10 @@
static u64 dma_dmamask = DMA_BIT_MASK(32);
-static struct resource s5pv310_pdma0_resource[] = {
+static struct resource exynos4_pdma0_resource[] = {
[0] = {
- .start = S5PV310_PA_PDMA0,
- .end = S5PV310_PA_PDMA0 + SZ_4K,
+ .start = EXYNOS4_PA_PDMA0,
+ .end = EXYNOS4_PA_PDMA0 + SZ_4K,
.flags = IORESOURCE_MEM,
},
[1] = {
@@ -43,7 +47,7 @@ static struct resource s5pv310_pdma0_resource[] = {
},
};
-static struct s3c_pl330_platdata s5pv310_pdma0_pdata = {
+static struct s3c_pl330_platdata exynos4_pdma0_pdata = {
.peri = {
[0] = DMACH_PCM0_RX,
[1] = DMACH_PCM0_TX,
@@ -80,22 +84,22 @@ static struct s3c_pl330_platdata s5pv310_pdma0_pdata = {
},
};
-static struct platform_device s5pv310_device_pdma0 = {
+static struct platform_device exynos4_device_pdma0 = {
.name = "s3c-pl330",
.id = 0,
- .num_resources = ARRAY_SIZE(s5pv310_pdma0_resource),
- .resource = s5pv310_pdma0_resource,
+ .num_resources = ARRAY_SIZE(exynos4_pdma0_resource),
+ .resource = exynos4_pdma0_resource,
.dev = {
.dma_mask = &dma_dmamask,
.coherent_dma_mask = DMA_BIT_MASK(32),
- .platform_data = &s5pv310_pdma0_pdata,
+ .platform_data = &exynos4_pdma0_pdata,
},
};
-static struct resource s5pv310_pdma1_resource[] = {
+static struct resource exynos4_pdma1_resource[] = {
[0] = {
- .start = S5PV310_PA_PDMA1,
- .end = S5PV310_PA_PDMA1 + SZ_4K,
+ .start = EXYNOS4_PA_PDMA1,
+ .end = EXYNOS4_PA_PDMA1 + SZ_4K,
.flags = IORESOURCE_MEM,
},
[1] = {
@@ -105,7 +109,7 @@ static struct resource s5pv310_pdma1_resource[] = {
},
};
-static struct s3c_pl330_platdata s5pv310_pdma1_pdata = {
+static struct s3c_pl330_platdata exynos4_pdma1_pdata = {
.peri = {
[0] = DMACH_PCM0_RX,
[1] = DMACH_PCM0_TX,
@@ -142,27 +146,27 @@ static struct s3c_pl330_platdata s5pv310_pdma1_pdata = {
},
};
-static struct platform_device s5pv310_device_pdma1 = {
+static struct platform_device exynos4_device_pdma1 = {
.name = "s3c-pl330",
.id = 1,
- .num_resources = ARRAY_SIZE(s5pv310_pdma1_resource),
- .resource = s5pv310_pdma1_resource,
+ .num_resources = ARRAY_SIZE(exynos4_pdma1_resource),
+ .resource = exynos4_pdma1_resource,
.dev = {
.dma_mask = &dma_dmamask,
.coherent_dma_mask = DMA_BIT_MASK(32),
- .platform_data = &s5pv310_pdma1_pdata,
+ .platform_data = &exynos4_pdma1_pdata,
},
};
-static struct platform_device *s5pv310_dmacs[] __initdata = {
- &s5pv310_device_pdma0,
- &s5pv310_device_pdma1,
+static struct platform_device *exynos4_dmacs[] __initdata = {
+ &exynos4_device_pdma0,
+ &exynos4_device_pdma1,
};
-static int __init s5pv310_dma_init(void)
+static int __init exynos4_dma_init(void)
{
- platform_add_devices(s5pv310_dmacs, ARRAY_SIZE(s5pv310_dmacs));
+ platform_add_devices(exynos4_dmacs, ARRAY_SIZE(exynos4_dmacs));
return 0;
}
-arch_initcall(s5pv310_dma_init);
+arch_initcall(exynos4_dma_init);
diff --git a/arch/arm/mach-s5pv310/gpiolib.c b/arch/arm/mach-exynos4/gpiolib.c
similarity index 58%
rename from arch/arm/mach-s5pv310/gpiolib.c
rename to arch/arm/mach-exynos4/gpiolib.c
index 55217b8..c46fdc5 100644
--- a/arch/arm/mach-s5pv310/gpiolib.c
+++ b/arch/arm/mach-exynos4/gpiolib.c
@@ -1,9 +1,9 @@
-/* linux/arch/arm/mach-s5pv310/gpiolib.c
+/* linux/arch/arm/mach-exynos4/gpiolib.c
*
- * Copyright (c) 2010 Samsung Electronics Co., Ltd.
+ * Copyright (c) 2010-2011 Samsung Electronics Co., Ltd.
* http://www.samsung.com
*
- * S5PV310 - GPIOlib support
+ * EXYNOS4 - GPIOlib support
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
@@ -43,159 +43,159 @@ static struct s3c_gpio_cfg gpio_cfg_noint = {
* Note: The initialization of 'base' member of s3c_gpio_chip structure
* uses the above macro and depends on the banks being listed in order here.
*/
-static struct s3c_gpio_chip s5pv310_gpio_part1_4bit[] = {
+static struct s3c_gpio_chip exynos4_gpio_part1_4bit[] = {
{
.chip = {
- .base = S5PV310_GPA0(0),
- .ngpio = S5PV310_GPIO_A0_NR,
+ .base = EXYNOS4_GPA0(0),
+ .ngpio = EXYNOS4_GPIO_A0_NR,
.label = "GPA0",
},
}, {
.chip = {
- .base = S5PV310_GPA1(0),
- .ngpio = S5PV310_GPIO_A1_NR,
+ .base = EXYNOS4_GPA1(0),
+ .ngpio = EXYNOS4_GPIO_A1_NR,
.label = "GPA1",
},
}, {
.chip = {
- .base = S5PV310_GPB(0),
- .ngpio = S5PV310_GPIO_B_NR,
+ .base = EXYNOS4_GPB(0),
+ .ngpio = EXYNOS4_GPIO_B_NR,
.label = "GPB",
},
}, {
.chip = {
- .base = S5PV310_GPC0(0),
- .ngpio = S5PV310_GPIO_C0_NR,
+ .base = EXYNOS4_GPC0(0),
+ .ngpio = EXYNOS4_GPIO_C0_NR,
.label = "GPC0",
},
}, {
.chip = {
- .base = S5PV310_GPC1(0),
- .ngpio = S5PV310_GPIO_C1_NR,
+ .base = EXYNOS4_GPC1(0),
+ .ngpio = EXYNOS4_GPIO_C1_NR,
.label = "GPC1",
},
}, {
.chip = {
- .base = S5PV310_GPD0(0),
- .ngpio = S5PV310_GPIO_D0_NR,
+ .base = EXYNOS4_GPD0(0),
+ .ngpio = EXYNOS4_GPIO_D0_NR,
.label = "GPD0",
},
}, {
.chip = {
- .base = S5PV310_GPD1(0),
- .ngpio = S5PV310_GPIO_D1_NR,
+ .base = EXYNOS4_GPD1(0),
+ .ngpio = EXYNOS4_GPIO_D1_NR,
.label = "GPD1",
},
}, {
.chip = {
- .base = S5PV310_GPE0(0),
- .ngpio = S5PV310_GPIO_E0_NR,
+ .base = EXYNOS4_GPE0(0),
+ .ngpio = EXYNOS4_GPIO_E0_NR,
.label = "GPE0",
},
}, {
.chip = {
- .base = S5PV310_GPE1(0),
- .ngpio = S5PV310_GPIO_E1_NR,
+ .base = EXYNOS4_GPE1(0),
+ .ngpio = EXYNOS4_GPIO_E1_NR,
.label = "GPE1",
},
}, {
.chip = {
- .base = S5PV310_GPE2(0),
- .ngpio = S5PV310_GPIO_E2_NR,
+ .base = EXYNOS4_GPE2(0),
+ .ngpio = EXYNOS4_GPIO_E2_NR,
.label = "GPE2",
},
}, {
.chip = {
- .base = S5PV310_GPE3(0),
- .ngpio = S5PV310_GPIO_E3_NR,
+ .base = EXYNOS4_GPE3(0),
+ .ngpio = EXYNOS4_GPIO_E3_NR,
.label = "GPE3",
},
}, {
.chip = {
- .base = S5PV310_GPE4(0),
- .ngpio = S5PV310_GPIO_E4_NR,
+ .base = EXYNOS4_GPE4(0),
+ .ngpio = EXYNOS4_GPIO_E4_NR,
.label = "GPE4",
},
}, {
.chip = {
- .base = S5PV310_GPF0(0),
- .ngpio = S5PV310_GPIO_F0_NR,
+ .base = EXYNOS4_GPF0(0),
+ .ngpio = EXYNOS4_GPIO_F0_NR,
.label = "GPF0",
},
}, {
.chip = {
- .base = S5PV310_GPF1(0),
- .ngpio = S5PV310_GPIO_F1_NR,
+ .base = EXYNOS4_GPF1(0),
+ .ngpio = EXYNOS4_GPIO_F1_NR,
.label = "GPF1",
},
}, {
.chip = {
- .base = S5PV310_GPF2(0),
- .ngpio = S5PV310_GPIO_F2_NR,
+ .base = EXYNOS4_GPF2(0),
+ .ngpio = EXYNOS4_GPIO_F2_NR,
.label = "GPF2",
},
}, {
.chip = {
- .base = S5PV310_GPF3(0),
- .ngpio = S5PV310_GPIO_F3_NR,
+ .base = EXYNOS4_GPF3(0),
+ .ngpio = EXYNOS4_GPIO_F3_NR,
.label = "GPF3",
},
},
};
-static struct s3c_gpio_chip s5pv310_gpio_part2_4bit[] = {
+static struct s3c_gpio_chip exynos4_gpio_part2_4bit[] = {
{
.chip = {
- .base = S5PV310_GPJ0(0),
- .ngpio = S5PV310_GPIO_J0_NR,
+ .base = EXYNOS4_GPJ0(0),
+ .ngpio = EXYNOS4_GPIO_J0_NR,
.label = "GPJ0",
},
}, {
.chip = {
- .base = S5PV310_GPJ1(0),
- .ngpio = S5PV310_GPIO_J1_NR,
+ .base = EXYNOS4_GPJ1(0),
+ .ngpio = EXYNOS4_GPIO_J1_NR,
.label = "GPJ1",
},
}, {
.chip = {
- .base = S5PV310_GPK0(0),
- .ngpio = S5PV310_GPIO_K0_NR,
+ .base = EXYNOS4_GPK0(0),
+ .ngpio = EXYNOS4_GPIO_K0_NR,
.label = "GPK0",
},
}, {
.chip = {
- .base = S5PV310_GPK1(0),
- .ngpio = S5PV310_GPIO_K1_NR,
+ .base = EXYNOS4_GPK1(0),
+ .ngpio = EXYNOS4_GPIO_K1_NR,
.label = "GPK1",
},
}, {
.chip = {
- .base = S5PV310_GPK2(0),
- .ngpio = S5PV310_GPIO_K2_NR,
+ .base = EXYNOS4_GPK2(0),
+ .ngpio = EXYNOS4_GPIO_K2_NR,
.label = "GPK2",
},
}, {
.chip = {
- .base = S5PV310_GPK3(0),
- .ngpio = S5PV310_GPIO_K3_NR,
+ .base = EXYNOS4_GPK3(0),
+ .ngpio = EXYNOS4_GPIO_K3_NR,
.label = "GPK3",
},
}, {
.chip = {
- .base = S5PV310_GPL0(0),
- .ngpio = S5PV310_GPIO_L0_NR,
+ .base = EXYNOS4_GPL0(0),
+ .ngpio = EXYNOS4_GPIO_L0_NR,
.label = "GPL0",
},
}, {
.chip = {
- .base = S5PV310_GPL1(0),
- .ngpio = S5PV310_GPIO_L1_NR,
+ .base = EXYNOS4_GPL1(0),
+ .ngpio = EXYNOS4_GPIO_L1_NR,
.label = "GPL1",
},
}, {
.chip = {
- .base = S5PV310_GPL2(0),
- .ngpio = S5PV310_GPIO_L2_NR,
+ .base = EXYNOS4_GPL2(0),
+ .ngpio = EXYNOS4_GPIO_L2_NR,
.label = "GPL2",
},
}, {
@@ -203,8 +203,8 @@ static struct s3c_gpio_chip s5pv310_gpio_part2_4bit[] = {
.config = &gpio_cfg_noint,
.irq_base = IRQ_EINT(0),
.chip = {
- .base = S5PV310_GPX0(0),
- .ngpio = S5PV310_GPIO_X0_NR,
+ .base = EXYNOS4_GPX0(0),
+ .ngpio = EXYNOS4_GPIO_X0_NR,
.label = "GPX0",
.to_irq = samsung_gpiolib_to_irq,
},
@@ -213,8 +213,8 @@ static struct s3c_gpio_chip s5pv310_gpio_part2_4bit[] = {
.config = &gpio_cfg_noint,
.irq_base = IRQ_EINT(8),
.chip = {
- .base = S5PV310_GPX1(0),
- .ngpio = S5PV310_GPIO_X1_NR,
+ .base = EXYNOS4_GPX1(0),
+ .ngpio = EXYNOS4_GPIO_X1_NR,
.label = "GPX1",
.to_irq = samsung_gpiolib_to_irq,
},
@@ -223,8 +223,8 @@ static struct s3c_gpio_chip s5pv310_gpio_part2_4bit[] = {
.config = &gpio_cfg_noint,
.irq_base = IRQ_EINT(16),
.chip = {
- .base = S5PV310_GPX2(0),
- .ngpio = S5PV310_GPIO_X2_NR,
+ .base = EXYNOS4_GPX2(0),
+ .ngpio = EXYNOS4_GPIO_X2_NR,
.label = "GPX2",
.to_irq = samsung_gpiolib_to_irq,
},
@@ -233,25 +233,25 @@ static struct s3c_gpio_chip s5pv310_gpio_part2_4bit[] = {
.config = &gpio_cfg_noint,
.irq_base = IRQ_EINT(24),
.chip = {
- .base = S5PV310_GPX3(0),
- .ngpio = S5PV310_GPIO_X3_NR,
+ .base = EXYNOS4_GPX3(0),
+ .ngpio = EXYNOS4_GPIO_X3_NR,
.label = "GPX3",
.to_irq = samsung_gpiolib_to_irq,
},
},
};
-static struct s3c_gpio_chip s5pv310_gpio_part3_4bit[] = {
+static struct s3c_gpio_chip exynos4_gpio_part3_4bit[] = {
{
.chip = {
- .base = S5PV310_GPZ(0),
- .ngpio = S5PV310_GPIO_Z_NR,
+ .base = EXYNOS4_GPZ(0),
+ .ngpio = EXYNOS4_GPIO_Z_NR,
.label = "GPZ",
},
},
};
-static __init int s5pv310_gpiolib_init(void)
+static __init int exynos4_gpiolib_init(void)
{
struct s3c_gpio_chip *chip;
int i;
@@ -259,8 +259,8 @@ static __init int s5pv310_gpiolib_init(void)
/* GPIO part 1 */
- chip = s5pv310_gpio_part1_4bit;
- nr_chips = ARRAY_SIZE(s5pv310_gpio_part1_4bit);
+ chip = exynos4_gpio_part1_4bit;
+ nr_chips = ARRAY_SIZE(exynos4_gpio_part1_4bit);
for (i = 0; i < nr_chips; i++, chip++) {
if (chip->config == NULL)
@@ -269,12 +269,12 @@ static __init int s5pv310_gpiolib_init(void)
chip->base = S5P_VA_GPIO1 + (i) * 0x20;
}
- samsung_gpiolib_add_4bit_chips(s5pv310_gpio_part1_4bit, nr_chips);
+ samsung_gpiolib_add_4bit_chips(exynos4_gpio_part1_4bit, nr_chips);
/* GPIO part 2 */
- chip = s5pv310_gpio_part2_4bit;
- nr_chips = ARRAY_SIZE(s5pv310_gpio_part2_4bit);
+ chip = exynos4_gpio_part2_4bit;
+ nr_chips = ARRAY_SIZE(exynos4_gpio_part2_4bit);
for (i = 0; i < nr_chips; i++, chip++) {
if (chip->config == NULL)
@@ -283,12 +283,12 @@ static __init int s5pv310_gpiolib_init(void)
chip->base = S5P_VA_GPIO2 + (i) * 0x20;
}
- samsung_gpiolib_add_4bit_chips(s5pv310_gpio_part2_4bit, nr_chips);
+ samsung_gpiolib_add_4bit_chips(exynos4_gpio_part2_4bit, nr_chips);
/* GPIO part 3 */
- chip = s5pv310_gpio_part3_4bit;
- nr_chips = ARRAY_SIZE(s5pv310_gpio_part3_4bit);
+ chip = exynos4_gpio_part3_4bit;
+ nr_chips = ARRAY_SIZE(exynos4_gpio_part3_4bit);
for (i = 0; i < nr_chips; i++, chip++) {
if (chip->config == NULL)
@@ -297,8 +297,8 @@ static __init int s5pv310_gpiolib_init(void)
chip->base = S5P_VA_GPIO3 + (i) * 0x20;
}
- samsung_gpiolib_add_4bit_chips(s5pv310_gpio_part3_4bit, nr_chips);
+ samsung_gpiolib_add_4bit_chips(exynos4_gpio_part3_4bit, nr_chips);
return 0;
}
-core_initcall(s5pv310_gpiolib_init);
+core_initcall(exynos4_gpiolib_init);
diff --git a/arch/arm/mach-s5pv310/headsmp.S b/arch/arm/mach-exynos4/headsmp.S
similarity index 85%
rename from arch/arm/mach-s5pv310/headsmp.S
rename to arch/arm/mach-exynos4/headsmp.S
index 164b7b0..6c6cfc5 100644
--- a/arch/arm/mach-s5pv310/headsmp.S
+++ b/arch/arm/mach-exynos4/headsmp.S
@@ -1,5 +1,5 @@
/*
- * linux/arch/arm/mach-s5pv310/headsmp.S
+ * linux/arch/arm/mach-exynos4/headsmp.S
*
* Cloned from linux/arch/arm/mach-realview/headsmp.S
*
@@ -16,11 +16,11 @@
__INIT
/*
- * s5pv310 specific entry point for secondary CPUs. This provides
+ * exynos4 specific entry point for secondary CPUs. This provides
* a "holding pen" into which all secondary cores are held until we're
* ready for them to initialise.
*/
-ENTRY(s5pv310_secondary_startup)
+ENTRY(exynos4_secondary_startup)
mrc p15, 0, r0, c0, c0, 5
and r0, r0, #15
adr r4, 1f
diff --git a/arch/arm/mach-s5pv310/hotplug.c b/arch/arm/mach-exynos4/hotplug.c
similarity index 98%
rename from arch/arm/mach-s5pv310/hotplug.c
rename to arch/arm/mach-exynos4/hotplug.c
index c24235c..4c42f9c 100644
--- a/arch/arm/mach-s5pv310/hotplug.c
+++ b/arch/arm/mach-exynos4/hotplug.c
@@ -1,4 +1,4 @@
-/* linux arch/arm/mach-s5pv310/hotplug.c
+/* linux arch/arm/mach-exynos4/hotplug.c
*
* Cloned from linux/arch/arm/mach-realview/hotplug.c
*
diff --git a/arch/arm/mach-s5pv310/include/mach/debug-macro.S b/arch/arm/mach-exynos4/include/mach/debug-macro.S
similarity index 86%
rename from arch/arm/mach-s5pv310/include/mach/debug-macro.S
rename to arch/arm/mach-exynos4/include/mach/debug-macro.S
index b0d920c..58bbd04 100644
--- a/arch/arm/mach-s5pv310/include/mach/debug-macro.S
+++ b/arch/arm/mach-exynos4/include/mach/debug-macro.S
@@ -1,7 +1,7 @@
-/* linux/arch/arm/mach-s5pv310/include/mach/debug-macro.S
+/* linux/arch/arm/mach-exynos4/include/mach/debug-macro.S
*
- * Copyright (c) 2010 Samsung Electronics Co., Ltd.
- * http://www.samsung.com/
+ * Copyright (c) 2010-2011 Samsung Electronics Co., Ltd.
+ * http://www.samsung.com
*
* Based on arch/arm/mach-s3c6400/include/mach/debug-macro.S
*
diff --git a/arch/arm/mach-s5pv310/include/mach/dma.h b/arch/arm/mach-exynos4/include/mach/dma.h
similarity index 100%
rename from arch/arm/mach-s5pv310/include/mach/dma.h
rename to arch/arm/mach-exynos4/include/mach/dma.h
diff --git a/arch/arm/mach-s5pv310/include/mach/entry-macro.S b/arch/arm/mach-exynos4/include/mach/entry-macro.S
similarity index 95%
rename from arch/arm/mach-s5pv310/include/mach/entry-macro.S
rename to arch/arm/mach-exynos4/include/mach/entry-macro.S
index e600e1d..d8f38c2 100644
--- a/arch/arm/mach-s5pv310/include/mach/entry-macro.S
+++ b/arch/arm/mach-exynos4/include/mach/entry-macro.S
@@ -1,8 +1,8 @@
-/* arch/arm/mach-s5pv310/include/mach/entry-macro.S
+/* arch/arm/mach-exynos4/include/mach/entry-macro.S
*
* Cloned from arch/arm/mach-realview/include/mach/entry-macro.S
*
- * Low-level IRQ helper macros for S5PV310 platforms
+ * Low-level IRQ helper macros for EXYNOS4 platforms
*
* This file is licensed under the terms of the GNU General Public
* License version 2. This program is licensed "as is" without any
diff --git a/arch/arm/mach-exynos4/include/mach/gpio.h b/arch/arm/mach-exynos4/include/mach/gpio.h
new file mode 100644
index 0000000..1608299
--- /dev/null
+++ b/arch/arm/mach-exynos4/include/mach/gpio.h
@@ -0,0 +1,135 @@
+/* linux/arch/arm/mach-exynos4/include/mach/gpio.h
+ *
+ * Copyright (c) 2010-2011 Samsung Electronics Co., Ltd.
+ * http://www.samsung.com
+ *
+ * EXYNOS4 - GPIO lib support
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+#ifndef __ASM_ARCH_GPIO_H
+#define __ASM_ARCH_GPIO_H __FILE__
+
+#define gpio_get_value __gpio_get_value
+#define gpio_set_value __gpio_set_value
+#define gpio_cansleep __gpio_cansleep
+#define gpio_to_irq __gpio_to_irq
+
+/* Practically, GPIO banks upto GPZ are the configurable gpio banks */
+
+/* GPIO bank sizes */
+#define EXYNOS4_GPIO_A0_NR (8)
+#define EXYNOS4_GPIO_A1_NR (6)
+#define EXYNOS4_GPIO_B_NR (8)
+#define EXYNOS4_GPIO_C0_NR (5)
+#define EXYNOS4_GPIO_C1_NR (5)
+#define EXYNOS4_GPIO_D0_NR (4)
+#define EXYNOS4_GPIO_D1_NR (4)
+#define EXYNOS4_GPIO_E0_NR (5)
+#define EXYNOS4_GPIO_E1_NR (8)
+#define EXYNOS4_GPIO_E2_NR (6)
+#define EXYNOS4_GPIO_E3_NR (8)
+#define EXYNOS4_GPIO_E4_NR (8)
+#define EXYNOS4_GPIO_F0_NR (8)
+#define EXYNOS4_GPIO_F1_NR (8)
+#define EXYNOS4_GPIO_F2_NR (8)
+#define EXYNOS4_GPIO_F3_NR (6)
+#define EXYNOS4_GPIO_J0_NR (8)
+#define EXYNOS4_GPIO_J1_NR (5)
+#define EXYNOS4_GPIO_K0_NR (7)
+#define EXYNOS4_GPIO_K1_NR (7)
+#define EXYNOS4_GPIO_K2_NR (7)
+#define EXYNOS4_GPIO_K3_NR (7)
+#define EXYNOS4_GPIO_L0_NR (8)
+#define EXYNOS4_GPIO_L1_NR (3)
+#define EXYNOS4_GPIO_L2_NR (8)
+#define EXYNOS4_GPIO_X0_NR (8)
+#define EXYNOS4_GPIO_X1_NR (8)
+#define EXYNOS4_GPIO_X2_NR (8)
+#define EXYNOS4_GPIO_X3_NR (8)
+#define EXYNOS4_GPIO_Z_NR (7)
+
+/* GPIO bank numbers */
+
+#define EXYNOS4_GPIO_NEXT(__gpio) \
+ ((__gpio##_START) + (__gpio##_NR) + CONFIG_S3C_GPIO_SPACE + 1)
+
+enum s5p_gpio_number {
+ EXYNOS4_GPIO_A0_START = 0,
+ EXYNOS4_GPIO_A1_START = EXYNOS4_GPIO_NEXT(EXYNOS4_GPIO_A0),
+ EXYNOS4_GPIO_B_START = EXYNOS4_GPIO_NEXT(EXYNOS4_GPIO_A1),
+ EXYNOS4_GPIO_C0_START = EXYNOS4_GPIO_NEXT(EXYNOS4_GPIO_B),
+ EXYNOS4_GPIO_C1_START = EXYNOS4_GPIO_NEXT(EXYNOS4_GPIO_C0),
+ EXYNOS4_GPIO_D0_START = EXYNOS4_GPIO_NEXT(EXYNOS4_GPIO_C1),
+ EXYNOS4_GPIO_D1_START = EXYNOS4_GPIO_NEXT(EXYNOS4_GPIO_D0),
+ EXYNOS4_GPIO_E0_START = EXYNOS4_GPIO_NEXT(EXYNOS4_GPIO_D1),
+ EXYNOS4_GPIO_E1_START = EXYNOS4_GPIO_NEXT(EXYNOS4_GPIO_E0),
+ EXYNOS4_GPIO_E2_START = EXYNOS4_GPIO_NEXT(EXYNOS4_GPIO_E1),
+ EXYNOS4_GPIO_E3_START = EXYNOS4_GPIO_NEXT(EXYNOS4_GPIO_E2),
+ EXYNOS4_GPIO_E4_START = EXYNOS4_GPIO_NEXT(EXYNOS4_GPIO_E3),
+ EXYNOS4_GPIO_F0_START = EXYNOS4_GPIO_NEXT(EXYNOS4_GPIO_E4),
+ EXYNOS4_GPIO_F1_START = EXYNOS4_GPIO_NEXT(EXYNOS4_GPIO_F0),
+ EXYNOS4_GPIO_F2_START = EXYNOS4_GPIO_NEXT(EXYNOS4_GPIO_F1),
+ EXYNOS4_GPIO_F3_START = EXYNOS4_GPIO_NEXT(EXYNOS4_GPIO_F2),
+ EXYNOS4_GPIO_J0_START = EXYNOS4_GPIO_NEXT(EXYNOS4_GPIO_F3),
+ EXYNOS4_GPIO_J1_START = EXYNOS4_GPIO_NEXT(EXYNOS4_GPIO_J0),
+ EXYNOS4_GPIO_K0_START = EXYNOS4_GPIO_NEXT(EXYNOS4_GPIO_J1),
+ EXYNOS4_GPIO_K1_START = EXYNOS4_GPIO_NEXT(EXYNOS4_GPIO_K0),
+ EXYNOS4_GPIO_K2_START = EXYNOS4_GPIO_NEXT(EXYNOS4_GPIO_K1),
+ EXYNOS4_GPIO_K3_START = EXYNOS4_GPIO_NEXT(EXYNOS4_GPIO_K2),
+ EXYNOS4_GPIO_L0_START = EXYNOS4_GPIO_NEXT(EXYNOS4_GPIO_K3),
+ EXYNOS4_GPIO_L1_START = EXYNOS4_GPIO_NEXT(EXYNOS4_GPIO_L0),
+ EXYNOS4_GPIO_L2_START = EXYNOS4_GPIO_NEXT(EXYNOS4_GPIO_L1),
+ EXYNOS4_GPIO_X0_START = EXYNOS4_GPIO_NEXT(EXYNOS4_GPIO_L2),
+ EXYNOS4_GPIO_X1_START = EXYNOS4_GPIO_NEXT(EXYNOS4_GPIO_X0),
+ EXYNOS4_GPIO_X2_START = EXYNOS4_GPIO_NEXT(EXYNOS4_GPIO_X1),
+ EXYNOS4_GPIO_X3_START = EXYNOS4_GPIO_NEXT(EXYNOS4_GPIO_X2),
+ EXYNOS4_GPIO_Z_START = EXYNOS4_GPIO_NEXT(EXYNOS4_GPIO_X3),
+};
+
+/* EXYNOS4 GPIO number definitions */
+#define EXYNOS4_GPA0(_nr) (EXYNOS4_GPIO_A0_START + (_nr))
+#define EXYNOS4_GPA1(_nr) (EXYNOS4_GPIO_A1_START + (_nr))
+#define EXYNOS4_GPB(_nr) (EXYNOS4_GPIO_B_START + (_nr))
+#define EXYNOS4_GPC0(_nr) (EXYNOS4_GPIO_C0_START + (_nr))
+#define EXYNOS4_GPC1(_nr) (EXYNOS4_GPIO_C1_START + (_nr))
+#define EXYNOS4_GPD0(_nr) (EXYNOS4_GPIO_D0_START + (_nr))
+#define EXYNOS4_GPD1(_nr) (EXYNOS4_GPIO_D1_START + (_nr))
+#define EXYNOS4_GPE0(_nr) (EXYNOS4_GPIO_E0_START + (_nr))
+#define EXYNOS4_GPE1(_nr) (EXYNOS4_GPIO_E1_START + (_nr))
+#define EXYNOS4_GPE2(_nr) (EXYNOS4_GPIO_E2_START + (_nr))
+#define EXYNOS4_GPE3(_nr) (EXYNOS4_GPIO_E3_START + (_nr))
+#define EXYNOS4_GPE4(_nr) (EXYNOS4_GPIO_E4_START + (_nr))
+#define EXYNOS4_GPF0(_nr) (EXYNOS4_GPIO_F0_START + (_nr))
+#define EXYNOS4_GPF1(_nr) (EXYNOS4_GPIO_F1_START + (_nr))
+#define EXYNOS4_GPF2(_nr) (EXYNOS4_GPIO_F2_START + (_nr))
+#define EXYNOS4_GPF3(_nr) (EXYNOS4_GPIO_F3_START + (_nr))
+#define EXYNOS4_GPJ0(_nr) (EXYNOS4_GPIO_J0_START + (_nr))
+#define EXYNOS4_GPJ1(_nr) (EXYNOS4_GPIO_J1_START + (_nr))
+#define EXYNOS4_GPK0(_nr) (EXYNOS4_GPIO_K0_START + (_nr))
+#define EXYNOS4_GPK1(_nr) (EXYNOS4_GPIO_K1_START + (_nr))
+#define EXYNOS4_GPK2(_nr) (EXYNOS4_GPIO_K2_START + (_nr))
+#define EXYNOS4_GPK3(_nr) (EXYNOS4_GPIO_K3_START + (_nr))
+#define EXYNOS4_GPL0(_nr) (EXYNOS4_GPIO_L0_START + (_nr))
+#define EXYNOS4_GPL1(_nr) (EXYNOS4_GPIO_L1_START + (_nr))
+#define EXYNOS4_GPL2(_nr) (EXYNOS4_GPIO_L2_START + (_nr))
+#define EXYNOS4_GPX0(_nr) (EXYNOS4_GPIO_X0_START + (_nr))
+#define EXYNOS4_GPX1(_nr) (EXYNOS4_GPIO_X1_START + (_nr))
+#define EXYNOS4_GPX2(_nr) (EXYNOS4_GPIO_X2_START + (_nr))
+#define EXYNOS4_GPX3(_nr) (EXYNOS4_GPIO_X3_START + (_nr))
+#define EXYNOS4_GPZ(_nr) (EXYNOS4_GPIO_Z_START + (_nr))
+
+/* the end of the EXYNOS4 specific gpios */
+#define EXYNOS4_GPIO_END (EXYNOS4_GPZ(EXYNOS4_GPIO_Z_NR) + 1)
+#define S3C_GPIO_END EXYNOS4_GPIO_END
+
+/* define the number of gpios we need to the one after the GPZ() range */
+#define ARCH_NR_GPIOS (EXYNOS4_GPZ(EXYNOS4_GPIO_Z_NR) + \
+ CONFIG_SAMSUNG_GPIO_EXTRA + 1)
+
+#include <asm-generic/gpio.h>
+
+#endif /* __ASM_ARCH_GPIO_H */
diff --git a/arch/arm/mach-s5pv310/include/mach/hardware.h b/arch/arm/mach-exynos4/include/mach/hardware.h
similarity index 67%
rename from arch/arm/mach-s5pv310/include/mach/hardware.h
rename to arch/arm/mach-exynos4/include/mach/hardware.h
index 28ff988..5109eb2 100644
--- a/arch/arm/mach-s5pv310/include/mach/hardware.h
+++ b/arch/arm/mach-exynos4/include/mach/hardware.h
@@ -1,9 +1,9 @@
-/* linux/arch/arm/mach-s5pv310/include/mach/hardware.h
+/* linux/arch/arm/mach-exynos4/include/mach/hardware.h
*
- * Copyright (c) 2010 Samsung Electronics Co., Ltd.
- * http://www.samsung.com/
+ * Copyright (c) 2010-2011 Samsung Electronics Co., Ltd.
+ * http://www.samsung.com
*
- * S5PV310 - Hardware support
+ * EXYNOS4 - Hardware support
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
diff --git a/arch/arm/mach-s5pv310/include/mach/io.h b/arch/arm/mach-exynos4/include/mach/io.h
similarity index 76%
rename from arch/arm/mach-s5pv310/include/mach/io.h
rename to arch/arm/mach-exynos4/include/mach/io.h
index 8a7f912..d5478d2 100644
--- a/arch/arm/mach-s5pv310/include/mach/io.h
+++ b/arch/arm/mach-exynos4/include/mach/io.h
@@ -1,13 +1,13 @@
-/* linux/arch/arm/mach-s5pv310/include/mach/io.h
+/* linux/arch/arm/mach-exynos4/include/mach/io.h
*
- * Copyright (c) 2010 Samsung Electronics Co., Ltd.
- * http://www.samsung.com/
+ * Copyright (c) 2010-2011 Samsung Electronics Co., Ltd.
+ * http://www.samsung.com
*
* Copyright 2008-2010 Ben Dooks <ben-linux@fluff.org>
*
* Based on arch/arm/mach-s5p6442/include/mach/io.h
*
- * Default IO routines for S5PV310
+ * Default IO routines for EXYNOS4
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
diff --git a/arch/arm/mach-exynos4/include/mach/map.h b/arch/arm/mach-exynos4/include/mach/map.h
new file mode 100644
index 0000000..80a41e0
--- /dev/null
+++ b/arch/arm/mach-exynos4/include/mach/map.h
@@ -0,0 +1,144 @@
+/* linux/arch/arm/mach-exynos4/include/mach/map.h
+ *
+ * Copyright (c) 2010-2011 Samsung Electronics Co., Ltd.
+ * http://www.samsung.com/
+ *
+ * EXYNOS4 - Memory map definitions
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+#ifndef __ASM_ARCH_MAP_H
+#define __ASM_ARCH_MAP_H __FILE__
+
+#include <plat/map-base.h>
+
+/*
+ * EXYNOS4 UART offset is 0x10000 but the older S5P SoCs are 0x400.
+ * So need to define it, and here is to avoid redefinition warning.
+ */
+#define S3C_UART_OFFSET (0x10000)
+
+#include <plat/map-s5p.h>
+
+#define EXYNOS4_PA_SYSRAM 0x02020000
+
+#define EXYNOS4_PA_I2S0 0x03830000
+#define EXYNOS4_PA_I2S1 0xE3100000
+#define EXYNOS4_PA_I2S2 0xE2A00000
+
+#define EXYNOS4_PA_PCM0 0x03840000
+#define EXYNOS4_PA_PCM1 0x13980000
+#define EXYNOS4_PA_PCM2 0x13990000
+
+#define EXYNOS4_PA_SROM_BANK(x) (0x04000000 + ((x) * 0x01000000))
+
+#define EXYNOS4_PA_ONENAND 0x0C000000
+#define EXYNOS4_PA_ONENAND_DMA 0x0C600000
+
+#define EXYNOS4_PA_CHIPID 0x10000000
+
+#define EXYNOS4_PA_SYSCON 0x10010000
+#define EXYNOS4_PA_PMU 0x10020000
+#define EXYNOS4_PA_CMU 0x10030000
+
+#define EXYNOS4_PA_WATCHDOG 0x10060000
+#define EXYNOS4_PA_RTC 0x10070000
+
+#define EXYNOS4_PA_DMC0 0x10400000
+
+#define EXYNOS4_PA_COMBINER 0x10448000
+
+#define EXYNOS4_PA_COREPERI 0x10500000
+#define EXYNOS4_PA_GIC_CPU 0x10500100
+#define EXYNOS4_PA_TWD 0x10500600
+#define EXYNOS4_PA_GIC_DIST 0x10501000
+#define EXYNOS4_PA_L2CC 0x10502000
+
+#define EXYNOS4_PA_MDMA 0x10810000
+#define EXYNOS4_PA_PDMA0 0x12680000
+#define EXYNOS4_PA_PDMA1 0x12690000
+
+#define EXYNOS4_PA_SYSMMU_MDMA 0x10A40000
+#define EXYNOS4_PA_SYSMMU_SSS 0x10A50000
+#define EXYNOS4_PA_SYSMMU_FIMC0 0x11A20000
+#define EXYNOS4_PA_SYSMMU_FIMC1 0x11A30000
+#define EXYNOS4_PA_SYSMMU_FIMC2 0x11A40000
+#define EXYNOS4_PA_SYSMMU_FIMC3 0x11A50000
+#define EXYNOS4_PA_SYSMMU_JPEG 0x11A60000
+#define EXYNOS4_PA_SYSMMU_FIMD0 0x11E20000
+#define EXYNOS4_PA_SYSMMU_FIMD1 0x12220000
+#define EXYNOS4_PA_SYSMMU_PCIe 0x12620000
+#define EXYNOS4_PA_SYSMMU_G2D 0x12A20000
+#define EXYNOS4_PA_SYSMMU_ROTATOR 0x12A30000
+#define EXYNOS4_PA_SYSMMU_MDMA2 0x12A40000
+#define EXYNOS4_PA_SYSMMU_TV 0x12E20000
+#define EXYNOS4_PA_SYSMMU_MFC_L 0x13620000
+#define EXYNOS4_PA_SYSMMU_MFC_R 0x13630000
+
+#define EXYNOS4_PA_GPIO1 0x11400000
+#define EXYNOS4_PA_GPIO2 0x11000000
+#define EXYNOS4_PA_GPIO3 0x03860000
+
+#define EXYNOS4_PA_MIPI_CSIS0 0x11880000
+#define EXYNOS4_PA_MIPI_CSIS1 0x11890000
+
+#define EXYNOS4_PA_HSMMC(x) (0x12510000 + ((x) * 0x10000))
+
+#define EXYNOS4_PA_SROMC 0x12570000
+
+#define EXYNOS4_PA_UART 0x13800000
+
+#define EXYNOS4_PA_IIC(x) (0x13860000 + ((x) * 0x10000))
+
+#define EXYNOS4_PA_AC97 0x139A0000
+
+#define EXYNOS4_PA_TIMER 0x139D0000
+
+#define EXYNOS4_PA_SDRAM 0x40000000
+
+#define EXYNOS4_PA_SPDIF 0xE1100000
+
+/* Compatibiltiy Defines */
+
+#define S3C_PA_HSMMC0 EXYNOS4_PA_HSMMC(0)
+#define S3C_PA_HSMMC1 EXYNOS4_PA_HSMMC(1)
+#define S3C_PA_HSMMC2 EXYNOS4_PA_HSMMC(2)
+#define S3C_PA_HSMMC3 EXYNOS4_PA_HSMMC(3)
+#define S3C_PA_IIC EXYNOS4_PA_IIC(0)
+#define S3C_PA_IIC1 EXYNOS4_PA_IIC(1)
+#define S3C_PA_IIC2 EXYNOS4_PA_IIC(2)
+#define S3C_PA_IIC3 EXYNOS4_PA_IIC(3)
+#define S3C_PA_IIC4 EXYNOS4_PA_IIC(4)
+#define S3C_PA_IIC5 EXYNOS4_PA_IIC(5)
+#define S3C_PA_IIC6 EXYNOS4_PA_IIC(6)
+#define S3C_PA_IIC7 EXYNOS4_PA_IIC(7)
+#define S3C_PA_RTC EXYNOS4_PA_RTC
+#define S3C_PA_WDT EXYNOS4_PA_WATCHDOG
+
+#define S5P_PA_CHIPID EXYNOS4_PA_CHIPID
+#define S5P_PA_MIPI_CSIS0 EXYNOS4_PA_MIPI_CSIS0
+#define S5P_PA_MIPI_CSIS1 EXYNOS4_PA_MIPI_CSIS1
+#define S5P_PA_ONENAND EXYNOS4_PA_ONENAND
+#define S5P_PA_ONENAND_DMA EXYNOS4_PA_ONENAND_DMA
+#define S5P_PA_SDRAM EXYNOS4_PA_SDRAM
+#define S5P_PA_SROMC EXYNOS4_PA_SROMC
+#define S5P_PA_SYSCON EXYNOS4_PA_SYSCON
+#define S5P_PA_TIMER EXYNOS4_PA_TIMER
+
+/* UART */
+
+#define S3C_PA_UART EXYNOS4_PA_UART
+
+#define S5P_PA_UART(x) (S3C_PA_UART + ((x) * S3C_UART_OFFSET))
+#define S5P_PA_UART0 S5P_PA_UART(0)
+#define S5P_PA_UART1 S5P_PA_UART(1)
+#define S5P_PA_UART2 S5P_PA_UART(2)
+#define S5P_PA_UART3 S5P_PA_UART(3)
+#define S5P_PA_UART4 S5P_PA_UART(4)
+
+#define S5P_SZ_UART SZ_256
+
+#endif /* __ASM_ARCH_MAP_H */
diff --git a/arch/arm/mach-s5pv310/include/mach/memory.h b/arch/arm/mach-exynos4/include/mach/memory.h
similarity index 71%
rename from arch/arm/mach-s5pv310/include/mach/memory.h
rename to arch/arm/mach-exynos4/include/mach/memory.h
index 1dffb48..39b47d0 100644
--- a/arch/arm/mach-s5pv310/include/mach/memory.h
+++ b/arch/arm/mach-exynos4/include/mach/memory.h
@@ -1,9 +1,9 @@
-/* linux/arch/arm/mach-s5pv310/include/mach/memory.h
+/* linux/arch/arm/mach-exynos4/include/mach/memory.h
*
- * Copyright (c) 2010 Samsung Electronics Co., Ltd.
- * http://www.samsung.com/
+ * Copyright (c) 2010-2011 Samsung Electronics Co., Ltd.
+ * http://www.samsung.com
*
- * S5PV310 - Memory definitions
+ * EXYNOS4 - Memory definitions
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
diff --git a/arch/arm/mach-exynos4/include/mach/regs-gpio.h b/arch/arm/mach-exynos4/include/mach/regs-gpio.h
new file mode 100644
index 0000000..1401b21
--- /dev/null
+++ b/arch/arm/mach-exynos4/include/mach/regs-gpio.h
@@ -0,0 +1,42 @@
+/* linux/arch/arm/mach-exynos4/include/mach/regs-gpio.h
+ *
+ * Copyright (c) 2010-2011 Samsung Electronics Co., Ltd.
+ * http://www.samsung.com
+ *
+ * EXYNOS4 - GPIO (including EINT) register definitions
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+#ifndef __ASM_ARCH_REGS_GPIO_H
+#define __ASM_ARCH_REGS_GPIO_H __FILE__
+
+#include <mach/map.h>
+#include <mach/irqs.h>
+
+#define EXYNOS4_EINT40CON (S5P_VA_GPIO2 + 0xE00)
+#define S5P_EINT_CON(x) (EXYNOS4_EINT40CON + ((x) * 0x4))
+
+#define EXYNOS4_EINT40FLTCON0 (S5P_VA_GPIO2 + 0xE80)
+#define S5P_EINT_FLTCON(x) (EXYNOS4_EINT40FLTCON0 + ((x) * 0x4))
+
+#define EXYNOS4_EINT40MASK (S5P_VA_GPIO2 + 0xF00)
+#define S5P_EINT_MASK(x) (EXYNOS4_EINT40MASK + ((x) * 0x4))
+
+#define EXYNOS4_EINT40PEND (S5P_VA_GPIO2 + 0xF40)
+#define S5P_EINT_PEND(x) (EXYNOS4_EINT40PEND + ((x) * 0x4))
+
+#define EINT_REG_NR(x) (EINT_OFFSET(x) >> 3)
+
+#define eint_irq_to_bit(irq) (1 << (EINT_OFFSET(irq) & 0x7))
+
+#define EINT_MODE S3C_GPIO_SFN(0xf)
+
+#define EINT_GPIO_0(x) EXYNOS4_GPX0(x)
+#define EINT_GPIO_1(x) EXYNOS4_GPX1(x)
+#define EINT_GPIO_2(x) EXYNOS4_GPX2(x)
+#define EINT_GPIO_3(x) EXYNOS4_GPX3(x)
+
+#endif /* __ASM_ARCH_REGS_GPIO_H */
diff --git a/arch/arm/mach-s5pv310/include/mach/regs-mem.h b/arch/arm/mach-exynos4/include/mach/regs-mem.h
similarity index 74%
rename from arch/arm/mach-s5pv310/include/mach/regs-mem.h
rename to arch/arm/mach-exynos4/include/mach/regs-mem.h
index 8342271..0368b5a 100644
--- a/arch/arm/mach-s5pv310/include/mach/regs-mem.h
+++ b/arch/arm/mach-exynos4/include/mach/regs-mem.h
@@ -1,9 +1,9 @@
-/* linux/arch/arm/mach-s5pv310/include/mach/regs-mem.h
+/* linux/arch/arm/mach-exynos4/include/mach/regs-mem.h
*
- * Copyright (c) 2010 Samsung Electronics Co., Ltd.
+ * Copyright (c) 2010-2011 Samsung Electronics Co., Ltd.
* http://www.samsung.com
*
- * S5PV310 - SROMC and DMC register definitions
+ * EXYNOS4 - SROMC and DMC register definitions
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
diff --git a/arch/arm/mach-s5pv310/include/mach/regs-pmu.h b/arch/arm/mach-exynos4/include/mach/regs-pmu.h
similarity index 77%
rename from arch/arm/mach-s5pv310/include/mach/regs-pmu.h
rename to arch/arm/mach-exynos4/include/mach/regs-pmu.h
index fb333d0..2ddd617 100644
--- a/arch/arm/mach-s5pv310/include/mach/regs-pmu.h
+++ b/arch/arm/mach-exynos4/include/mach/regs-pmu.h
@@ -1,9 +1,9 @@
-/* linux/arch/arm/mach-s5pv310/include/mach/regs-pmu.h
+/* linux/arch/arm/mach-exynos4/include/mach/regs-pmu.h
*
- * Copyright (c) 2010 Samsung Electronics Co., Ltd.
+ * Copyright (c) 2010-2011 Samsung Electronics Co., Ltd.
* http://www.samsung.com
*
- * S5PV310 - Power management unit definition
+ * EXYNOS4 - Power management unit definition
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
@@ -18,7 +18,7 @@
#define S5P_PMUREG(x) (S5P_VA_PMU + (x))
#define S5P_PMU_CAM_CONF S5P_PMUREG(0x3C00)
-#define S5P_PMU_TV_CONF S5P_PMUREG(0x3C20)
+#define S5P_PMU_TV_CONF S5P_PMUREG(0x3C20)
#define S5P_PMU_MFC_CONF S5P_PMUREG(0x3C40)
#define S5P_PMU_G3D_CONF S5P_PMUREG(0x3C60)
#define S5P_PMU_LCD0_CONF S5P_PMUREG(0x3C80)
diff --git a/arch/arm/mach-s5pv310/include/mach/regs-sysmmu.h b/arch/arm/mach-exynos4/include/mach/regs-sysmmu.h
similarity index 79%
rename from arch/arm/mach-s5pv310/include/mach/regs-sysmmu.h
rename to arch/arm/mach-exynos4/include/mach/regs-sysmmu.h
index 0b28e81..b6aef86 100644
--- a/arch/arm/mach-s5pv310/include/mach/regs-sysmmu.h
+++ b/arch/arm/mach-exynos4/include/mach/regs-sysmmu.h
@@ -1,9 +1,9 @@
-/* linux/arch/arm/mach-s5pv310/include/mach/regs-sysmmu.h
+/* linux/arch/arm/mach-exynos4/include/mach/regs-sysmmu.h
*
- * Copyright (c) 2010 Samsung Electronics Co., Ltd.
+ * Copyright (c) 2010-2011 Samsung Electronics Co., Ltd.
* http://www.samsung.com
*
- * S5PV310 - System MMU register
+ * EXYNOS4 - System MMU register
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
diff --git a/arch/arm/mach-s5pv310/include/mach/smp.h b/arch/arm/mach-exynos4/include/mach/smp.h
similarity index 85%
rename from arch/arm/mach-s5pv310/include/mach/smp.h
rename to arch/arm/mach-exynos4/include/mach/smp.h
index 393ccbd..a463dce 100644
--- a/arch/arm/mach-s5pv310/include/mach/smp.h
+++ b/arch/arm/mach-exynos4/include/mach/smp.h
@@ -1,4 +1,4 @@
-/* linux/arch/arm/mach-s5pv310/include/mach/smp.h
+/* linux/arch/arm/mach-exynos4/include/mach/smp.h
*
* Cloned from arch/arm/mach-realview/include/mach/smp.h
*/
diff --git a/arch/arm/mach-s5pv310/include/mach/sysmmu.h b/arch/arm/mach-exynos4/include/mach/sysmmu.h
similarity index 85%
rename from arch/arm/mach-s5pv310/include/mach/sysmmu.h
rename to arch/arm/mach-exynos4/include/mach/sysmmu.h
index 598fc5c..1428ada 100644
--- a/arch/arm/mach-s5pv310/include/mach/sysmmu.h
+++ b/arch/arm/mach-exynos4/include/mach/sysmmu.h
@@ -1,9 +1,9 @@
-/* linux/arch/arm/mach-s5pv310/include/mach/sysmmu.h
+/* linux/arch/arm/mach-exynos4/include/mach/sysmmu.h
*
- * Copyright (c) 2010 Samsung Electronics Co., Ltd.
- * http://www.samsung.com/
+ * Copyright (c) 2010-2011 Samsung Electronics Co., Ltd.
+ * http://www.samsung.com
*
- * Samsung sysmmu driver for S5PV310
+ * Samsung sysmmu driver for EXYNOS4
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
@@ -13,10 +13,10 @@
#ifndef __ASM_ARM_ARCH_SYSMMU_H
#define __ASM_ARM_ARCH_SYSMMU_H __FILE__
-#define S5PV310_SYSMMU_TOTAL_IPNUM 16
-#define S5P_SYSMMU_TOTAL_IPNUM S5PV310_SYSMMU_TOTAL_IPNUM
+#define EXYNOS4_SYSMMU_TOTAL_IPNUM 16
+#define S5P_SYSMMU_TOTAL_IPNUM EXYNOS4_SYSMMU_TOTAL_IPNUM
-enum s5pv310_sysmmu_ips {
+enum exynos4_sysmmu_ips {
SYSMMU_MDMA,
SYSMMU_SSS,
SYSMMU_FIMC0,
@@ -35,7 +35,7 @@ enum s5pv310_sysmmu_ips {
SYSMMU_MFC_R,
};
-static char *sysmmu_ips_name[S5PV310_SYSMMU_TOTAL_IPNUM] = {
+static char *sysmmu_ips_name[EXYNOS4_SYSMMU_TOTAL_IPNUM] = {
"SYSMMU_MDMA" ,
"SYSMMU_SSS" ,
"SYSMMU_FIMC0" ,
@@ -54,7 +54,7 @@ static char *sysmmu_ips_name[S5PV310_SYSMMU_TOTAL_IPNUM] = {
"SYSMMU_MFC_R" ,
};
-typedef enum s5pv310_sysmmu_ips sysmmu_ips;
+typedef enum exynos4_sysmmu_ips sysmmu_ips;
struct sysmmu_tt_info {
unsigned long *pgd;
diff --git a/arch/arm/mach-s5pv310/include/mach/system.h b/arch/arm/mach-exynos4/include/mach/system.h
similarity index 69%
rename from arch/arm/mach-s5pv310/include/mach/system.h
rename to arch/arm/mach-exynos4/include/mach/system.h
index d10c009..5e3220c 100644
--- a/arch/arm/mach-s5pv310/include/mach/system.h
+++ b/arch/arm/mach-exynos4/include/mach/system.h
@@ -1,9 +1,9 @@
-/* linux/arch/arm/mach-s5pv310/include/mach/system.h
+/* linux/arch/arm/mach-exynos4/include/mach/system.h
*
- * Copyright (c) 2010 Samsung Electronics Co., Ltd.
- * http://www.samsung.com/
+ * Copyright (c) 2010-2011 Samsung Electronics Co., Ltd.
+ * http://www.samsung.com
*
- * S5PV310 - system support header
+ * EXYNOS4 - system support header
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
diff --git a/arch/arm/mach-s5pv310/include/mach/timex.h b/arch/arm/mach-exynos4/include/mach/timex.h
similarity index 81%
rename from arch/arm/mach-s5pv310/include/mach/timex.h
rename to arch/arm/mach-exynos4/include/mach/timex.h
index bd2359b..6d13875 100644
--- a/arch/arm/mach-s5pv310/include/mach/timex.h
+++ b/arch/arm/mach-exynos4/include/mach/timex.h
@@ -1,14 +1,14 @@
-/* linux/arch/arm/mach-s5pv310/include/mach/timex.h
+/* linux/arch/arm/mach-exynos4/include/mach/timex.h
*
- * Copyright (c) 2010 Samsung Electronics Co., Ltd.
- * http://www.samsung.com/
+ * Copyright (c) 2010-2011 Samsung Electronics Co., Ltd.
+ * http://www.samsung.com
*
* Copyright (c) 2003-2010 Simtec Electronics
* Ben Dooks <ben@simtec.co.uk>
*
* Based on arch/arm/mach-s5p6442/include/mach/timex.h
*
- * S5PV310 - time parameters
+ * EXYNOS4 - time parameters
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
diff --git a/arch/arm/mach-s5pv310/include/mach/uncompress.h b/arch/arm/mach-exynos4/include/mach/uncompress.h
similarity index 80%
rename from arch/arm/mach-s5pv310/include/mach/uncompress.h
rename to arch/arm/mach-exynos4/include/mach/uncompress.h
index 59593c1..21d97bc 100644
--- a/arch/arm/mach-s5pv310/include/mach/uncompress.h
+++ b/arch/arm/mach-exynos4/include/mach/uncompress.h
@@ -1,9 +1,9 @@
-/* linux/arch/arm/mach-s5pv310/include/mach/uncompress.h
+/* linux/arch/arm/mach-exynos4/include/mach/uncompress.h
*
- * Copyright (c) 2010 Samsung Electronics Co., Ltd.
- * http://www.samsung.com/
+ * Copyright (c) 2010-2011 Samsung Electronics Co., Ltd.
+ * http://www.samsung.com
*
- * S5PV310 - uncompress code
+ * EXYNOS4 - uncompress code
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
diff --git a/arch/arm/mach-s5pv310/include/mach/vmalloc.h b/arch/arm/mach-exynos4/include/mach/vmalloc.h
similarity index 72%
rename from arch/arm/mach-s5pv310/include/mach/vmalloc.h
rename to arch/arm/mach-exynos4/include/mach/vmalloc.h
index 65759fb..284330e 100644
--- a/arch/arm/mach-s5pv310/include/mach/vmalloc.h
+++ b/arch/arm/mach-exynos4/include/mach/vmalloc.h
@@ -1,7 +1,7 @@
-/* linux/arch/arm/mach-s5pv310/include/mach/vmalloc.h
+/* linux/arch/arm/mach-exynos4/include/mach/vmalloc.h
*
- * Copyright (c) 2010 Samsung Electronics Co., Ltd.
- * http://www.samsung.com/
+ * Copyright (c) 2010-2011 Samsung Electronics Co., Ltd.
+ * http://www.samsung.com
*
* Copyright 2010 Ben Dooks <ben-linux@fluff.org>
*
@@ -11,7 +11,7 @@
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*
- * S5PV310 vmalloc definition
+ * EXYNOS4 vmalloc definition
*/
#ifndef __ASM_ARCH_VMALLOC_H
diff --git a/arch/arm/mach-s5pv310/init.c b/arch/arm/mach-exynos4/init.c
similarity index 73%
rename from arch/arm/mach-s5pv310/init.c
rename to arch/arm/mach-exynos4/init.c
index 182dcf4..cf91f50 100644
--- a/arch/arm/mach-s5pv310/init.c
+++ b/arch/arm/mach-exynos4/init.c
@@ -1,4 +1,4 @@
-/* linux/arch/arm/mach-s5pv310/init.c
+/* linux/arch/arm/mach-exynos4/init.c
*
* Copyright (c) 2010 Samsung Electronics Co., Ltd.
* http://www.samsung.com/
@@ -14,7 +14,7 @@
#include <plat/devs.h>
#include <plat/regs-serial.h>
-static struct s3c24xx_uart_clksrc s5pv310_serial_clocks[] = {
+static struct s3c24xx_uart_clksrc exynos4_serial_clocks[] = {
[0] = {
.name = "uclk1",
.divisor = 1,
@@ -24,7 +24,7 @@ static struct s3c24xx_uart_clksrc s5pv310_serial_clocks[] = {
};
/* uart registration process */
-void __init s5pv310_common_init_uarts(struct s3c2410_uartcfg *cfg, int no)
+void __init exynos4_common_init_uarts(struct s3c2410_uartcfg *cfg, int no)
{
struct s3c2410_uartcfg *tcfg = cfg;
u32 ucnt;
@@ -32,8 +32,8 @@ void __init s5pv310_common_init_uarts(struct s3c2410_uartcfg *cfg, int no)
for (ucnt = 0; ucnt < no; ucnt++, tcfg++) {
if (!tcfg->clocks) {
tcfg->has_fracval = 1;
- tcfg->clocks = s5pv310_serial_clocks;
- tcfg->clocks_size = ARRAY_SIZE(s5pv310_serial_clocks);
+ tcfg->clocks = exynos4_serial_clocks;
+ tcfg->clocks_size = ARRAY_SIZE(exynos4_serial_clocks);
}
}
diff --git a/arch/arm/mach-s5pv310/platsmp.c b/arch/arm/mach-exynos4/platsmp.c
similarity index 92%
rename from arch/arm/mach-s5pv310/platsmp.c
rename to arch/arm/mach-exynos4/platsmp.c
index 34093b0..6d35878 100644
--- a/arch/arm/mach-s5pv310/platsmp.c
+++ b/arch/arm/mach-exynos4/platsmp.c
@@ -1,7 +1,7 @@
-/* linux/arch/arm/mach-s5pv310/platsmp.c
+/* linux/arch/arm/mach-exynos4/platsmp.c
*
- * Copyright (c) 2010 Samsung Electronics Co., Ltd.
- * http://www.samsung.com/
+ * Copyright (c) 2010-2011 Samsung Electronics Co., Ltd.
+ * http://www.samsung.com
*
* Cloned from linux/arch/arm/mach-vexpress/platsmp.c
*
@@ -28,7 +28,7 @@
#include <mach/hardware.h>
#include <mach/regs-clock.h>
-extern void s5pv310_secondary_startup(void);
+extern void exynos4_secondary_startup(void);
/*
* control for which core is the next to come out of the secondary
@@ -139,7 +139,7 @@ void __init smp_init_cpus(void)
/* sanity check */
if (ncores > NR_CPUS) {
printk(KERN_WARNING
- "S5PV310: no. of cores (%d) greater than configured "
+ "EXYNOS4: no. of cores (%d) greater than configured "
"maximum of %d - clipping\n",
ncores, NR_CPUS);
ncores = NR_CPUS;
@@ -168,5 +168,5 @@ void __init platform_smp_prepare_cpus(unsigned int max_cpus)
* until it receives a soft interrupt, and then the
* secondary CPU branches to this address.
*/
- __raw_writel(BSYM(virt_to_phys(s5pv310_secondary_startup)), S5P_VA_SYSRAM);
+ __raw_writel(BSYM(virt_to_phys(exynos4_secondary_startup)), S5P_VA_SYSRAM);
}
diff --git a/arch/arm/mach-s5pv310/setup-i2c0.c b/arch/arm/mach-exynos4/setup-i2c0.c
similarity index 87%
rename from arch/arm/mach-s5pv310/setup-i2c0.c
rename to arch/arm/mach-exynos4/setup-i2c0.c
index f47f8f3..d395bd1 100644
--- a/arch/arm/mach-s5pv310/setup-i2c0.c
+++ b/arch/arm/mach-exynos4/setup-i2c0.c
@@ -1,5 +1,5 @@
/*
- * linux/arch/arm/mach-s5pv310/setup-i2c0.c
+ * linux/arch/arm/mach-exynos4/setup-i2c0.c
*
* Copyright (c) 2009-2010 Samsung Electronics Co., Ltd.
* http://www.samsung.com/
@@ -21,6 +21,6 @@ struct platform_device; /* don't need the contents */
void s3c_i2c0_cfg_gpio(struct platform_device *dev)
{
- s3c_gpio_cfgall_range(S5PV310_GPD1(0), 2,
+ s3c_gpio_cfgall_range(EXYNOS4_GPD1(0), 2,
S3C_GPIO_SFN(2), S3C_GPIO_PULL_UP);
}
diff --git a/arch/arm/mach-s5pv310/include/mach/gpio.h b/arch/arm/mach-s5pv310/include/mach/gpio.h
deleted file mode 100644
index 20cb80c..0000000
--- a/arch/arm/mach-s5pv310/include/mach/gpio.h
+++ /dev/null
@@ -1,135 +0,0 @@
-/* linux/arch/arm/mach-s5pv310/include/mach/gpio.h
- *
- * Copyright (c) 2010 Samsung Electronics Co., Ltd.
- * http://www.samsung.com/
- *
- * S5PV310 - GPIO lib support
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
-*/
-
-#ifndef __ASM_ARCH_GPIO_H
-#define __ASM_ARCH_GPIO_H __FILE__
-
-#define gpio_get_value __gpio_get_value
-#define gpio_set_value __gpio_set_value
-#define gpio_cansleep __gpio_cansleep
-#define gpio_to_irq __gpio_to_irq
-
-/* Practically, GPIO banks upto GPZ are the configurable gpio banks */
-
-/* GPIO bank sizes */
-#define S5PV310_GPIO_A0_NR (8)
-#define S5PV310_GPIO_A1_NR (6)
-#define S5PV310_GPIO_B_NR (8)
-#define S5PV310_GPIO_C0_NR (5)
-#define S5PV310_GPIO_C1_NR (5)
-#define S5PV310_GPIO_D0_NR (4)
-#define S5PV310_GPIO_D1_NR (4)
-#define S5PV310_GPIO_E0_NR (5)
-#define S5PV310_GPIO_E1_NR (8)
-#define S5PV310_GPIO_E2_NR (6)
-#define S5PV310_GPIO_E3_NR (8)
-#define S5PV310_GPIO_E4_NR (8)
-#define S5PV310_GPIO_F0_NR (8)
-#define S5PV310_GPIO_F1_NR (8)
-#define S5PV310_GPIO_F2_NR (8)
-#define S5PV310_GPIO_F3_NR (6)
-#define S5PV310_GPIO_J0_NR (8)
-#define S5PV310_GPIO_J1_NR (5)
-#define S5PV310_GPIO_K0_NR (7)
-#define S5PV310_GPIO_K1_NR (7)
-#define S5PV310_GPIO_K2_NR (7)
-#define S5PV310_GPIO_K3_NR (7)
-#define S5PV310_GPIO_L0_NR (8)
-#define S5PV310_GPIO_L1_NR (3)
-#define S5PV310_GPIO_L2_NR (8)
-#define S5PV310_GPIO_X0_NR (8)
-#define S5PV310_GPIO_X1_NR (8)
-#define S5PV310_GPIO_X2_NR (8)
-#define S5PV310_GPIO_X3_NR (8)
-#define S5PV310_GPIO_Z_NR (7)
-
-/* GPIO bank numbers */
-
-#define S5PV310_GPIO_NEXT(__gpio) \
- ((__gpio##_START) + (__gpio##_NR) + CONFIG_S3C_GPIO_SPACE + 1)
-
-enum s5p_gpio_number {
- S5PV310_GPIO_A0_START = 0,
- S5PV310_GPIO_A1_START = S5PV310_GPIO_NEXT(S5PV310_GPIO_A0),
- S5PV310_GPIO_B_START = S5PV310_GPIO_NEXT(S5PV310_GPIO_A1),
- S5PV310_GPIO_C0_START = S5PV310_GPIO_NEXT(S5PV310_GPIO_B),
- S5PV310_GPIO_C1_START = S5PV310_GPIO_NEXT(S5PV310_GPIO_C0),
- S5PV310_GPIO_D0_START = S5PV310_GPIO_NEXT(S5PV310_GPIO_C1),
- S5PV310_GPIO_D1_START = S5PV310_GPIO_NEXT(S5PV310_GPIO_D0),
- S5PV310_GPIO_E0_START = S5PV310_GPIO_NEXT(S5PV310_GPIO_D1),
- S5PV310_GPIO_E1_START = S5PV310_GPIO_NEXT(S5PV310_GPIO_E0),
- S5PV310_GPIO_E2_START = S5PV310_GPIO_NEXT(S5PV310_GPIO_E1),
- S5PV310_GPIO_E3_START = S5PV310_GPIO_NEXT(S5PV310_GPIO_E2),
- S5PV310_GPIO_E4_START = S5PV310_GPIO_NEXT(S5PV310_GPIO_E3),
- S5PV310_GPIO_F0_START = S5PV310_GPIO_NEXT(S5PV310_GPIO_E4),
- S5PV310_GPIO_F1_START = S5PV310_GPIO_NEXT(S5PV310_GPIO_F0),
- S5PV310_GPIO_F2_START = S5PV310_GPIO_NEXT(S5PV310_GPIO_F1),
- S5PV310_GPIO_F3_START = S5PV310_GPIO_NEXT(S5PV310_GPIO_F2),
- S5PV310_GPIO_J0_START = S5PV310_GPIO_NEXT(S5PV310_GPIO_F3),
- S5PV310_GPIO_J1_START = S5PV310_GPIO_NEXT(S5PV310_GPIO_J0),
- S5PV310_GPIO_K0_START = S5PV310_GPIO_NEXT(S5PV310_GPIO_J1),
- S5PV310_GPIO_K1_START = S5PV310_GPIO_NEXT(S5PV310_GPIO_K0),
- S5PV310_GPIO_K2_START = S5PV310_GPIO_NEXT(S5PV310_GPIO_K1),
- S5PV310_GPIO_K3_START = S5PV310_GPIO_NEXT(S5PV310_GPIO_K2),
- S5PV310_GPIO_L0_START = S5PV310_GPIO_NEXT(S5PV310_GPIO_K3),
- S5PV310_GPIO_L1_START = S5PV310_GPIO_NEXT(S5PV310_GPIO_L0),
- S5PV310_GPIO_L2_START = S5PV310_GPIO_NEXT(S5PV310_GPIO_L1),
- S5PV310_GPIO_X0_START = S5PV310_GPIO_NEXT(S5PV310_GPIO_L2),
- S5PV310_GPIO_X1_START = S5PV310_GPIO_NEXT(S5PV310_GPIO_X0),
- S5PV310_GPIO_X2_START = S5PV310_GPIO_NEXT(S5PV310_GPIO_X1),
- S5PV310_GPIO_X3_START = S5PV310_GPIO_NEXT(S5PV310_GPIO_X2),
- S5PV310_GPIO_Z_START = S5PV310_GPIO_NEXT(S5PV310_GPIO_X3),
-};
-
-/* S5PV310 GPIO number definitions */
-#define S5PV310_GPA0(_nr) (S5PV310_GPIO_A0_START + (_nr))
-#define S5PV310_GPA1(_nr) (S5PV310_GPIO_A1_START + (_nr))
-#define S5PV310_GPB(_nr) (S5PV310_GPIO_B_START + (_nr))
-#define S5PV310_GPC0(_nr) (S5PV310_GPIO_C0_START + (_nr))
-#define S5PV310_GPC1(_nr) (S5PV310_GPIO_C1_START + (_nr))
-#define S5PV310_GPD0(_nr) (S5PV310_GPIO_D0_START + (_nr))
-#define S5PV310_GPD1(_nr) (S5PV310_GPIO_D1_START + (_nr))
-#define S5PV310_GPE0(_nr) (S5PV310_GPIO_E0_START + (_nr))
-#define S5PV310_GPE1(_nr) (S5PV310_GPIO_E1_START + (_nr))
-#define S5PV310_GPE2(_nr) (S5PV310_GPIO_E2_START + (_nr))
-#define S5PV310_GPE3(_nr) (S5PV310_GPIO_E3_START + (_nr))
-#define S5PV310_GPE4(_nr) (S5PV310_GPIO_E4_START + (_nr))
-#define S5PV310_GPF0(_nr) (S5PV310_GPIO_F0_START + (_nr))
-#define S5PV310_GPF1(_nr) (S5PV310_GPIO_F1_START + (_nr))
-#define S5PV310_GPF2(_nr) (S5PV310_GPIO_F2_START + (_nr))
-#define S5PV310_GPF3(_nr) (S5PV310_GPIO_F3_START + (_nr))
-#define S5PV310_GPJ0(_nr) (S5PV310_GPIO_J0_START + (_nr))
-#define S5PV310_GPJ1(_nr) (S5PV310_GPIO_J1_START + (_nr))
-#define S5PV310_GPK0(_nr) (S5PV310_GPIO_K0_START + (_nr))
-#define S5PV310_GPK1(_nr) (S5PV310_GPIO_K1_START + (_nr))
-#define S5PV310_GPK2(_nr) (S5PV310_GPIO_K2_START + (_nr))
-#define S5PV310_GPK3(_nr) (S5PV310_GPIO_K3_START + (_nr))
-#define S5PV310_GPL0(_nr) (S5PV310_GPIO_L0_START + (_nr))
-#define S5PV310_GPL1(_nr) (S5PV310_GPIO_L1_START + (_nr))
-#define S5PV310_GPL2(_nr) (S5PV310_GPIO_L2_START + (_nr))
-#define S5PV310_GPX0(_nr) (S5PV310_GPIO_X0_START + (_nr))
-#define S5PV310_GPX1(_nr) (S5PV310_GPIO_X1_START + (_nr))
-#define S5PV310_GPX2(_nr) (S5PV310_GPIO_X2_START + (_nr))
-#define S5PV310_GPX3(_nr) (S5PV310_GPIO_X3_START + (_nr))
-#define S5PV310_GPZ(_nr) (S5PV310_GPIO_Z_START + (_nr))
-
-/* the end of the S5PV310 specific gpios */
-#define S5PV310_GPIO_END (S5PV310_GPZ(S5PV310_GPIO_Z_NR) + 1)
-#define S3C_GPIO_END S5PV310_GPIO_END
-
-/* define the number of gpios we need to the one after the GPZ() range */
-#define ARCH_NR_GPIOS (S5PV310_GPZ(S5PV310_GPIO_Z_NR) + \
- CONFIG_SAMSUNG_GPIO_EXTRA + 1)
-
-#include <asm-generic/gpio.h>
-
-#endif /* __ASM_ARCH_GPIO_H */
diff --git a/arch/arm/mach-s5pv310/include/mach/map.h b/arch/arm/mach-s5pv310/include/mach/map.h
deleted file mode 100644
index 901657f..0000000
--- a/arch/arm/mach-s5pv310/include/mach/map.h
+++ /dev/null
@@ -1,144 +0,0 @@
-/* linux/arch/arm/mach-s5pv310/include/mach/map.h
- *
- * Copyright (c) 2010-2011 Samsung Electronics Co., Ltd.
- * http://www.samsung.com/
- *
- * S5PV310 - Memory map definitions
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
-*/
-
-#ifndef __ASM_ARCH_MAP_H
-#define __ASM_ARCH_MAP_H __FILE__
-
-#include <plat/map-base.h>
-
-/*
- * S5PV310 UART offset is 0x10000 but the older S5P SoCs are 0x400.
- * So need to define it, and here is to avoid redefinition warning.
- */
-#define S3C_UART_OFFSET (0x10000)
-
-#include <plat/map-s5p.h>
-
-#define S5PV310_PA_SYSRAM 0x02025000
-
-#define S5PV310_PA_I2S0 0x03830000
-#define S5PV310_PA_I2S1 0xE3100000
-#define S5PV310_PA_I2S2 0xE2A00000
-
-#define S5PV310_PA_PCM0 0x03840000
-#define S5PV310_PA_PCM1 0x13980000
-#define S5PV310_PA_PCM2 0x13990000
-
-#define S5PV310_PA_SROM_BANK(x) (0x04000000 + ((x) * 0x01000000))
-
-#define S5PC210_PA_ONENAND 0x0C000000
-#define S5PC210_PA_ONENAND_DMA 0x0C600000
-
-#define S5PV310_PA_CHIPID 0x10000000
-
-#define S5PV310_PA_SYSCON 0x10010000
-#define S5PV310_PA_PMU 0x10020000
-#define S5PV310_PA_CMU 0x10030000
-
-#define S5PV310_PA_WATCHDOG 0x10060000
-#define S5PV310_PA_RTC 0x10070000
-
-#define S5PV310_PA_DMC0 0x10400000
-
-#define S5PV310_PA_COMBINER 0x10448000
-
-#define S5PV310_PA_COREPERI 0x10500000
-#define S5PV310_PA_GIC_CPU 0x10500100
-#define S5PV310_PA_TWD 0x10500600
-#define S5PV310_PA_GIC_DIST 0x10501000
-#define S5PV310_PA_L2CC 0x10502000
-
-#define S5PV310_PA_MDMA 0x10810000
-#define S5PV310_PA_PDMA0 0x12680000
-#define S5PV310_PA_PDMA1 0x12690000
-
-#define S5PV310_PA_SYSMMU_MDMA 0x10A40000
-#define S5PV310_PA_SYSMMU_SSS 0x10A50000
-#define S5PV310_PA_SYSMMU_FIMC0 0x11A20000
-#define S5PV310_PA_SYSMMU_FIMC1 0x11A30000
-#define S5PV310_PA_SYSMMU_FIMC2 0x11A40000
-#define S5PV310_PA_SYSMMU_FIMC3 0x11A50000
-#define S5PV310_PA_SYSMMU_JPEG 0x11A60000
-#define S5PV310_PA_SYSMMU_FIMD0 0x11E20000
-#define S5PV310_PA_SYSMMU_FIMD1 0x12220000
-#define S5PV310_PA_SYSMMU_PCIe 0x12620000
-#define S5PV310_PA_SYSMMU_G2D 0x12A20000
-#define S5PV310_PA_SYSMMU_ROTATOR 0x12A30000
-#define S5PV310_PA_SYSMMU_MDMA2 0x12A40000
-#define S5PV310_PA_SYSMMU_TV 0x12E20000
-#define S5PV310_PA_SYSMMU_MFC_L 0x13620000
-#define S5PV310_PA_SYSMMU_MFC_R 0x13630000
-
-#define S5PV310_PA_GPIO1 0x11400000
-#define S5PV310_PA_GPIO2 0x11000000
-#define S5PV310_PA_GPIO3 0x03860000
-
-#define S5PV310_PA_MIPI_CSIS0 0x11880000
-#define S5PV310_PA_MIPI_CSIS1 0x11890000
-
-#define S5PV310_PA_HSMMC(x) (0x12510000 + ((x) * 0x10000))
-
-#define S5PV310_PA_SROMC 0x12570000
-
-#define S5PV310_PA_UART 0x13800000
-
-#define S5PV310_PA_IIC(x) (0x13860000 + ((x) * 0x10000))
-
-#define S5PV310_PA_AC97 0x139A0000
-
-#define S5PV310_PA_TIMER 0x139D0000
-
-#define S5PV310_PA_SDRAM 0x40000000
-
-#define S5PV310_PA_SPDIF 0xE1100000
-
-/* Compatibiltiy Defines */
-
-#define S3C_PA_HSMMC0 S5PV310_PA_HSMMC(0)
-#define S3C_PA_HSMMC1 S5PV310_PA_HSMMC(1)
-#define S3C_PA_HSMMC2 S5PV310_PA_HSMMC(2)
-#define S3C_PA_HSMMC3 S5PV310_PA_HSMMC(3)
-#define S3C_PA_IIC S5PV310_PA_IIC(0)
-#define S3C_PA_IIC1 S5PV310_PA_IIC(1)
-#define S3C_PA_IIC2 S5PV310_PA_IIC(2)
-#define S3C_PA_IIC3 S5PV310_PA_IIC(3)
-#define S3C_PA_IIC4 S5PV310_PA_IIC(4)
-#define S3C_PA_IIC5 S5PV310_PA_IIC(5)
-#define S3C_PA_IIC6 S5PV310_PA_IIC(6)
-#define S3C_PA_IIC7 S5PV310_PA_IIC(7)
-#define S3C_PA_RTC S5PV310_PA_RTC
-#define S3C_PA_WDT S5PV310_PA_WATCHDOG
-
-#define S5P_PA_CHIPID S5PV310_PA_CHIPID
-#define S5P_PA_MIPI_CSIS0 S5PV310_PA_MIPI_CSIS0
-#define S5P_PA_MIPI_CSIS1 S5PV310_PA_MIPI_CSIS1
-#define S5P_PA_ONENAND S5PC210_PA_ONENAND
-#define S5P_PA_ONENAND_DMA S5PC210_PA_ONENAND_DMA
-#define S5P_PA_SDRAM S5PV310_PA_SDRAM
-#define S5P_PA_SROMC S5PV310_PA_SROMC
-#define S5P_PA_SYSCON S5PV310_PA_SYSCON
-#define S5P_PA_TIMER S5PV310_PA_TIMER
-
-/* UART */
-
-#define S3C_PA_UART S5PV310_PA_UART
-
-#define S5P_PA_UART(x) (S3C_PA_UART + ((x) * S3C_UART_OFFSET))
-#define S5P_PA_UART0 S5P_PA_UART(0)
-#define S5P_PA_UART1 S5P_PA_UART(1)
-#define S5P_PA_UART2 S5P_PA_UART(2)
-#define S5P_PA_UART3 S5P_PA_UART(3)
-#define S5P_PA_UART4 S5P_PA_UART(4)
-
-#define S5P_SZ_UART SZ_256
-
-#endif /* __ASM_ARCH_MAP_H */
diff --git a/arch/arm/mach-s5pv310/include/mach/regs-gpio.h b/arch/arm/mach-s5pv310/include/mach/regs-gpio.h
deleted file mode 100644
index 82e9e0c..0000000
--- a/arch/arm/mach-s5pv310/include/mach/regs-gpio.h
+++ /dev/null
@@ -1,42 +0,0 @@
-/* linux/arch/arm/mach-s5pv310/include/mach/regs-gpio.h
- *
- * Copyright (c) 2010 Samsung Electronics Co., Ltd.
- * http://www.samsung.com
- *
- * S5PV310 - GPIO (including EINT) register definitions
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
-*/
-
-#ifndef __ASM_ARCH_REGS_GPIO_H
-#define __ASM_ARCH_REGS_GPIO_H __FILE__
-
-#include <mach/map.h>
-#include <mach/irqs.h>
-
-#define S5PV310_EINT40CON (S5P_VA_GPIO2 + 0xE00)
-#define S5P_EINT_CON(x) (S5PV310_EINT40CON + ((x) * 0x4))
-
-#define S5PV310_EINT40FLTCON0 (S5P_VA_GPIO2 + 0xE80)
-#define S5P_EINT_FLTCON(x) (S5PV310_EINT40FLTCON0 + ((x) * 0x4))
-
-#define S5PV310_EINT40MASK (S5P_VA_GPIO2 + 0xF00)
-#define S5P_EINT_MASK(x) (S5PV310_EINT40MASK + ((x) * 0x4))
-
-#define S5PV310_EINT40PEND (S5P_VA_GPIO2 + 0xF40)
-#define S5P_EINT_PEND(x) (S5PV310_EINT40PEND + ((x) * 0x4))
-
-#define EINT_REG_NR(x) (EINT_OFFSET(x) >> 3)
-
-#define eint_irq_to_bit(irq) (1 << (EINT_OFFSET(irq) & 0x7))
-
-#define EINT_MODE S3C_GPIO_SFN(0xf)
-
-#define EINT_GPIO_0(x) S5PV310_GPX0(x)
-#define EINT_GPIO_1(x) S5PV310_GPX1(x)
-#define EINT_GPIO_2(x) S5PV310_GPX2(x)
-#define EINT_GPIO_3(x) S5PV310_GPX3(x)
-
-#endif /* __ASM_ARCH_REGS_GPIO_H */
diff --git a/arch/arm/plat-s5p/cpu.c b/arch/arm/plat-s5p/cpu.c
index 047d31c..c3bfe9b 100644
--- a/arch/arm/plat-s5p/cpu.c
+++ b/arch/arm/plat-s5p/cpu.c
@@ -1,7 +1,7 @@
/* linux/arch/arm/plat-s5p/cpu.c
*
- * Copyright (c) 2009 Samsung Electronics Co., Ltd.
- * http://www.samsung.com/
+ * Copyright (c) 2009-2011 Samsung Electronics Co., Ltd.
+ * http://www.samsung.com
*
* S5P CPU Support
*
@@ -12,17 +12,20 @@
#include <linux/init.h>
#include <linux/module.h>
-#include <mach/map.h>
+
#include <asm/mach/arch.h>
#include <asm/mach/map.h>
+
+#include <mach/map.h>
#include <mach/regs-clock.h>
+
#include <plat/cpu.h>
#include <plat/s5p6440.h>
#include <plat/s5p6442.h>
#include <plat/s5p6450.h>
#include <plat/s5pc100.h>
#include <plat/s5pv210.h>
-#include <plat/s5pv310.h>
+#include <plat/exynos4.h>
/* table of supported CPUs */
@@ -31,7 +34,7 @@ static const char name_s5p6442[] = "S5P6442";
static const char name_s5p6450[] = "S5P6450";
static const char name_s5pc100[] = "S5PC100";
static const char name_s5pv210[] = "S5PV210/S5PC110";
-static const char name_s5pv310[] = "S5PV310";
+static const char name_exynos4210[] = "EXYNOS4210";
static struct cpu_table cpu_ids[] __initdata = {
{
@@ -75,13 +78,13 @@ static struct cpu_table cpu_ids[] __initdata = {
.init = s5pv210_init,
.name = name_s5pv210,
}, {
- .idcode = 0x43200000,
+ .idcode = 0x43210000,
.idmask = 0xfffff000,
- .map_io = s5pv310_map_io,
- .init_clocks = s5pv310_init_clocks,
- .init_uarts = s5pv310_init_uarts,
- .init = s5pv310_init,
- .name = name_s5pv310,
+ .map_io = exynos4_map_io,
+ .init_clocks = exynos4_init_clocks,
+ .init_uarts = exynos4_init_uarts,
+ .init = exynos4_init,
+ .name = name_exynos4210,
},
};
diff --git a/arch/arm/plat-s5p/include/plat/exynos4.h b/arch/arm/plat-s5p/include/plat/exynos4.h
new file mode 100644
index 0000000..907caab
--- /dev/null
+++ b/arch/arm/plat-s5p/include/plat/exynos4.h
@@ -0,0 +1,34 @@
+/* linux/arch/arm/plat-s5p/include/plat/exynos4.h
+ *
+ * Copyright (c) 2010-2011 Samsung Electronics Co., Ltd.
+ * http://www.samsung.com
+ *
+ * Header file for exynos4 cpu support
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+/* Common init code for EXYNOS4 related SoCs */
+
+extern void exynos4_common_init_uarts(struct s3c2410_uartcfg *cfg, int no);
+extern void exynos4_register_clocks(void);
+extern void exynos4_setup_clocks(void);
+
+#ifdef CONFIG_CPU_EXYNOS4210
+
+extern int exynos4_init(void);
+extern void exynos4_init_irq(void);
+extern void exynos4_map_io(void);
+extern void exynos4_init_clocks(int xtal);
+extern struct sys_timer exynos4_timer;
+
+#define exynos4_init_uarts exynos4_common_init_uarts
+
+#else
+#define exynos4_init_clocks NULL
+#define exynos4_init_uarts NULL
+#define exynos4_map_io NULL
+#define exynos4_init NULL
+#endif
diff --git a/arch/arm/plat-s5p/include/plat/s5pv310.h b/arch/arm/plat-s5p/include/plat/s5pv310.h
deleted file mode 100644
index 769c991..0000000
--- a/arch/arm/plat-s5p/include/plat/s5pv310.h
+++ /dev/null
@@ -1,34 +0,0 @@
-/* linux/arch/arm/plat-s5p/include/plat/s5pv310.h
- *
- * Copyright (c) 2010 Samsung Electronics Co., Ltd.
- * http://www.samsung.com/
- *
- * Header file for s5pv310 cpu support
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
-*/
-
-/* Common init code for S5PV310 related SoCs */
-
-extern void s5pv310_common_init_uarts(struct s3c2410_uartcfg *cfg, int no);
-extern void s5pv310_register_clocks(void);
-extern void s5pv310_setup_clocks(void);
-
-#ifdef CONFIG_CPU_S5PV310
-
-extern int s5pv310_init(void);
-extern void s5pv310_init_irq(void);
-extern void s5pv310_map_io(void);
-extern void s5pv310_init_clocks(int xtal);
-extern struct sys_timer s5pv310_timer;
-
-#define s5pv310_init_uarts s5pv310_common_init_uarts
-
-#else
-#define s5pv310_init_clocks NULL
-#define s5pv310_init_uarts NULL
-#define s5pv310_map_io NULL
-#define s5pv310_init NULL
-#endif
--
1.7.1
^ permalink raw reply related [flat|nested] 20+ messages in thread* [PATCH 02/11] ARM: EXYNOS4: Update Clock part
2011-02-14 8:22 [PATCH 0/11] ARM: EXYNOS4: Change ARCH name, ARCH_EXYNOS4 from ARCH_S5PV310 Kukjin Kim
2011-02-14 8:22 ` [PATCH 01/11] ARM: EXYNOS4: Add EXYNOS4 CPU initialization support Kukjin Kim
@ 2011-02-14 8:22 ` Kukjin Kim
2011-02-14 8:22 ` [PATCH 03/11] ARM: EXYNOS4: Update IRQ part Kukjin Kim
` (10 subsequent siblings)
12 siblings, 0 replies; 20+ messages in thread
From: Kukjin Kim @ 2011-02-14 8:22 UTC (permalink / raw)
To: linux-arm-kernel
This patch updates Clock part of EXYNOS4 according to the change of
ARCH name, EXYNOS4.
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
---
arch/arm/{mach-s5pv310 => mach-exynos4}/clock.c | 190 ++++++++++----------
.../include/mach/regs-clock.h | 8 +-
2 files changed, 99 insertions(+), 99 deletions(-)
rename arch/arm/{mach-s5pv310 => mach-exynos4}/clock.c (83%)
rename arch/arm/{mach-s5pv310 => mach-exynos4}/include/mach/regs-clock.h (97%)
diff --git a/arch/arm/mach-s5pv310/clock.c b/arch/arm/mach-exynos4/clock.c
similarity index 83%
rename from arch/arm/mach-s5pv310/clock.c
rename to arch/arm/mach-exynos4/clock.c
index fc7c2f8..72d53d5 100644
--- a/arch/arm/mach-s5pv310/clock.c
+++ b/arch/arm/mach-exynos4/clock.c
@@ -1,9 +1,9 @@
-/* linux/arch/arm/mach-s5pv310/clock.c
+/* linux/arch/arm/mach-exynos4/clock.c
*
- * Copyright (c) 2010 Samsung Electronics Co., Ltd.
- * http://www.samsung.com/
+ * Copyright (c) 2010-2011 Samsung Electronics Co., Ltd.
+ * http://www.samsung.com
*
- * S5PV310 - Clock support
+ * EXYNOS4 - Clock support
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
@@ -46,72 +46,72 @@ static struct clk clk_sclk_usbphy1 = {
.id = -1,
};
-static int s5pv310_clksrc_mask_top_ctrl(struct clk *clk, int enable)
+static int exynos4_clksrc_mask_top_ctrl(struct clk *clk, int enable)
{
return s5p_gatectrl(S5P_CLKSRC_MASK_TOP, clk, enable);
}
-static int s5pv310_clksrc_mask_cam_ctrl(struct clk *clk, int enable)
+static int exynos4_clksrc_mask_cam_ctrl(struct clk *clk, int enable)
{
return s5p_gatectrl(S5P_CLKSRC_MASK_CAM, clk, enable);
}
-static int s5pv310_clksrc_mask_lcd0_ctrl(struct clk *clk, int enable)
+static int exynos4_clksrc_mask_lcd0_ctrl(struct clk *clk, int enable)
{
return s5p_gatectrl(S5P_CLKSRC_MASK_LCD0, clk, enable);
}
-static int s5pv310_clksrc_mask_lcd1_ctrl(struct clk *clk, int enable)
+static int exynos4_clksrc_mask_lcd1_ctrl(struct clk *clk, int enable)
{
return s5p_gatectrl(S5P_CLKSRC_MASK_LCD1, clk, enable);
}
-static int s5pv310_clksrc_mask_fsys_ctrl(struct clk *clk, int enable)
+static int exynos4_clksrc_mask_fsys_ctrl(struct clk *clk, int enable)
{
return s5p_gatectrl(S5P_CLKSRC_MASK_FSYS, clk, enable);
}
-static int s5pv310_clksrc_mask_peril0_ctrl(struct clk *clk, int enable)
+static int exynos4_clksrc_mask_peril0_ctrl(struct clk *clk, int enable)
{
return s5p_gatectrl(S5P_CLKSRC_MASK_PERIL0, clk, enable);
}
-static int s5pv310_clksrc_mask_peril1_ctrl(struct clk *clk, int enable)
+static int exynos4_clksrc_mask_peril1_ctrl(struct clk *clk, int enable)
{
return s5p_gatectrl(S5P_CLKSRC_MASK_PERIL1, clk, enable);
}
-static int s5pv310_clk_ip_cam_ctrl(struct clk *clk, int enable)
+static int exynos4_clk_ip_cam_ctrl(struct clk *clk, int enable)
{
return s5p_gatectrl(S5P_CLKGATE_IP_CAM, clk, enable);
}
-static int s5pv310_clk_ip_image_ctrl(struct clk *clk, int enable)
+static int exynos4_clk_ip_image_ctrl(struct clk *clk, int enable)
{
return s5p_gatectrl(S5P_CLKGATE_IP_IMAGE, clk, enable);
}
-static int s5pv310_clk_ip_lcd0_ctrl(struct clk *clk, int enable)
+static int exynos4_clk_ip_lcd0_ctrl(struct clk *clk, int enable)
{
return s5p_gatectrl(S5P_CLKGATE_IP_LCD0, clk, enable);
}
-static int s5pv310_clk_ip_lcd1_ctrl(struct clk *clk, int enable)
+static int exynos4_clk_ip_lcd1_ctrl(struct clk *clk, int enable)
{
return s5p_gatectrl(S5P_CLKGATE_IP_LCD1, clk, enable);
}
-static int s5pv310_clk_ip_fsys_ctrl(struct clk *clk, int enable)
+static int exynos4_clk_ip_fsys_ctrl(struct clk *clk, int enable)
{
return s5p_gatectrl(S5P_CLKGATE_IP_FSYS, clk, enable);
}
-static int s5pv310_clk_ip_peril_ctrl(struct clk *clk, int enable)
+static int exynos4_clk_ip_peril_ctrl(struct clk *clk, int enable)
{
return s5p_gatectrl(S5P_CLKGATE_IP_PERIL, clk, enable);
}
-static int s5pv310_clk_ip_perir_ctrl(struct clk *clk, int enable)
+static int exynos4_clk_ip_perir_ctrl(struct clk *clk, int enable)
{
return s5p_gatectrl(S5P_CLKGATE_IP_PERIR, clk, enable);
}
@@ -358,7 +358,7 @@ static struct clksrc_clk clk_vpllsrc = {
.clk = {
.name = "vpll_src",
.id = -1,
- .enable = s5pv310_clksrc_mask_top_ctrl,
+ .enable = exynos4_clksrc_mask_top_ctrl,
.ctrlbit = (1 << 0),
},
.sources = &clkset_vpllsrc,
@@ -389,205 +389,205 @@ static struct clk init_clocks_off[] = {
.name = "timers",
.id = -1,
.parent = &clk_aclk_100.clk,
- .enable = s5pv310_clk_ip_peril_ctrl,
+ .enable = exynos4_clk_ip_peril_ctrl,
.ctrlbit = (1<<24),
}, {
.name = "csis",
.id = 0,
- .enable = s5pv310_clk_ip_cam_ctrl,
+ .enable = exynos4_clk_ip_cam_ctrl,
.ctrlbit = (1 << 4),
}, {
.name = "csis",
.id = 1,
- .enable = s5pv310_clk_ip_cam_ctrl,
+ .enable = exynos4_clk_ip_cam_ctrl,
.ctrlbit = (1 << 5),
}, {
.name = "fimc",
.id = 0,
- .enable = s5pv310_clk_ip_cam_ctrl,
+ .enable = exynos4_clk_ip_cam_ctrl,
.ctrlbit = (1 << 0),
}, {
.name = "fimc",
.id = 1,
- .enable = s5pv310_clk_ip_cam_ctrl,
+ .enable = exynos4_clk_ip_cam_ctrl,
.ctrlbit = (1 << 1),
}, {
.name = "fimc",
.id = 2,
- .enable = s5pv310_clk_ip_cam_ctrl,
+ .enable = exynos4_clk_ip_cam_ctrl,
.ctrlbit = (1 << 2),
}, {
.name = "fimc",
.id = 3,
- .enable = s5pv310_clk_ip_cam_ctrl,
+ .enable = exynos4_clk_ip_cam_ctrl,
.ctrlbit = (1 << 3),
}, {
.name = "fimd",
.id = 0,
- .enable = s5pv310_clk_ip_lcd0_ctrl,
+ .enable = exynos4_clk_ip_lcd0_ctrl,
.ctrlbit = (1 << 0),
}, {
.name = "fimd",
.id = 1,
- .enable = s5pv310_clk_ip_lcd1_ctrl,
+ .enable = exynos4_clk_ip_lcd1_ctrl,
.ctrlbit = (1 << 0),
}, {
.name = "hsmmc",
.id = 0,
.parent = &clk_aclk_133.clk,
- .enable = s5pv310_clk_ip_fsys_ctrl,
+ .enable = exynos4_clk_ip_fsys_ctrl,
.ctrlbit = (1 << 5),
}, {
.name = "hsmmc",
.id = 1,
.parent = &clk_aclk_133.clk,
- .enable = s5pv310_clk_ip_fsys_ctrl,
+ .enable = exynos4_clk_ip_fsys_ctrl,
.ctrlbit = (1 << 6),
}, {
.name = "hsmmc",
.id = 2,
.parent = &clk_aclk_133.clk,
- .enable = s5pv310_clk_ip_fsys_ctrl,
+ .enable = exynos4_clk_ip_fsys_ctrl,
.ctrlbit = (1 << 7),
}, {
.name = "hsmmc",
.id = 3,
.parent = &clk_aclk_133.clk,
- .enable = s5pv310_clk_ip_fsys_ctrl,
+ .enable = exynos4_clk_ip_fsys_ctrl,
.ctrlbit = (1 << 8),
}, {
.name = "hsmmc",
.id = 4,
.parent = &clk_aclk_133.clk,
- .enable = s5pv310_clk_ip_fsys_ctrl,
+ .enable = exynos4_clk_ip_fsys_ctrl,
.ctrlbit = (1 << 9),
}, {
.name = "sata",
.id = -1,
- .enable = s5pv310_clk_ip_fsys_ctrl,
+ .enable = exynos4_clk_ip_fsys_ctrl,
.ctrlbit = (1 << 10),
}, {
.name = "pdma",
.id = 0,
- .enable = s5pv310_clk_ip_fsys_ctrl,
+ .enable = exynos4_clk_ip_fsys_ctrl,
.ctrlbit = (1 << 0),
}, {
.name = "pdma",
.id = 1,
- .enable = s5pv310_clk_ip_fsys_ctrl,
+ .enable = exynos4_clk_ip_fsys_ctrl,
.ctrlbit = (1 << 1),
}, {
.name = "adc",
.id = -1,
- .enable = s5pv310_clk_ip_peril_ctrl,
+ .enable = exynos4_clk_ip_peril_ctrl,
.ctrlbit = (1 << 15),
}, {
.name = "rtc",
.id = -1,
- .enable = s5pv310_clk_ip_perir_ctrl,
+ .enable = exynos4_clk_ip_perir_ctrl,
.ctrlbit = (1 << 15),
}, {
.name = "watchdog",
.id = -1,
- .enable = s5pv310_clk_ip_perir_ctrl,
+ .enable = exynos4_clk_ip_perir_ctrl,
.ctrlbit = (1 << 14),
}, {
.name = "usbhost",
.id = -1,
- .enable = s5pv310_clk_ip_fsys_ctrl ,
+ .enable = exynos4_clk_ip_fsys_ctrl ,
.ctrlbit = (1 << 12),
}, {
.name = "otg",
.id = -1,
- .enable = s5pv310_clk_ip_fsys_ctrl,
+ .enable = exynos4_clk_ip_fsys_ctrl,
.ctrlbit = (1 << 13),
}, {
.name = "spi",
.id = 0,
- .enable = s5pv310_clk_ip_peril_ctrl,
+ .enable = exynos4_clk_ip_peril_ctrl,
.ctrlbit = (1 << 16),
}, {
.name = "spi",
.id = 1,
- .enable = s5pv310_clk_ip_peril_ctrl,
+ .enable = exynos4_clk_ip_peril_ctrl,
.ctrlbit = (1 << 17),
}, {
.name = "spi",
.id = 2,
- .enable = s5pv310_clk_ip_peril_ctrl,
+ .enable = exynos4_clk_ip_peril_ctrl,
.ctrlbit = (1 << 18),
}, {
.name = "iis",
.id = 0,
- .enable = s5pv310_clk_ip_peril_ctrl,
+ .enable = exynos4_clk_ip_peril_ctrl,
.ctrlbit = (1 << 19),
}, {
.name = "iis",
.id = 1,
- .enable = s5pv310_clk_ip_peril_ctrl,
+ .enable = exynos4_clk_ip_peril_ctrl,
.ctrlbit = (1 << 20),
}, {
.name = "iis",
.id = 2,
- .enable = s5pv310_clk_ip_peril_ctrl,
+ .enable = exynos4_clk_ip_peril_ctrl,
.ctrlbit = (1 << 21),
}, {
.name = "ac97",
.id = -1,
- .enable = s5pv310_clk_ip_peril_ctrl,
+ .enable = exynos4_clk_ip_peril_ctrl,
.ctrlbit = (1 << 27),
}, {
.name = "fimg2d",
.id = -1,
- .enable = s5pv310_clk_ip_image_ctrl,
+ .enable = exynos4_clk_ip_image_ctrl,
.ctrlbit = (1 << 0),
}, {
.name = "i2c",
.id = 0,
.parent = &clk_aclk_100.clk,
- .enable = s5pv310_clk_ip_peril_ctrl,
+ .enable = exynos4_clk_ip_peril_ctrl,
.ctrlbit = (1 << 6),
}, {
.name = "i2c",
.id = 1,
.parent = &clk_aclk_100.clk,
- .enable = s5pv310_clk_ip_peril_ctrl,
+ .enable = exynos4_clk_ip_peril_ctrl,
.ctrlbit = (1 << 7),
}, {
.name = "i2c",
.id = 2,
.parent = &clk_aclk_100.clk,
- .enable = s5pv310_clk_ip_peril_ctrl,
+ .enable = exynos4_clk_ip_peril_ctrl,
.ctrlbit = (1 << 8),
}, {
.name = "i2c",
.id = 3,
.parent = &clk_aclk_100.clk,
- .enable = s5pv310_clk_ip_peril_ctrl,
+ .enable = exynos4_clk_ip_peril_ctrl,
.ctrlbit = (1 << 9),
}, {
.name = "i2c",
.id = 4,
.parent = &clk_aclk_100.clk,
- .enable = s5pv310_clk_ip_peril_ctrl,
+ .enable = exynos4_clk_ip_peril_ctrl,
.ctrlbit = (1 << 10),
}, {
.name = "i2c",
.id = 5,
.parent = &clk_aclk_100.clk,
- .enable = s5pv310_clk_ip_peril_ctrl,
+ .enable = exynos4_clk_ip_peril_ctrl,
.ctrlbit = (1 << 11),
}, {
.name = "i2c",
.id = 6,
.parent = &clk_aclk_100.clk,
- .enable = s5pv310_clk_ip_peril_ctrl,
+ .enable = exynos4_clk_ip_peril_ctrl,
.ctrlbit = (1 << 12),
}, {
.name = "i2c",
.id = 7,
.parent = &clk_aclk_100.clk,
- .enable = s5pv310_clk_ip_peril_ctrl,
+ .enable = exynos4_clk_ip_peril_ctrl,
.ctrlbit = (1 << 13),
},
};
@@ -596,32 +596,32 @@ static struct clk init_clocks[] = {
{
.name = "uart",
.id = 0,
- .enable = s5pv310_clk_ip_peril_ctrl,
+ .enable = exynos4_clk_ip_peril_ctrl,
.ctrlbit = (1 << 0),
}, {
.name = "uart",
.id = 1,
- .enable = s5pv310_clk_ip_peril_ctrl,
+ .enable = exynos4_clk_ip_peril_ctrl,
.ctrlbit = (1 << 1),
}, {
.name = "uart",
.id = 2,
- .enable = s5pv310_clk_ip_peril_ctrl,
+ .enable = exynos4_clk_ip_peril_ctrl,
.ctrlbit = (1 << 2),
}, {
.name = "uart",
.id = 3,
- .enable = s5pv310_clk_ip_peril_ctrl,
+ .enable = exynos4_clk_ip_peril_ctrl,
.ctrlbit = (1 << 3),
}, {
.name = "uart",
.id = 4,
- .enable = s5pv310_clk_ip_peril_ctrl,
+ .enable = exynos4_clk_ip_peril_ctrl,
.ctrlbit = (1 << 4),
}, {
.name = "uart",
.id = 5,
- .enable = s5pv310_clk_ip_peril_ctrl,
+ .enable = exynos4_clk_ip_peril_ctrl,
.ctrlbit = (1 << 5),
}
};
@@ -746,7 +746,7 @@ static struct clksrc_clk clksrcs[] = {
.clk = {
.name = "uclk1",
.id = 0,
- .enable = s5pv310_clksrc_mask_peril0_ctrl,
+ .enable = exynos4_clksrc_mask_peril0_ctrl,
.ctrlbit = (1 << 0),
},
.sources = &clkset_group,
@@ -756,7 +756,7 @@ static struct clksrc_clk clksrcs[] = {
.clk = {
.name = "uclk1",
.id = 1,
- .enable = s5pv310_clksrc_mask_peril0_ctrl,
+ .enable = exynos4_clksrc_mask_peril0_ctrl,
.ctrlbit = (1 << 4),
},
.sources = &clkset_group,
@@ -766,7 +766,7 @@ static struct clksrc_clk clksrcs[] = {
.clk = {
.name = "uclk1",
.id = 2,
- .enable = s5pv310_clksrc_mask_peril0_ctrl,
+ .enable = exynos4_clksrc_mask_peril0_ctrl,
.ctrlbit = (1 << 8),
},
.sources = &clkset_group,
@@ -776,7 +776,7 @@ static struct clksrc_clk clksrcs[] = {
.clk = {
.name = "uclk1",
.id = 3,
- .enable = s5pv310_clksrc_mask_peril0_ctrl,
+ .enable = exynos4_clksrc_mask_peril0_ctrl,
.ctrlbit = (1 << 12),
},
.sources = &clkset_group,
@@ -786,7 +786,7 @@ static struct clksrc_clk clksrcs[] = {
.clk = {
.name = "sclk_pwm",
.id = -1,
- .enable = s5pv310_clksrc_mask_peril0_ctrl,
+ .enable = exynos4_clksrc_mask_peril0_ctrl,
.ctrlbit = (1 << 24),
},
.sources = &clkset_group,
@@ -796,7 +796,7 @@ static struct clksrc_clk clksrcs[] = {
.clk = {
.name = "sclk_csis",
.id = 0,
- .enable = s5pv310_clksrc_mask_cam_ctrl,
+ .enable = exynos4_clksrc_mask_cam_ctrl,
.ctrlbit = (1 << 24),
},
.sources = &clkset_group,
@@ -806,7 +806,7 @@ static struct clksrc_clk clksrcs[] = {
.clk = {
.name = "sclk_csis",
.id = 1,
- .enable = s5pv310_clksrc_mask_cam_ctrl,
+ .enable = exynos4_clksrc_mask_cam_ctrl,
.ctrlbit = (1 << 28),
},
.sources = &clkset_group,
@@ -816,7 +816,7 @@ static struct clksrc_clk clksrcs[] = {
.clk = {
.name = "sclk_cam",
.id = 0,
- .enable = s5pv310_clksrc_mask_cam_ctrl,
+ .enable = exynos4_clksrc_mask_cam_ctrl,
.ctrlbit = (1 << 16),
},
.sources = &clkset_group,
@@ -826,7 +826,7 @@ static struct clksrc_clk clksrcs[] = {
.clk = {
.name = "sclk_cam",
.id = 1,
- .enable = s5pv310_clksrc_mask_cam_ctrl,
+ .enable = exynos4_clksrc_mask_cam_ctrl,
.ctrlbit = (1 << 20),
},
.sources = &clkset_group,
@@ -836,7 +836,7 @@ static struct clksrc_clk clksrcs[] = {
.clk = {
.name = "sclk_fimc",
.id = 0,
- .enable = s5pv310_clksrc_mask_cam_ctrl,
+ .enable = exynos4_clksrc_mask_cam_ctrl,
.ctrlbit = (1 << 0),
},
.sources = &clkset_group,
@@ -846,7 +846,7 @@ static struct clksrc_clk clksrcs[] = {
.clk = {
.name = "sclk_fimc",
.id = 1,
- .enable = s5pv310_clksrc_mask_cam_ctrl,
+ .enable = exynos4_clksrc_mask_cam_ctrl,
.ctrlbit = (1 << 4),
},
.sources = &clkset_group,
@@ -856,7 +856,7 @@ static struct clksrc_clk clksrcs[] = {
.clk = {
.name = "sclk_fimc",
.id = 2,
- .enable = s5pv310_clksrc_mask_cam_ctrl,
+ .enable = exynos4_clksrc_mask_cam_ctrl,
.ctrlbit = (1 << 8),
},
.sources = &clkset_group,
@@ -866,7 +866,7 @@ static struct clksrc_clk clksrcs[] = {
.clk = {
.name = "sclk_fimc",
.id = 3,
- .enable = s5pv310_clksrc_mask_cam_ctrl,
+ .enable = exynos4_clksrc_mask_cam_ctrl,
.ctrlbit = (1 << 12),
},
.sources = &clkset_group,
@@ -876,7 +876,7 @@ static struct clksrc_clk clksrcs[] = {
.clk = {
.name = "sclk_fimd",
.id = 0,
- .enable = s5pv310_clksrc_mask_lcd0_ctrl,
+ .enable = exynos4_clksrc_mask_lcd0_ctrl,
.ctrlbit = (1 << 0),
},
.sources = &clkset_group,
@@ -886,7 +886,7 @@ static struct clksrc_clk clksrcs[] = {
.clk = {
.name = "sclk_fimd",
.id = 1,
- .enable = s5pv310_clksrc_mask_lcd1_ctrl,
+ .enable = exynos4_clksrc_mask_lcd1_ctrl,
.ctrlbit = (1 << 0),
},
.sources = &clkset_group,
@@ -896,7 +896,7 @@ static struct clksrc_clk clksrcs[] = {
.clk = {
.name = "sclk_sata",
.id = -1,
- .enable = s5pv310_clksrc_mask_fsys_ctrl,
+ .enable = exynos4_clksrc_mask_fsys_ctrl,
.ctrlbit = (1 << 24),
},
.sources = &clkset_mout_corebus,
@@ -906,7 +906,7 @@ static struct clksrc_clk clksrcs[] = {
.clk = {
.name = "sclk_spi",
.id = 0,
- .enable = s5pv310_clksrc_mask_peril1_ctrl,
+ .enable = exynos4_clksrc_mask_peril1_ctrl,
.ctrlbit = (1 << 16),
},
.sources = &clkset_group,
@@ -916,7 +916,7 @@ static struct clksrc_clk clksrcs[] = {
.clk = {
.name = "sclk_spi",
.id = 1,
- .enable = s5pv310_clksrc_mask_peril1_ctrl,
+ .enable = exynos4_clksrc_mask_peril1_ctrl,
.ctrlbit = (1 << 20),
},
.sources = &clkset_group,
@@ -926,7 +926,7 @@ static struct clksrc_clk clksrcs[] = {
.clk = {
.name = "sclk_spi",
.id = 2,
- .enable = s5pv310_clksrc_mask_peril1_ctrl,
+ .enable = exynos4_clksrc_mask_peril1_ctrl,
.ctrlbit = (1 << 24),
},
.sources = &clkset_group,
@@ -945,7 +945,7 @@ static struct clksrc_clk clksrcs[] = {
.name = "sclk_mmc",
.id = 0,
.parent = &clk_dout_mmc0.clk,
- .enable = s5pv310_clksrc_mask_fsys_ctrl,
+ .enable = exynos4_clksrc_mask_fsys_ctrl,
.ctrlbit = (1 << 0),
},
.reg_div = { .reg = S5P_CLKDIV_FSYS1, .shift = 8, .size = 8 },
@@ -954,7 +954,7 @@ static struct clksrc_clk clksrcs[] = {
.name = "sclk_mmc",
.id = 1,
.parent = &clk_dout_mmc1.clk,
- .enable = s5pv310_clksrc_mask_fsys_ctrl,
+ .enable = exynos4_clksrc_mask_fsys_ctrl,
.ctrlbit = (1 << 4),
},
.reg_div = { .reg = S5P_CLKDIV_FSYS1, .shift = 24, .size = 8 },
@@ -963,7 +963,7 @@ static struct clksrc_clk clksrcs[] = {
.name = "sclk_mmc",
.id = 2,
.parent = &clk_dout_mmc2.clk,
- .enable = s5pv310_clksrc_mask_fsys_ctrl,
+ .enable = exynos4_clksrc_mask_fsys_ctrl,
.ctrlbit = (1 << 8),
},
.reg_div = { .reg = S5P_CLKDIV_FSYS2, .shift = 8, .size = 8 },
@@ -972,7 +972,7 @@ static struct clksrc_clk clksrcs[] = {
.name = "sclk_mmc",
.id = 3,
.parent = &clk_dout_mmc3.clk,
- .enable = s5pv310_clksrc_mask_fsys_ctrl,
+ .enable = exynos4_clksrc_mask_fsys_ctrl,
.ctrlbit = (1 << 12),
},
.reg_div = { .reg = S5P_CLKDIV_FSYS2, .shift = 24, .size = 8 },
@@ -981,7 +981,7 @@ static struct clksrc_clk clksrcs[] = {
.name = "sclk_mmc",
.id = 4,
.parent = &clk_dout_mmc4.clk,
- .enable = s5pv310_clksrc_mask_fsys_ctrl,
+ .enable = exynos4_clksrc_mask_fsys_ctrl,
.ctrlbit = (1 << 16),
},
.reg_div = { .reg = S5P_CLKDIV_FSYS3, .shift = 8, .size = 8 },
@@ -1022,16 +1022,16 @@ static struct clksrc_clk *sysclks[] = {
static int xtal_rate;
-static unsigned long s5pv310_fout_apll_get_rate(struct clk *clk)
+static unsigned long exynos4_fout_apll_get_rate(struct clk *clk)
{
return s5p_get_pll45xx(xtal_rate, __raw_readl(S5P_APLL_CON0), pll_4508);
}
-static struct clk_ops s5pv310_fout_apll_ops = {
- .get_rate = s5pv310_fout_apll_get_rate,
+static struct clk_ops exynos4_fout_apll_ops = {
+ .get_rate = exynos4_fout_apll_get_rate,
};
-void __init_or_cpufreq s5pv310_setup_clocks(void)
+void __init_or_cpufreq exynos4_setup_clocks(void)
{
struct clk *xtal_clk;
unsigned long apll;
@@ -1070,12 +1070,12 @@ void __init_or_cpufreq s5pv310_setup_clocks(void)
vpll = s5p_get_pll46xx(vpllsrc, __raw_readl(S5P_VPLL_CON0),
__raw_readl(S5P_VPLL_CON1), pll_4650);
- clk_fout_apll.ops = &s5pv310_fout_apll_ops;
+ clk_fout_apll.ops = &exynos4_fout_apll_ops;
clk_fout_mpll.rate = mpll;
clk_fout_epll.rate = epll;
clk_fout_vpll.rate = vpll;
- printk(KERN_INFO "S5PV310: PLL settings, A=%ld, M=%ld, E=%ld V=%ld",
+ printk(KERN_INFO "EXYNOS4: PLL settings, A=%ld, M=%ld, E=%ld V=%ld",
apll, mpll, epll, vpll);
armclk = clk_get_rate(&clk_armclk.clk);
@@ -1086,7 +1086,7 @@ void __init_or_cpufreq s5pv310_setup_clocks(void)
aclk_160 = clk_get_rate(&clk_aclk_160.clk);
aclk_133 = clk_get_rate(&clk_aclk_133.clk);
- printk(KERN_INFO "S5PV310: ARMCLK=%ld, DMC=%ld, ACLK200=%ld\n"
+ printk(KERN_INFO "EXYNOS4: ARMCLK=%ld, DMC=%ld, ACLK200=%ld\n"
"ACLK100=%ld, ACLK160=%ld, ACLK133=%ld\n",
armclk, sclk_dmc, aclk_200,
aclk_100, aclk_160, aclk_133);
@@ -1103,7 +1103,7 @@ static struct clk *clks[] __initdata = {
/* Nothing here yet */
};
-void __init s5pv310_register_clocks(void)
+void __init exynos4_register_clocks(void)
{
int ptr;
diff --git a/arch/arm/mach-s5pv310/include/mach/regs-clock.h b/arch/arm/mach-exynos4/include/mach/regs-clock.h
similarity index 97%
rename from arch/arm/mach-s5pv310/include/mach/regs-clock.h
rename to arch/arm/mach-exynos4/include/mach/regs-clock.h
index b5c4ada..ba8f91c 100644
--- a/arch/arm/mach-s5pv310/include/mach/regs-clock.h
+++ b/arch/arm/mach-exynos4/include/mach/regs-clock.h
@@ -1,9 +1,9 @@
-/* linux/arch/arm/mach-s5pv310/include/mach/regs-clock.h
+/* linux/arch/arm/mach-exynos4/include/mach/regs-clock.h
*
- * Copyright (c) 2010 Samsung Electronics Co., Ltd.
- * http://www.samsung.com/
+ * Copyright (c) 2010-2011 Samsung Electronics Co., Ltd.
+ * http://www.samsung.com
*
- * S5PV310 - Clock register definitions
+ * EXYNOS4 - Clock register definitions
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
--
1.7.1
^ permalink raw reply related [flat|nested] 20+ messages in thread* [PATCH 03/11] ARM: EXYNOS4: Update IRQ part
2011-02-14 8:22 [PATCH 0/11] ARM: EXYNOS4: Change ARCH name, ARCH_EXYNOS4 from ARCH_S5PV310 Kukjin Kim
2011-02-14 8:22 ` [PATCH 01/11] ARM: EXYNOS4: Add EXYNOS4 CPU initialization support Kukjin Kim
2011-02-14 8:22 ` [PATCH 02/11] ARM: EXYNOS4: Update Clock part Kukjin Kim
@ 2011-02-14 8:22 ` Kukjin Kim
2011-02-14 8:23 ` [PATCH 04/11] ARM: EXYNOS4: Update Timer part Kukjin Kim
` (9 subsequent siblings)
12 siblings, 0 replies; 20+ messages in thread
From: Kukjin Kim @ 2011-02-14 8:22 UTC (permalink / raw)
To: linux-arm-kernel
This patch updates IRQ part of EXYNOS4 according to the change of
ARCH name, EXYNOS4.
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
---
.../include/mach/irqs.h | 8 +-
.../include/mach/regs-irq.h | 8 +-
.../{mach-s5pv310 => mach-exynos4}/irq-combiner.c | 4 +-
arch/arm/{mach-s5pv310 => mach-exynos4}/irq-eint.c | 62 ++++++++++----------
4 files changed, 41 insertions(+), 41 deletions(-)
rename arch/arm/{mach-s5pv310 => mach-exynos4}/include/mach/irqs.h (96%)
rename arch/arm/{mach-s5pv310 => mach-exynos4}/include/mach/regs-irq.h (66%)
rename arch/arm/{mach-s5pv310 => mach-exynos4}/irq-combiner.c (96%)
rename arch/arm/{mach-s5pv310 => mach-exynos4}/irq-eint.c (72%)
diff --git a/arch/arm/mach-s5pv310/include/mach/irqs.h b/arch/arm/mach-exynos4/include/mach/irqs.h
similarity index 96%
rename from arch/arm/mach-s5pv310/include/mach/irqs.h
rename to arch/arm/mach-exynos4/include/mach/irqs.h
index 536b0b5..2dc5900 100644
--- a/arch/arm/mach-s5pv310/include/mach/irqs.h
+++ b/arch/arm/mach-exynos4/include/mach/irqs.h
@@ -1,9 +1,9 @@
-/* linux/arch/arm/mach-s5pv310/include/mach/irqs.h
+/* linux/arch/arm/mach-exynos4/include/mach/irqs.h
*
- * Copyright (c) 2010 Samsung Electronics Co., Ltd.
- * http://www.samsung.com/
+ * Copyright (c) 2010-2011 Samsung Electronics Co., Ltd.
+ * http://www.samsung.com
*
- * S5PV310 - IRQ definitions
+ * EXYNOS4 - IRQ definitions
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
diff --git a/arch/arm/mach-s5pv310/include/mach/regs-irq.h b/arch/arm/mach-exynos4/include/mach/regs-irq.h
similarity index 66%
rename from arch/arm/mach-s5pv310/include/mach/regs-irq.h
rename to arch/arm/mach-exynos4/include/mach/regs-irq.h
index c6e09c7..9c7b4bf 100644
--- a/arch/arm/mach-s5pv310/include/mach/regs-irq.h
+++ b/arch/arm/mach-exynos4/include/mach/regs-irq.h
@@ -1,9 +1,9 @@
-/* linux/arch/arm/mach-s5pv310/include/mach/regs-irq.h
+/* linux/arch/arm/mach-exynos4/include/mach/regs-irq.h
*
- * Copyright (c) 2010 Samsung Electronics Co., Ltd.
- * http://www.samsung.com/
+ * Copyright (c) 2010-2011 Samsung Electronics Co., Ltd.
+ * http://www.samsung.com
*
- * S5PV310 - IRQ register definitions
+ * EXYNOS4 - IRQ register definitions
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
diff --git a/arch/arm/mach-s5pv310/irq-combiner.c b/arch/arm/mach-exynos4/irq-combiner.c
similarity index 96%
rename from arch/arm/mach-s5pv310/irq-combiner.c
rename to arch/arm/mach-exynos4/irq-combiner.c
index 1ea4a9e..31618d9 100644
--- a/arch/arm/mach-s5pv310/irq-combiner.c
+++ b/arch/arm/mach-exynos4/irq-combiner.c
@@ -1,6 +1,6 @@
-/* linux/arch/arm/mach-s5pv310/irq-combiner.c
+/* linux/arch/arm/mach-exynos4/irq-combiner.c
*
- * Copyright (c) 2010 Samsung Electronics Co., Ltd.
+ * Copyright (c) 2010-2011 Samsung Electronics Co., Ltd.
* http://www.samsung.com
*
* Based on arch/arm/common/gic.c
diff --git a/arch/arm/mach-s5pv310/irq-eint.c b/arch/arm/mach-exynos4/irq-eint.c
similarity index 72%
rename from arch/arm/mach-s5pv310/irq-eint.c
rename to arch/arm/mach-exynos4/irq-eint.c
index 477bd9e..4f7ad4a 100644
--- a/arch/arm/mach-s5pv310/irq-eint.c
+++ b/arch/arm/mach-exynos4/irq-eint.c
@@ -1,9 +1,9 @@
-/* linux/arch/arm/mach-s5pv310/irq-eint.c
+/* linux/arch/arm/mach-exynos4/irq-eint.c
*
- * Copyright (c) 2010 Samsung Electronics Co., Ltd.
+ * Copyright (c) 2010-2011 Samsung Electronics Co., Ltd.
* http://www.samsung.com
*
- * S5PV310 - IRQ EINT support
+ * EXYNOS4 - IRQ EINT support
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
@@ -27,7 +27,7 @@ static DEFINE_SPINLOCK(eint_lock);
static unsigned int eint0_15_data[16];
-static unsigned int s5pv310_get_irq_nr(unsigned int number)
+static unsigned int exynos4_get_irq_nr(unsigned int number)
{
u32 ret = 0;
@@ -48,7 +48,7 @@ static unsigned int s5pv310_get_irq_nr(unsigned int number)
return ret;
}
-static inline void s5pv310_irq_eint_mask(struct irq_data *data)
+static inline void exynos4_irq_eint_mask(struct irq_data *data)
{
u32 mask;
@@ -59,7 +59,7 @@ static inline void s5pv310_irq_eint_mask(struct irq_data *data)
spin_unlock(&eint_lock);
}
-static void s5pv310_irq_eint_unmask(struct irq_data *data)
+static void exynos4_irq_eint_unmask(struct irq_data *data)
{
u32 mask;
@@ -70,19 +70,19 @@ static void s5pv310_irq_eint_unmask(struct irq_data *data)
spin_unlock(&eint_lock);
}
-static inline void s5pv310_irq_eint_ack(struct irq_data *data)
+static inline void exynos4_irq_eint_ack(struct irq_data *data)
{
__raw_writel(eint_irq_to_bit(data->irq),
S5P_EINT_PEND(EINT_REG_NR(data->irq)));
}
-static void s5pv310_irq_eint_maskack(struct irq_data *data)
+static void exynos4_irq_eint_maskack(struct irq_data *data)
{
- s5pv310_irq_eint_mask(data);
- s5pv310_irq_eint_ack(data);
+ exynos4_irq_eint_mask(data);
+ exynos4_irq_eint_ack(data);
}
-static int s5pv310_irq_eint_set_type(struct irq_data *data, unsigned int type)
+static int exynos4_irq_eint_set_type(struct irq_data *data, unsigned int type)
{
int offs = EINT_OFFSET(data->irq);
int shift;
@@ -145,19 +145,19 @@ static int s5pv310_irq_eint_set_type(struct irq_data *data, unsigned int type)
return 0;
}
-static struct irq_chip s5pv310_irq_eint = {
- .name = "s5pv310-eint",
- .irq_mask = s5pv310_irq_eint_mask,
- .irq_unmask = s5pv310_irq_eint_unmask,
- .irq_mask_ack = s5pv310_irq_eint_maskack,
- .irq_ack = s5pv310_irq_eint_ack,
- .irq_set_type = s5pv310_irq_eint_set_type,
+static struct irq_chip exynos4_irq_eint = {
+ .name = "exynos4-eint",
+ .irq_mask = exynos4_irq_eint_mask,
+ .irq_unmask = exynos4_irq_eint_unmask,
+ .irq_mask_ack = exynos4_irq_eint_maskack,
+ .irq_ack = exynos4_irq_eint_ack,
+ .irq_set_type = exynos4_irq_eint_set_type,
#ifdef CONFIG_PM
.irq_set_wake = s3c_irqext_wake,
#endif
};
-/* s5pv310_irq_demux_eint
+/* exynos4_irq_demux_eint
*
* This function demuxes the IRQ from from EINTs 16 to 31.
* It is designed to be inlined into the specific handler
@@ -165,7 +165,7 @@ static struct irq_chip s5pv310_irq_eint = {
*
* Each EINT pend/mask registers handle eight of them.
*/
-static inline void s5pv310_irq_demux_eint(unsigned int start)
+static inline void exynos4_irq_demux_eint(unsigned int start)
{
unsigned int irq;
@@ -182,13 +182,13 @@ static inline void s5pv310_irq_demux_eint(unsigned int start)
}
}
-static void s5pv310_irq_demux_eint16_31(unsigned int irq, struct irq_desc *desc)
+static void exynos4_irq_demux_eint16_31(unsigned int irq, struct irq_desc *desc)
{
- s5pv310_irq_demux_eint(IRQ_EINT(16));
- s5pv310_irq_demux_eint(IRQ_EINT(24));
+ exynos4_irq_demux_eint(IRQ_EINT(16));
+ exynos4_irq_demux_eint(IRQ_EINT(24));
}
-static void s5pv310_irq_eint0_15(unsigned int irq, struct irq_desc *desc)
+static void exynos4_irq_eint0_15(unsigned int irq, struct irq_desc *desc)
{
u32 *irq_data = get_irq_data(irq);
struct irq_chip *chip = get_irq_chip(irq);
@@ -203,27 +203,27 @@ static void s5pv310_irq_eint0_15(unsigned int irq, struct irq_desc *desc)
chip->irq_unmask(&desc->irq_data);
}
-int __init s5pv310_init_irq_eint(void)
+int __init exynos4_init_irq_eint(void)
{
int irq;
for (irq = 0 ; irq <= 31 ; irq++) {
- set_irq_chip(IRQ_EINT(irq), &s5pv310_irq_eint);
+ set_irq_chip(IRQ_EINT(irq), &exynos4_irq_eint);
set_irq_handler(IRQ_EINT(irq), handle_level_irq);
set_irq_flags(IRQ_EINT(irq), IRQF_VALID);
}
- set_irq_chained_handler(IRQ_EINT16_31, s5pv310_irq_demux_eint16_31);
+ set_irq_chained_handler(IRQ_EINT16_31, exynos4_irq_demux_eint16_31);
for (irq = 0 ; irq <= 15 ; irq++) {
eint0_15_data[irq] = IRQ_EINT(irq);
- set_irq_data(s5pv310_get_irq_nr(irq), &eint0_15_data[irq]);
- set_irq_chained_handler(s5pv310_get_irq_nr(irq),
- s5pv310_irq_eint0_15);
+ set_irq_data(exynos4_get_irq_nr(irq), &eint0_15_data[irq]);
+ set_irq_chained_handler(exynos4_get_irq_nr(irq),
+ exynos4_irq_eint0_15);
}
return 0;
}
-arch_initcall(s5pv310_init_irq_eint);
+arch_initcall(exynos4_init_irq_eint);
--
1.7.1
^ permalink raw reply related [flat|nested] 20+ messages in thread* [PATCH 04/11] ARM: EXYNOS4: Update Timer part
2011-02-14 8:22 [PATCH 0/11] ARM: EXYNOS4: Change ARCH name, ARCH_EXYNOS4 from ARCH_S5PV310 Kukjin Kim
` (2 preceding siblings ...)
2011-02-14 8:22 ` [PATCH 03/11] ARM: EXYNOS4: Update IRQ part Kukjin Kim
@ 2011-02-14 8:23 ` Kukjin Kim
2011-02-14 8:23 ` [PATCH 05/11] ARM: EXYNOS4: Update device support Kukjin Kim
` (8 subsequent siblings)
12 siblings, 0 replies; 20+ messages in thread
From: Kukjin Kim @ 2011-02-14 8:23 UTC (permalink / raw)
To: linux-arm-kernel
This patch updates Timer part of EXYNOS4 according to the change of
ARCH name, EXYNOS4.
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
---
.../include/mach/pwm-clock.h | 8 +-
.../{mach-s5pv310 => mach-exynos4}/localtimer.c | 2 +-
arch/arm/{mach-s5pv310 => mach-exynos4}/time.c | 64 ++++++++++----------
3 files changed, 37 insertions(+), 37 deletions(-)
rename arch/arm/{mach-s5pv310 => mach-exynos4}/include/mach/pwm-clock.h (90%)
rename arch/arm/{mach-s5pv310 => mach-exynos4}/localtimer.c (92%)
rename arch/arm/{mach-s5pv310 => mach-exynos4}/time.c (78%)
diff --git a/arch/arm/mach-s5pv310/include/mach/pwm-clock.h b/arch/arm/mach-exynos4/include/mach/pwm-clock.h
similarity index 90%
rename from arch/arm/mach-s5pv310/include/mach/pwm-clock.h
rename to arch/arm/mach-exynos4/include/mach/pwm-clock.h
index 7e6da27..8e12090 100644
--- a/arch/arm/mach-s5pv310/include/mach/pwm-clock.h
+++ b/arch/arm/mach-exynos4/include/mach/pwm-clock.h
@@ -1,7 +1,7 @@
-/* linux/arch/arm/mach-s5pv310/include/mach/pwm-clock.h
+/* linux/arch/arm/mach-exynos4/include/mach/pwm-clock.h
*
- * Copyright (c) 2010 Samsung Electronics Co., Ltd.
- * http://www.samsung.com/
+ * Copyright (c) 2010-2011 Samsung Electronics Co., Ltd.
+ * http://www.samsung.com
*
* Copyright 2008 Openmoko, Inc.
* Copyright 2008 Simtec Electronics
@@ -10,7 +10,7 @@
*
* Based on arch/arm/mach-s3c64xx/include/mach/pwm-clock.h
*
- * S5PV310 - pwm clock and timer support
+ * EXYNOS4 - pwm clock and timer support
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
diff --git a/arch/arm/mach-s5pv310/localtimer.c b/arch/arm/mach-exynos4/localtimer.c
similarity index 92%
rename from arch/arm/mach-s5pv310/localtimer.c
rename to arch/arm/mach-exynos4/localtimer.c
index 2784036..2a2993a 100644
--- a/arch/arm/mach-s5pv310/localtimer.c
+++ b/arch/arm/mach-exynos4/localtimer.c
@@ -1,4 +1,4 @@
-/* linux/arch/arm/mach-s5pv310/localtimer.c
+/* linux/arch/arm/mach-exynos4/localtimer.c
*
* Cloned from linux/arch/arm/mach-realview/localtimer.c
*
diff --git a/arch/arm/mach-s5pv310/time.c b/arch/arm/mach-exynos4/time.c
similarity index 78%
rename from arch/arm/mach-s5pv310/time.c
rename to arch/arm/mach-exynos4/time.c
index b262d46..e30ac70 100644
--- a/arch/arm/mach-s5pv310/time.c
+++ b/arch/arm/mach-exynos4/time.c
@@ -1,9 +1,9 @@
-/* linux/arch/arm/mach-s5pv310/time.c
+/* linux/arch/arm/mach-exynos4/time.c
*
- * Copyright (c) 2010 Samsung Electronics Co., Ltd.
+ * Copyright (c) 2010-2011 Samsung Electronics Co., Ltd.
* http://www.samsung.com
*
- * S5PV310 (and compatible) HRT support
+ * EXYNOS4 (and compatible) HRT support
* PWM 2/4 is used for this feature
*
* This program is free software; you can redistribute it and/or modify
@@ -33,7 +33,7 @@ static struct clk *tdiv2;
static struct clk *tdiv4;
static struct clk *timerclk;
-static void s5pv310_pwm_stop(unsigned int pwm_id)
+static void exynos4_pwm_stop(unsigned int pwm_id)
{
unsigned long tcon;
@@ -52,7 +52,7 @@ static void s5pv310_pwm_stop(unsigned int pwm_id)
__raw_writel(tcon, S3C2410_TCON);
}
-static void s5pv310_pwm_init(unsigned int pwm_id, unsigned long tcnt)
+static void exynos4_pwm_init(unsigned int pwm_id, unsigned long tcnt)
{
unsigned long tcon;
@@ -86,7 +86,7 @@ static void s5pv310_pwm_init(unsigned int pwm_id, unsigned long tcnt)
}
}
-static inline void s5pv310_pwm_start(unsigned int pwm_id, bool periodic)
+static inline void exynos4_pwm_start(unsigned int pwm_id, bool periodic)
{
unsigned long tcon;
@@ -117,23 +117,23 @@ static inline void s5pv310_pwm_start(unsigned int pwm_id, bool periodic)
__raw_writel(tcon, S3C2410_TCON);
}
-static int s5pv310_pwm_set_next_event(unsigned long cycles,
+static int exynos4_pwm_set_next_event(unsigned long cycles,
struct clock_event_device *evt)
{
- s5pv310_pwm_init(2, cycles);
- s5pv310_pwm_start(2, 0);
+ exynos4_pwm_init(2, cycles);
+ exynos4_pwm_start(2, 0);
return 0;
}
-static void s5pv310_pwm_set_mode(enum clock_event_mode mode,
+static void exynos4_pwm_set_mode(enum clock_event_mode mode,
struct clock_event_device *evt)
{
- s5pv310_pwm_stop(2);
+ exynos4_pwm_stop(2);
switch (mode) {
case CLOCK_EVT_MODE_PERIODIC:
- s5pv310_pwm_init(2, clock_count_per_tick);
- s5pv310_pwm_start(2, 1);
+ exynos4_pwm_init(2, clock_count_per_tick);
+ exynos4_pwm_start(2, 1);
break;
case CLOCK_EVT_MODE_ONESHOT:
break;
@@ -149,11 +149,11 @@ static struct clock_event_device pwm_event_device = {
.features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT,
.rating = 200,
.shift = 32,
- .set_next_event = s5pv310_pwm_set_next_event,
- .set_mode = s5pv310_pwm_set_mode,
+ .set_next_event = exynos4_pwm_set_next_event,
+ .set_mode = exynos4_pwm_set_mode,
};
-irqreturn_t s5pv310_clock_event_isr(int irq, void *dev_id)
+irqreturn_t exynos4_clock_event_isr(int irq, void *dev_id)
{
struct clock_event_device *evt = &pwm_event_device;
@@ -162,13 +162,13 @@ irqreturn_t s5pv310_clock_event_isr(int irq, void *dev_id)
return IRQ_HANDLED;
}
-static struct irqaction s5pv310_clock_event_irq = {
+static struct irqaction exynos4_clock_event_irq = {
.name = "pwm_timer2_irq",
.flags = IRQF_DISABLED | IRQF_TIMER | IRQF_IRQPOLL,
- .handler = s5pv310_clock_event_isr,
+ .handler = exynos4_clock_event_isr,
};
-static void __init s5pv310_clockevent_init(void)
+static void __init exynos4_clockevent_init(void)
{
unsigned long pclk;
unsigned long clock_rate;
@@ -198,10 +198,10 @@ static void __init s5pv310_clockevent_init(void)
pwm_event_device.cpumask = cpumask_of(0);
clockevents_register_device(&pwm_event_device);
- setup_irq(IRQ_TIMER2, &s5pv310_clock_event_irq);
+ setup_irq(IRQ_TIMER2, &exynos4_clock_event_irq);
}
-static cycle_t s5pv310_pwm4_read(struct clocksource *cs)
+static cycle_t exynos4_pwm4_read(struct clocksource *cs)
{
return (cycle_t) ~__raw_readl(S3C_TIMERREG(0x40));
}
@@ -209,12 +209,12 @@ static cycle_t s5pv310_pwm4_read(struct clocksource *cs)
struct clocksource pwm_clocksource = {
.name = "pwm_timer4",
.rating = 250,
- .read = s5pv310_pwm4_read,
+ .read = exynos4_pwm4_read,
.mask = CLOCKSOURCE_MASK(32),
.flags = CLOCK_SOURCE_IS_CONTINUOUS ,
};
-static void __init s5pv310_clocksource_init(void)
+static void __init exynos4_clocksource_init(void)
{
unsigned long pclk;
unsigned long clock_rate;
@@ -226,14 +226,14 @@ static void __init s5pv310_clocksource_init(void)
clock_rate = clk_get_rate(tin4);
- s5pv310_pwm_init(4, ~0);
- s5pv310_pwm_start(4, 1);
+ exynos4_pwm_init(4, ~0);
+ exynos4_pwm_start(4, 1);
if (clocksource_register_hz(&pwm_clocksource, clock_rate))
panic("%s: can't register clocksource\n", pwm_clocksource.name);
}
-static void __init s5pv310_timer_resources(void)
+static void __init exynos4_timer_resources(void)
{
struct platform_device tmpdev;
@@ -267,17 +267,17 @@ static void __init s5pv310_timer_resources(void)
clk_enable(tin4);
}
-static void __init s5pv310_timer_init(void)
+static void __init exynos4_timer_init(void)
{
#ifdef CONFIG_LOCAL_TIMERS
twd_base = S5P_VA_TWD;
#endif
- s5pv310_timer_resources();
- s5pv310_clockevent_init();
- s5pv310_clocksource_init();
+ exynos4_timer_resources();
+ exynos4_clockevent_init();
+ exynos4_clocksource_init();
}
-struct sys_timer s5pv310_timer = {
- .init = s5pv310_timer_init,
+struct sys_timer exynos4_timer = {
+ .init = exynos4_timer_init,
};
--
1.7.1
^ permalink raw reply related [flat|nested] 20+ messages in thread* [PATCH 05/11] ARM: EXYNOS4: Update device support
2011-02-14 8:22 [PATCH 0/11] ARM: EXYNOS4: Change ARCH name, ARCH_EXYNOS4 from ARCH_S5PV310 Kukjin Kim
` (3 preceding siblings ...)
2011-02-14 8:23 ` [PATCH 04/11] ARM: EXYNOS4: Update Timer part Kukjin Kim
@ 2011-02-14 8:23 ` Kukjin Kim
2011-02-14 8:23 ` [PATCH 06/11] ARM: EXYNOS4: Moved board support files Kukjin Kim
` (7 subsequent siblings)
12 siblings, 0 replies; 20+ messages in thread
From: Kukjin Kim @ 2011-02-14 8:23 UTC (permalink / raw)
To: linux-arm-kernel
This patch updates device support of EXYNOS4 according to the change of
ARCH name, EXYNOS4.
Cc: Ben Dooks <ben-linux@fluff.org>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
---
.../arm/{mach-s5pv310 => mach-exynos4}/dev-audio.c | 143 ++++++++++----------
arch/arm/{mach-s5pv310 => mach-exynos4}/dev-pd.c | 40 +++---
.../{mach-s5pv310 => mach-exynos4}/dev-sysmmu.c | 78 ++++++-----
.../{mach-s5pv310 => mach-exynos4}/setup-i2c1.c | 4 +-
.../{mach-s5pv310 => mach-exynos4}/setup-i2c2.c | 4 +-
.../{mach-s5pv310 => mach-exynos4}/setup-i2c3.c | 4 +-
.../{mach-s5pv310 => mach-exynos4}/setup-i2c4.c | 4 +-
.../{mach-s5pv310 => mach-exynos4}/setup-i2c5.c | 4 +-
.../{mach-s5pv310 => mach-exynos4}/setup-i2c6.c | 4 +-
.../{mach-s5pv310 => mach-exynos4}/setup-i2c7.c | 4 +-
.../setup-sdhci-gpio.c | 52 ++++----
.../{mach-s5pv310 => mach-exynos4}/setup-sdhci.c | 12 +-
arch/arm/plat-samsung/include/plat/devs.h | 23 ++--
arch/arm/plat-samsung/include/plat/pd.h | 4 +-
arch/arm/plat-samsung/include/plat/sdhci.h | 63 +++++----
15 files changed, 227 insertions(+), 216 deletions(-)
rename arch/arm/{mach-s5pv310 => mach-exynos4}/dev-audio.c (57%)
rename arch/arm/{mach-s5pv310 => mach-exynos4}/dev-pd.c (74%)
rename arch/arm/{mach-s5pv310 => mach-exynos4}/dev-sysmmu.c (62%)
rename arch/arm/{mach-s5pv310 => mach-exynos4}/setup-i2c1.c (85%)
rename arch/arm/{mach-s5pv310 => mach-exynos4}/setup-i2c2.c (85%)
rename arch/arm/{mach-s5pv310 => mach-exynos4}/setup-i2c3.c (85%)
rename arch/arm/{mach-s5pv310 => mach-exynos4}/setup-i2c4.c (85%)
rename arch/arm/{mach-s5pv310 => mach-exynos4}/setup-i2c5.c (85%)
rename arch/arm/{mach-s5pv310 => mach-exynos4}/setup-i2c6.c (85%)
rename arch/arm/{mach-s5pv310 => mach-exynos4}/setup-i2c7.c (85%)
rename arch/arm/{mach-s5pv310 => mach-exynos4}/setup-sdhci-gpio.c (69%)
rename arch/arm/{mach-s5pv310 => mach-exynos4}/setup-sdhci.c (83%)
diff --git a/arch/arm/mach-s5pv310/dev-audio.c b/arch/arm/mach-exynos4/dev-audio.c
similarity index 57%
rename from arch/arm/mach-s5pv310/dev-audio.c
rename to arch/arm/mach-exynos4/dev-audio.c
index a196424..1eed5f9 100644
--- a/arch/arm/mach-s5pv310/dev-audio.c
+++ b/arch/arm/mach-exynos4/dev-audio.c
@@ -1,4 +1,7 @@
-/* linux/arch/arm/mach-s5pv310/dev-audio.c
+/* linux/arch/arm/mach-exynos4/dev-audio.c
+ *
+ * Copyright (c) 2011 Samsung Electronics Co., Ltd.
+ * http://www.samsung.com
*
* Copyright (c) 2010 Samsung Electronics Co. Ltd
* Jaswinder Singh <jassi.brar@samsung.com>
@@ -24,18 +27,18 @@ static const char *rclksrc[] = {
[1] = "i2sclk",
};
-static int s5pv310_cfg_i2s(struct platform_device *pdev)
+static int exynos4_cfg_i2s(struct platform_device *pdev)
{
/* configure GPIO for i2s port */
switch (pdev->id) {
case 0:
- s3c_gpio_cfgpin_range(S5PV310_GPZ(0), 7, S3C_GPIO_SFN(2));
+ s3c_gpio_cfgpin_range(EXYNOS4_GPZ(0), 7, S3C_GPIO_SFN(2));
break;
case 1:
- s3c_gpio_cfgpin_range(S5PV310_GPC0(0), 5, S3C_GPIO_SFN(2));
+ s3c_gpio_cfgpin_range(EXYNOS4_GPC0(0), 5, S3C_GPIO_SFN(2));
break;
case 2:
- s3c_gpio_cfgpin_range(S5PV310_GPC1(0), 5, S3C_GPIO_SFN(4));
+ s3c_gpio_cfgpin_range(EXYNOS4_GPC1(0), 5, S3C_GPIO_SFN(4));
break;
default:
printk(KERN_ERR "Invalid Device %d\n", pdev->id);
@@ -46,7 +49,7 @@ static int s5pv310_cfg_i2s(struct platform_device *pdev)
}
static struct s3c_audio_pdata i2sv5_pdata = {
- .cfg_gpio = s5pv310_cfg_i2s,
+ .cfg_gpio = exynos4_cfg_i2s,
.type = {
.i2s = {
.quirks = QUIRK_PRI_6CHAN | QUIRK_SEC_DAI
@@ -56,10 +59,10 @@ static struct s3c_audio_pdata i2sv5_pdata = {
},
};
-static struct resource s5pv310_i2s0_resource[] = {
+static struct resource exynos4_i2s0_resource[] = {
[0] = {
- .start = S5PV310_PA_I2S0,
- .end = S5PV310_PA_I2S0 + 0x100 - 1,
+ .start = EXYNOS4_PA_I2S0,
+ .end = EXYNOS4_PA_I2S0 + 0x100 - 1,
.flags = IORESOURCE_MEM,
},
[1] = {
@@ -79,11 +82,11 @@ static struct resource s5pv310_i2s0_resource[] = {
},
};
-struct platform_device s5pv310_device_i2s0 = {
+struct platform_device exynos4_device_i2s0 = {
.name = "samsung-i2s",
.id = 0,
- .num_resources = ARRAY_SIZE(s5pv310_i2s0_resource),
- .resource = s5pv310_i2s0_resource,
+ .num_resources = ARRAY_SIZE(exynos4_i2s0_resource),
+ .resource = exynos4_i2s0_resource,
.dev = {
.platform_data = &i2sv5_pdata,
},
@@ -95,7 +98,7 @@ static const char *rclksrc_v3[] = {
};
static struct s3c_audio_pdata i2sv3_pdata = {
- .cfg_gpio = s5pv310_cfg_i2s,
+ .cfg_gpio = exynos4_cfg_i2s,
.type = {
.i2s = {
.quirks = QUIRK_NO_MUXPSR,
@@ -104,10 +107,10 @@ static struct s3c_audio_pdata i2sv3_pdata = {
},
};
-static struct resource s5pv310_i2s1_resource[] = {
+static struct resource exynos4_i2s1_resource[] = {
[0] = {
- .start = S5PV310_PA_I2S1,
- .end = S5PV310_PA_I2S1 + 0x100 - 1,
+ .start = EXYNOS4_PA_I2S1,
+ .end = EXYNOS4_PA_I2S1 + 0x100 - 1,
.flags = IORESOURCE_MEM,
},
[1] = {
@@ -122,20 +125,20 @@ static struct resource s5pv310_i2s1_resource[] = {
},
};
-struct platform_device s5pv310_device_i2s1 = {
+struct platform_device exynos4_device_i2s1 = {
.name = "samsung-i2s",
.id = 1,
- .num_resources = ARRAY_SIZE(s5pv310_i2s1_resource),
- .resource = s5pv310_i2s1_resource,
+ .num_resources = ARRAY_SIZE(exynos4_i2s1_resource),
+ .resource = exynos4_i2s1_resource,
.dev = {
.platform_data = &i2sv3_pdata,
},
};
-static struct resource s5pv310_i2s2_resource[] = {
+static struct resource exynos4_i2s2_resource[] = {
[0] = {
- .start = S5PV310_PA_I2S2,
- .end = S5PV310_PA_I2S2 + 0x100 - 1,
+ .start = EXYNOS4_PA_I2S2,
+ .end = EXYNOS4_PA_I2S2 + 0x100 - 1,
.flags = IORESOURCE_MEM,
},
[1] = {
@@ -150,11 +153,11 @@ static struct resource s5pv310_i2s2_resource[] = {
},
};
-struct platform_device s5pv310_device_i2s2 = {
+struct platform_device exynos4_device_i2s2 = {
.name = "samsung-i2s",
.id = 2,
- .num_resources = ARRAY_SIZE(s5pv310_i2s2_resource),
- .resource = s5pv310_i2s2_resource,
+ .num_resources = ARRAY_SIZE(exynos4_i2s2_resource),
+ .resource = exynos4_i2s2_resource,
.dev = {
.platform_data = &i2sv3_pdata,
},
@@ -162,17 +165,17 @@ struct platform_device s5pv310_device_i2s2 = {
/* PCM Controller platform_devices */
-static int s5pv310_pcm_cfg_gpio(struct platform_device *pdev)
+static int exynos4_pcm_cfg_gpio(struct platform_device *pdev)
{
switch (pdev->id) {
case 0:
- s3c_gpio_cfgpin_range(S5PV310_GPZ(0), 5, S3C_GPIO_SFN(3));
+ s3c_gpio_cfgpin_range(EXYNOS4_GPZ(0), 5, S3C_GPIO_SFN(3));
break;
case 1:
- s3c_gpio_cfgpin_range(S5PV310_GPC0(0), 5, S3C_GPIO_SFN(3));
+ s3c_gpio_cfgpin_range(EXYNOS4_GPC0(0), 5, S3C_GPIO_SFN(3));
break;
case 2:
- s3c_gpio_cfgpin_range(S5PV310_GPC1(0), 5, S3C_GPIO_SFN(3));
+ s3c_gpio_cfgpin_range(EXYNOS4_GPC1(0), 5, S3C_GPIO_SFN(3));
break;
default:
printk(KERN_DEBUG "Invalid PCM Controller number!");
@@ -183,13 +186,13 @@ static int s5pv310_pcm_cfg_gpio(struct platform_device *pdev)
}
static struct s3c_audio_pdata s3c_pcm_pdata = {
- .cfg_gpio = s5pv310_pcm_cfg_gpio,
+ .cfg_gpio = exynos4_pcm_cfg_gpio,
};
-static struct resource s5pv310_pcm0_resource[] = {
+static struct resource exynos4_pcm0_resource[] = {
[0] = {
- .start = S5PV310_PA_PCM0,
- .end = S5PV310_PA_PCM0 + 0x100 - 1,
+ .start = EXYNOS4_PA_PCM0,
+ .end = EXYNOS4_PA_PCM0 + 0x100 - 1,
.flags = IORESOURCE_MEM,
},
[1] = {
@@ -204,20 +207,20 @@ static struct resource s5pv310_pcm0_resource[] = {
},
};
-struct platform_device s5pv310_device_pcm0 = {
+struct platform_device exynos4_device_pcm0 = {
.name = "samsung-pcm",
.id = 0,
- .num_resources = ARRAY_SIZE(s5pv310_pcm0_resource),
- .resource = s5pv310_pcm0_resource,
+ .num_resources = ARRAY_SIZE(exynos4_pcm0_resource),
+ .resource = exynos4_pcm0_resource,
.dev = {
.platform_data = &s3c_pcm_pdata,
},
};
-static struct resource s5pv310_pcm1_resource[] = {
+static struct resource exynos4_pcm1_resource[] = {
[0] = {
- .start = S5PV310_PA_PCM1,
- .end = S5PV310_PA_PCM1 + 0x100 - 1,
+ .start = EXYNOS4_PA_PCM1,
+ .end = EXYNOS4_PA_PCM1 + 0x100 - 1,
.flags = IORESOURCE_MEM,
},
[1] = {
@@ -232,20 +235,20 @@ static struct resource s5pv310_pcm1_resource[] = {
},
};
-struct platform_device s5pv310_device_pcm1 = {
+struct platform_device exynos4_device_pcm1 = {
.name = "samsung-pcm",
.id = 1,
- .num_resources = ARRAY_SIZE(s5pv310_pcm1_resource),
- .resource = s5pv310_pcm1_resource,
+ .num_resources = ARRAY_SIZE(exynos4_pcm1_resource),
+ .resource = exynos4_pcm1_resource,
.dev = {
.platform_data = &s3c_pcm_pdata,
},
};
-static struct resource s5pv310_pcm2_resource[] = {
+static struct resource exynos4_pcm2_resource[] = {
[0] = {
- .start = S5PV310_PA_PCM2,
- .end = S5PV310_PA_PCM2 + 0x100 - 1,
+ .start = EXYNOS4_PA_PCM2,
+ .end = EXYNOS4_PA_PCM2 + 0x100 - 1,
.flags = IORESOURCE_MEM,
},
[1] = {
@@ -260,11 +263,11 @@ static struct resource s5pv310_pcm2_resource[] = {
},
};
-struct platform_device s5pv310_device_pcm2 = {
+struct platform_device exynos4_device_pcm2 = {
.name = "samsung-pcm",
.id = 2,
- .num_resources = ARRAY_SIZE(s5pv310_pcm2_resource),
- .resource = s5pv310_pcm2_resource,
+ .num_resources = ARRAY_SIZE(exynos4_pcm2_resource),
+ .resource = exynos4_pcm2_resource,
.dev = {
.platform_data = &s3c_pcm_pdata,
},
@@ -272,15 +275,15 @@ struct platform_device s5pv310_device_pcm2 = {
/* AC97 Controller platform devices */
-static int s5pv310_ac97_cfg_gpio(struct platform_device *pdev)
+static int exynos4_ac97_cfg_gpio(struct platform_device *pdev)
{
- return s3c_gpio_cfgpin_range(S5PV310_GPC0(0), 5, S3C_GPIO_SFN(4));
+ return s3c_gpio_cfgpin_range(EXYNOS4_GPC0(0), 5, S3C_GPIO_SFN(4));
}
-static struct resource s5pv310_ac97_resource[] = {
+static struct resource exynos4_ac97_resource[] = {
[0] = {
- .start = S5PV310_PA_AC97,
- .end = S5PV310_PA_AC97 + 0x100 - 1,
+ .start = EXYNOS4_PA_AC97,
+ .end = EXYNOS4_PA_AC97 + 0x100 - 1,
.flags = IORESOURCE_MEM,
},
[1] = {
@@ -306,36 +309,36 @@ static struct resource s5pv310_ac97_resource[] = {
};
static struct s3c_audio_pdata s3c_ac97_pdata = {
- .cfg_gpio = s5pv310_ac97_cfg_gpio,
+ .cfg_gpio = exynos4_ac97_cfg_gpio,
};
-static u64 s5pv310_ac97_dmamask = DMA_BIT_MASK(32);
+static u64 exynos4_ac97_dmamask = DMA_BIT_MASK(32);
-struct platform_device s5pv310_device_ac97 = {
+struct platform_device exynos4_device_ac97 = {
.name = "samsung-ac97",
.id = -1,
- .num_resources = ARRAY_SIZE(s5pv310_ac97_resource),
- .resource = s5pv310_ac97_resource,
+ .num_resources = ARRAY_SIZE(exynos4_ac97_resource),
+ .resource = exynos4_ac97_resource,
.dev = {
.platform_data = &s3c_ac97_pdata,
- .dma_mask = &s5pv310_ac97_dmamask,
+ .dma_mask = &exynos4_ac97_dmamask,
.coherent_dma_mask = DMA_BIT_MASK(32),
},
};
/* S/PDIF Controller platform_device */
-static int s5pv310_spdif_cfg_gpio(struct platform_device *pdev)
+static int exynos4_spdif_cfg_gpio(struct platform_device *pdev)
{
- s3c_gpio_cfgpin_range(S5PV310_GPC1(0), 2, S3C_GPIO_SFN(3));
+ s3c_gpio_cfgpin_range(EXYNOS4_GPC1(0), 2, S3C_GPIO_SFN(3));
return 0;
}
-static struct resource s5pv310_spdif_resource[] = {
+static struct resource exynos4_spdif_resource[] = {
[0] = {
- .start = S5PV310_PA_SPDIF,
- .end = S5PV310_PA_SPDIF + 0x100 - 1,
+ .start = EXYNOS4_PA_SPDIF,
+ .end = EXYNOS4_PA_SPDIF + 0x100 - 1,
.flags = IORESOURCE_MEM,
},
[1] = {
@@ -346,19 +349,19 @@ static struct resource s5pv310_spdif_resource[] = {
};
static struct s3c_audio_pdata samsung_spdif_pdata = {
- .cfg_gpio = s5pv310_spdif_cfg_gpio,
+ .cfg_gpio = exynos4_spdif_cfg_gpio,
};
-static u64 s5pv310_spdif_dmamask = DMA_BIT_MASK(32);
+static u64 exynos4_spdif_dmamask = DMA_BIT_MASK(32);
-struct platform_device s5pv310_device_spdif = {
+struct platform_device exynos4_device_spdif = {
.name = "samsung-spdif",
.id = -1,
- .num_resources = ARRAY_SIZE(s5pv310_spdif_resource),
- .resource = s5pv310_spdif_resource,
+ .num_resources = ARRAY_SIZE(exynos4_spdif_resource),
+ .resource = exynos4_spdif_resource,
.dev = {
.platform_data = &samsung_spdif_pdata,
- .dma_mask = &s5pv310_spdif_dmamask,
+ .dma_mask = &exynos4_spdif_dmamask,
.coherent_dma_mask = DMA_BIT_MASK(32),
},
};
diff --git a/arch/arm/mach-s5pv310/dev-pd.c b/arch/arm/mach-exynos4/dev-pd.c
similarity index 74%
rename from arch/arm/mach-s5pv310/dev-pd.c
rename to arch/arm/mach-exynos4/dev-pd.c
index 58a50c2..3273f25 100644
--- a/arch/arm/mach-s5pv310/dev-pd.c
+++ b/arch/arm/mach-exynos4/dev-pd.c
@@ -1,9 +1,9 @@
-/* linux/arch/arm/mach-s5pv310/dev-pd.c
+/* linux/arch/arm/mach-exynos4/dev-pd.c
*
- * Copyright (c) 2010 Samsung Electronics Co., Ltd.
+ * Copyright (c) 2010-2011 Samsung Electronics Co., Ltd.
* http://www.samsung.com
*
- * S5PV310 - Power Domain support
+ * EXYNOS4 - Power Domain support
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
@@ -19,7 +19,7 @@
#include <plat/pd.h>
-static int s5pv310_pd_enable(struct device *dev)
+static int exynos4_pd_enable(struct device *dev)
{
struct samsung_pd_info *pdata = dev->platform_data;
u32 timeout;
@@ -42,7 +42,7 @@ static int s5pv310_pd_enable(struct device *dev)
return 0;
}
-static int s5pv310_pd_disable(struct device *dev)
+static int exynos4_pd_disable(struct device *dev)
{
struct samsung_pd_info *pdata = dev->platform_data;
u32 timeout;
@@ -64,14 +64,14 @@ static int s5pv310_pd_disable(struct device *dev)
return 0;
}
-struct platform_device s5pv310_device_pd[] = {
+struct platform_device exynos4_device_pd[] = {
{
.name = "samsung-pd",
.id = 0,
.dev = {
.platform_data = &(struct samsung_pd_info) {
- .enable = s5pv310_pd_enable,
- .disable = s5pv310_pd_disable,
+ .enable = exynos4_pd_enable,
+ .disable = exynos4_pd_disable,
.base = S5P_PMU_MFC_CONF,
},
},
@@ -80,8 +80,8 @@ struct platform_device s5pv310_device_pd[] = {
.id = 1,
.dev = {
.platform_data = &(struct samsung_pd_info) {
- .enable = s5pv310_pd_enable,
- .disable = s5pv310_pd_disable,
+ .enable = exynos4_pd_enable,
+ .disable = exynos4_pd_disable,
.base = S5P_PMU_G3D_CONF,
},
},
@@ -90,8 +90,8 @@ struct platform_device s5pv310_device_pd[] = {
.id = 2,
.dev = {
.platform_data = &(struct samsung_pd_info) {
- .enable = s5pv310_pd_enable,
- .disable = s5pv310_pd_disable,
+ .enable = exynos4_pd_enable,
+ .disable = exynos4_pd_disable,
.base = S5P_PMU_LCD0_CONF,
},
},
@@ -100,8 +100,8 @@ struct platform_device s5pv310_device_pd[] = {
.id = 3,
.dev = {
.platform_data = &(struct samsung_pd_info) {
- .enable = s5pv310_pd_enable,
- .disable = s5pv310_pd_disable,
+ .enable = exynos4_pd_enable,
+ .disable = exynos4_pd_disable,
.base = S5P_PMU_LCD1_CONF,
},
},
@@ -110,8 +110,8 @@ struct platform_device s5pv310_device_pd[] = {
.id = 4,
.dev = {
.platform_data = &(struct samsung_pd_info) {
- .enable = s5pv310_pd_enable,
- .disable = s5pv310_pd_disable,
+ .enable = exynos4_pd_enable,
+ .disable = exynos4_pd_disable,
.base = S5P_PMU_TV_CONF,
},
},
@@ -120,8 +120,8 @@ struct platform_device s5pv310_device_pd[] = {
.id = 5,
.dev = {
.platform_data = &(struct samsung_pd_info) {
- .enable = s5pv310_pd_enable,
- .disable = s5pv310_pd_disable,
+ .enable = exynos4_pd_enable,
+ .disable = exynos4_pd_disable,
.base = S5P_PMU_CAM_CONF,
},
},
@@ -130,8 +130,8 @@ struct platform_device s5pv310_device_pd[] = {
.id = 6,
.dev = {
.platform_data = &(struct samsung_pd_info) {
- .enable = s5pv310_pd_enable,
- .disable = s5pv310_pd_disable,
+ .enable = exynos4_pd_enable,
+ .disable = exynos4_pd_disable,
.base = S5P_PMU_GPS_CONF,
},
},
diff --git a/arch/arm/mach-s5pv310/dev-sysmmu.c b/arch/arm/mach-exynos4/dev-sysmmu.c
similarity index 62%
rename from arch/arm/mach-s5pv310/dev-sysmmu.c
rename to arch/arm/mach-exynos4/dev-sysmmu.c
index e1bb200..a10790a 100644
--- a/arch/arm/mach-s5pv310/dev-sysmmu.c
+++ b/arch/arm/mach-exynos4/dev-sysmmu.c
@@ -1,8 +1,10 @@
-/* linux/arch/arm/mach-s5pv310/dev-sysmmu.c
+/* linux/arch/arm/mach-exynos4/dev-sysmmu.c
*
* Copyright (c) 2010 Samsung Electronics Co., Ltd.
* http://www.samsung.com
*
+ * EXYNOS4 - System MMU support
+ *
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
@@ -14,10 +16,10 @@
#include <mach/map.h>
#include <mach/irqs.h>
-static struct resource s5pv310_sysmmu_resource[] = {
+static struct resource exynos4_sysmmu_resource[] = {
[0] = {
- .start = S5PV310_PA_SYSMMU_MDMA,
- .end = S5PV310_PA_SYSMMU_MDMA + SZ_64K - 1,
+ .start = EXYNOS4_PA_SYSMMU_MDMA,
+ .end = EXYNOS4_PA_SYSMMU_MDMA + SZ_64K - 1,
.flags = IORESOURCE_MEM,
},
[1] = {
@@ -26,8 +28,8 @@ static struct resource s5pv310_sysmmu_resource[] = {
.flags = IORESOURCE_IRQ,
},
[2] = {
- .start = S5PV310_PA_SYSMMU_SSS,
- .end = S5PV310_PA_SYSMMU_SSS + SZ_64K - 1,
+ .start = EXYNOS4_PA_SYSMMU_SSS,
+ .end = EXYNOS4_PA_SYSMMU_SSS + SZ_64K - 1,
.flags = IORESOURCE_MEM,
},
[3] = {
@@ -36,8 +38,8 @@ static struct resource s5pv310_sysmmu_resource[] = {
.flags = IORESOURCE_IRQ,
},
[4] = {
- .start = S5PV310_PA_SYSMMU_FIMC0,
- .end = S5PV310_PA_SYSMMU_FIMC0 + SZ_64K - 1,
+ .start = EXYNOS4_PA_SYSMMU_FIMC0,
+ .end = EXYNOS4_PA_SYSMMU_FIMC0 + SZ_64K - 1,
.flags = IORESOURCE_MEM,
},
[5] = {
@@ -46,8 +48,8 @@ static struct resource s5pv310_sysmmu_resource[] = {
.flags = IORESOURCE_IRQ,
},
[6] = {
- .start = S5PV310_PA_SYSMMU_FIMC1,
- .end = S5PV310_PA_SYSMMU_FIMC1 + SZ_64K - 1,
+ .start = EXYNOS4_PA_SYSMMU_FIMC1,
+ .end = EXYNOS4_PA_SYSMMU_FIMC1 + SZ_64K - 1,
.flags = IORESOURCE_MEM,
},
[7] = {
@@ -56,8 +58,8 @@ static struct resource s5pv310_sysmmu_resource[] = {
.flags = IORESOURCE_IRQ,
},
[8] = {
- .start = S5PV310_PA_SYSMMU_FIMC2,
- .end = S5PV310_PA_SYSMMU_FIMC2 + SZ_64K - 1,
+ .start = EXYNOS4_PA_SYSMMU_FIMC2,
+ .end = EXYNOS4_PA_SYSMMU_FIMC2 + SZ_64K - 1,
.flags = IORESOURCE_MEM,
},
[9] = {
@@ -66,8 +68,8 @@ static struct resource s5pv310_sysmmu_resource[] = {
.flags = IORESOURCE_IRQ,
},
[10] = {
- .start = S5PV310_PA_SYSMMU_FIMC3,
- .end = S5PV310_PA_SYSMMU_FIMC3 + SZ_64K - 1,
+ .start = EXYNOS4_PA_SYSMMU_FIMC3,
+ .end = EXYNOS4_PA_SYSMMU_FIMC3 + SZ_64K - 1,
.flags = IORESOURCE_MEM,
},
[11] = {
@@ -76,8 +78,8 @@ static struct resource s5pv310_sysmmu_resource[] = {
.flags = IORESOURCE_IRQ,
},
[12] = {
- .start = S5PV310_PA_SYSMMU_JPEG,
- .end = S5PV310_PA_SYSMMU_JPEG + SZ_64K - 1,
+ .start = EXYNOS4_PA_SYSMMU_JPEG,
+ .end = EXYNOS4_PA_SYSMMU_JPEG + SZ_64K - 1,
.flags = IORESOURCE_MEM,
},
[13] = {
@@ -86,8 +88,8 @@ static struct resource s5pv310_sysmmu_resource[] = {
.flags = IORESOURCE_IRQ,
},
[14] = {
- .start = S5PV310_PA_SYSMMU_FIMD0,
- .end = S5PV310_PA_SYSMMU_FIMD0 + SZ_64K - 1,
+ .start = EXYNOS4_PA_SYSMMU_FIMD0,
+ .end = EXYNOS4_PA_SYSMMU_FIMD0 + SZ_64K - 1,
.flags = IORESOURCE_MEM,
},
[15] = {
@@ -96,8 +98,8 @@ static struct resource s5pv310_sysmmu_resource[] = {
.flags = IORESOURCE_IRQ,
},
[16] = {
- .start = S5PV310_PA_SYSMMU_FIMD1,
- .end = S5PV310_PA_SYSMMU_FIMD1 + SZ_64K - 1,
+ .start = EXYNOS4_PA_SYSMMU_FIMD1,
+ .end = EXYNOS4_PA_SYSMMU_FIMD1 + SZ_64K - 1,
.flags = IORESOURCE_MEM,
},
[17] = {
@@ -106,8 +108,8 @@ static struct resource s5pv310_sysmmu_resource[] = {
.flags = IORESOURCE_IRQ,
},
[18] = {
- .start = S5PV310_PA_SYSMMU_PCIe,
- .end = S5PV310_PA_SYSMMU_PCIe + SZ_64K - 1,
+ .start = EXYNOS4_PA_SYSMMU_PCIe,
+ .end = EXYNOS4_PA_SYSMMU_PCIe + SZ_64K - 1,
.flags = IORESOURCE_MEM,
},
[19] = {
@@ -116,8 +118,8 @@ static struct resource s5pv310_sysmmu_resource[] = {
.flags = IORESOURCE_IRQ,
},
[20] = {
- .start = S5PV310_PA_SYSMMU_G2D,
- .end = S5PV310_PA_SYSMMU_G2D + SZ_64K - 1,
+ .start = EXYNOS4_PA_SYSMMU_G2D,
+ .end = EXYNOS4_PA_SYSMMU_G2D + SZ_64K - 1,
.flags = IORESOURCE_MEM,
},
[21] = {
@@ -126,8 +128,8 @@ static struct resource s5pv310_sysmmu_resource[] = {
.flags = IORESOURCE_IRQ,
},
[22] = {
- .start = S5PV310_PA_SYSMMU_ROTATOR,
- .end = S5PV310_PA_SYSMMU_ROTATOR + SZ_64K - 1,
+ .start = EXYNOS4_PA_SYSMMU_ROTATOR,
+ .end = EXYNOS4_PA_SYSMMU_ROTATOR + SZ_64K - 1,
.flags = IORESOURCE_MEM,
},
[23] = {
@@ -136,8 +138,8 @@ static struct resource s5pv310_sysmmu_resource[] = {
.flags = IORESOURCE_IRQ,
},
[24] = {
- .start = S5PV310_PA_SYSMMU_MDMA2,
- .end = S5PV310_PA_SYSMMU_MDMA2 + SZ_64K - 1,
+ .start = EXYNOS4_PA_SYSMMU_MDMA2,
+ .end = EXYNOS4_PA_SYSMMU_MDMA2 + SZ_64K - 1,
.flags = IORESOURCE_MEM,
},
[25] = {
@@ -146,8 +148,8 @@ static struct resource s5pv310_sysmmu_resource[] = {
.flags = IORESOURCE_IRQ,
},
[26] = {
- .start = S5PV310_PA_SYSMMU_TV,
- .end = S5PV310_PA_SYSMMU_TV + SZ_64K - 1,
+ .start = EXYNOS4_PA_SYSMMU_TV,
+ .end = EXYNOS4_PA_SYSMMU_TV + SZ_64K - 1,
.flags = IORESOURCE_MEM,
},
[27] = {
@@ -156,8 +158,8 @@ static struct resource s5pv310_sysmmu_resource[] = {
.flags = IORESOURCE_IRQ,
},
[28] = {
- .start = S5PV310_PA_SYSMMU_MFC_L,
- .end = S5PV310_PA_SYSMMU_MFC_L + SZ_64K - 1,
+ .start = EXYNOS4_PA_SYSMMU_MFC_L,
+ .end = EXYNOS4_PA_SYSMMU_MFC_L + SZ_64K - 1,
.flags = IORESOURCE_MEM,
},
[29] = {
@@ -166,8 +168,8 @@ static struct resource s5pv310_sysmmu_resource[] = {
.flags = IORESOURCE_IRQ,
},
[30] = {
- .start = S5PV310_PA_SYSMMU_MFC_R,
- .end = S5PV310_PA_SYSMMU_MFC_R + SZ_64K - 1,
+ .start = EXYNOS4_PA_SYSMMU_MFC_R,
+ .end = EXYNOS4_PA_SYSMMU_MFC_R + SZ_64K - 1,
.flags = IORESOURCE_MEM,
},
[31] = {
@@ -177,11 +179,11 @@ static struct resource s5pv310_sysmmu_resource[] = {
},
};
-struct platform_device s5pv310_device_sysmmu = {
+struct platform_device exynos4_device_sysmmu = {
.name = "s5p-sysmmu",
.id = 32,
- .num_resources = ARRAY_SIZE(s5pv310_sysmmu_resource),
- .resource = s5pv310_sysmmu_resource,
+ .num_resources = ARRAY_SIZE(exynos4_sysmmu_resource),
+ .resource = exynos4_sysmmu_resource,
};
-EXPORT_SYMBOL(s5pv310_device_sysmmu);
+EXPORT_SYMBOL(exynos4_device_sysmmu);
diff --git a/arch/arm/mach-s5pv310/setup-i2c1.c b/arch/arm/mach-exynos4/setup-i2c1.c
similarity index 85%
rename from arch/arm/mach-s5pv310/setup-i2c1.c
rename to arch/arm/mach-exynos4/setup-i2c1.c
index 9d07e4e..fd7235a 100644
--- a/arch/arm/mach-s5pv310/setup-i2c1.c
+++ b/arch/arm/mach-exynos4/setup-i2c1.c
@@ -1,5 +1,5 @@
/*
- * linux/arch/arm/mach-s5pv310/setup-i2c1.c
+ * linux/arch/arm/mach-exynos4/setup-i2c1.c
*
* Copyright (C) 2010 Samsung Electronics Co., Ltd.
*
@@ -18,6 +18,6 @@ struct platform_device; /* don't need the contents */
void s3c_i2c1_cfg_gpio(struct platform_device *dev)
{
- s3c_gpio_cfgall_range(S5PV310_GPD1(2), 2,
+ s3c_gpio_cfgall_range(EXYNOS4_GPD1(2), 2,
S3C_GPIO_SFN(2), S3C_GPIO_PULL_UP);
}
diff --git a/arch/arm/mach-s5pv310/setup-i2c2.c b/arch/arm/mach-exynos4/setup-i2c2.c
similarity index 85%
rename from arch/arm/mach-s5pv310/setup-i2c2.c
rename to arch/arm/mach-exynos4/setup-i2c2.c
index 4163b12..2694b19 100644
--- a/arch/arm/mach-s5pv310/setup-i2c2.c
+++ b/arch/arm/mach-exynos4/setup-i2c2.c
@@ -1,5 +1,5 @@
/*
- * linux/arch/arm/mach-s5pv310/setup-i2c2.c
+ * linux/arch/arm/mach-exynos4/setup-i2c2.c
*
* Copyright (c) 2009-2010 Samsung Electronics Co., Ltd.
*
@@ -18,6 +18,6 @@ struct platform_device; /* don't need the contents */
void s3c_i2c2_cfg_gpio(struct platform_device *dev)
{
- s3c_gpio_cfgall_range(S5PV310_GPA0(6), 2,
+ s3c_gpio_cfgall_range(EXYNOS4_GPA0(6), 2,
S3C_GPIO_SFN(3), S3C_GPIO_PULL_UP);
}
diff --git a/arch/arm/mach-s5pv310/setup-i2c3.c b/arch/arm/mach-exynos4/setup-i2c3.c
similarity index 85%
rename from arch/arm/mach-s5pv310/setup-i2c3.c
rename to arch/arm/mach-exynos4/setup-i2c3.c
index 180f153..379bd30 100644
--- a/arch/arm/mach-s5pv310/setup-i2c3.c
+++ b/arch/arm/mach-exynos4/setup-i2c3.c
@@ -1,5 +1,5 @@
/*
- * linux/arch/arm/mach-s5pv310/setup-i2c3.c
+ * linux/arch/arm/mach-exynos4/setup-i2c3.c
*
* Copyright (c) 2010 Samsung Electronics Co., Ltd.
*
@@ -18,6 +18,6 @@ struct platform_device; /* don't need the contents */
void s3c_i2c3_cfg_gpio(struct platform_device *dev)
{
- s3c_gpio_cfgall_range(S5PV310_GPA1(2), 2,
+ s3c_gpio_cfgall_range(EXYNOS4_GPA1(2), 2,
S3C_GPIO_SFN(3), S3C_GPIO_PULL_UP);
}
diff --git a/arch/arm/mach-s5pv310/setup-i2c4.c b/arch/arm/mach-exynos4/setup-i2c4.c
similarity index 85%
rename from arch/arm/mach-s5pv310/setup-i2c4.c
rename to arch/arm/mach-exynos4/setup-i2c4.c
index 909e8df..9f3c048 100644
--- a/arch/arm/mach-s5pv310/setup-i2c4.c
+++ b/arch/arm/mach-exynos4/setup-i2c4.c
@@ -1,5 +1,5 @@
/*
- * linux/arch/arm/mach-s5pv310/setup-i2c4.c
+ * linux/arch/arm/mach-exynos4/setup-i2c4.c
*
* Copyright (c) 2010 Samsung Electronics Co., Ltd.
*
@@ -18,6 +18,6 @@ struct platform_device; /* don't need the contents */
void s3c_i2c4_cfg_gpio(struct platform_device *dev)
{
- s3c_gpio_cfgall_range(S5PV310_GPB(2), 2,
+ s3c_gpio_cfgall_range(EXYNOS4_GPB(2), 2,
S3C_GPIO_SFN(3), S3C_GPIO_PULL_UP);
}
diff --git a/arch/arm/mach-s5pv310/setup-i2c5.c b/arch/arm/mach-exynos4/setup-i2c5.c
similarity index 85%
rename from arch/arm/mach-s5pv310/setup-i2c5.c
rename to arch/arm/mach-exynos4/setup-i2c5.c
index 5d0fa4a..77e1a1e 100644
--- a/arch/arm/mach-s5pv310/setup-i2c5.c
+++ b/arch/arm/mach-exynos4/setup-i2c5.c
@@ -1,5 +1,5 @@
/*
- * linux/arch/arm/mach-s5pv310/setup-i2c5.c
+ * linux/arch/arm/mach-exynos4/setup-i2c5.c
*
* Copyright (c) 2010 Samsung Electronics Co., Ltd.
*
@@ -18,6 +18,6 @@ struct platform_device; /* don't need the contents */
void s3c_i2c5_cfg_gpio(struct platform_device *dev)
{
- s3c_gpio_cfgall_range(S5PV310_GPB(6), 2,
+ s3c_gpio_cfgall_range(EXYNOS4_GPB(6), 2,
S3C_GPIO_SFN(3), S3C_GPIO_PULL_UP);
}
diff --git a/arch/arm/mach-s5pv310/setup-i2c6.c b/arch/arm/mach-exynos4/setup-i2c6.c
similarity index 85%
rename from arch/arm/mach-s5pv310/setup-i2c6.c
rename to arch/arm/mach-exynos4/setup-i2c6.c
index 34aafab..284d12b 100644
--- a/arch/arm/mach-s5pv310/setup-i2c6.c
+++ b/arch/arm/mach-exynos4/setup-i2c6.c
@@ -1,5 +1,5 @@
/*
- * linux/arch/arm/mach-s5pv310/setup-i2c6.c
+ * linux/arch/arm/mach-exynos4/setup-i2c6.c
*
* Copyright (c) 2010 Samsung Electronics Co., Ltd.
*
@@ -18,6 +18,6 @@ struct platform_device; /* don't need the contents */
void s3c_i2c6_cfg_gpio(struct platform_device *dev)
{
- s3c_gpio_cfgall_range(S5PV310_GPC1(3), 2,
+ s3c_gpio_cfgall_range(EXYNOS4_GPC1(3), 2,
S3C_GPIO_SFN(4), S3C_GPIO_PULL_UP);
}
diff --git a/arch/arm/mach-s5pv310/setup-i2c7.c b/arch/arm/mach-exynos4/setup-i2c7.c
similarity index 85%
rename from arch/arm/mach-s5pv310/setup-i2c7.c
rename to arch/arm/mach-exynos4/setup-i2c7.c
index 9b25b8d..b7611ee 100644
--- a/arch/arm/mach-s5pv310/setup-i2c7.c
+++ b/arch/arm/mach-exynos4/setup-i2c7.c
@@ -1,5 +1,5 @@
/*
- * linux/arch/arm/mach-s5pv310/setup-i2c7.c
+ * linux/arch/arm/mach-exynos4/setup-i2c7.c
*
* Copyright (c) 2010 Samsung Electronics Co., Ltd.
*
@@ -18,6 +18,6 @@ struct platform_device; /* don't need the contents */
void s3c_i2c7_cfg_gpio(struct platform_device *dev)
{
- s3c_gpio_cfgall_range(S5PV310_GPD0(2), 2,
+ s3c_gpio_cfgall_range(EXYNOS4_GPD0(2), 2,
S3C_GPIO_SFN(3), S3C_GPIO_PULL_UP);
}
diff --git a/arch/arm/mach-s5pv310/setup-sdhci-gpio.c b/arch/arm/mach-exynos4/setup-sdhci-gpio.c
similarity index 69%
rename from arch/arm/mach-s5pv310/setup-sdhci-gpio.c
rename to arch/arm/mach-exynos4/setup-sdhci-gpio.c
index 86d38cc..1b3d3a2 100644
--- a/arch/arm/mach-s5pv310/setup-sdhci-gpio.c
+++ b/arch/arm/mach-exynos4/setup-sdhci-gpio.c
@@ -1,9 +1,9 @@
-/* linux/arch/arm/mach-s5pv310/setup-sdhci-gpio.c
+/* linux/arch/arm/mach-exynos4/setup-sdhci-gpio.c
*
- * Copyright (c) 2010 Samsung Electronics Co., Ltd.
- * http://www.samsung.com/
+ * Copyright (c) 2010-2011 Samsung Electronics Co., Ltd.
+ * http://www.samsung.com
*
- * S5PV310 - Helper functions for setting up SDHCI device(s) GPIO (HSMMC)
+ * EXYNOS4 - Helper functions for setting up SDHCI device(s) GPIO (HSMMC)
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
@@ -23,13 +23,13 @@
#include <plat/regs-sdhci.h>
#include <plat/sdhci.h>
-void s5pv310_setup_sdhci0_cfg_gpio(struct platform_device *dev, int width)
+void exynos4_setup_sdhci0_cfg_gpio(struct platform_device *dev, int width)
{
struct s3c_sdhci_platdata *pdata = dev->dev.platform_data;
unsigned int gpio;
/* Set all the necessary GPK0[0:1] pins to special-function 2 */
- for (gpio = S5PV310_GPK0(0); gpio < S5PV310_GPK0(2); gpio++) {
+ for (gpio = EXYNOS4_GPK0(0); gpio < EXYNOS4_GPK0(2); gpio++) {
s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(2));
s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE);
s5p_gpio_set_drvstr(gpio, S5P_GPIO_DRVSTR_LV4);
@@ -37,14 +37,14 @@ void s5pv310_setup_sdhci0_cfg_gpio(struct platform_device *dev, int width)
switch (width) {
case 8:
- for (gpio = S5PV310_GPK1(3); gpio <= S5PV310_GPK1(6); gpio++) {
+ for (gpio = EXYNOS4_GPK1(3); gpio <= EXYNOS4_GPK1(6); gpio++) {
/* Data pin GPK1[3:6] to special-funtion 3 */
s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(3));
s3c_gpio_setpull(gpio, S3C_GPIO_PULL_UP);
s5p_gpio_set_drvstr(gpio, S5P_GPIO_DRVSTR_LV4);
}
case 4:
- for (gpio = S5PV310_GPK0(3); gpio <= S5PV310_GPK0(6); gpio++) {
+ for (gpio = EXYNOS4_GPK0(3); gpio <= EXYNOS4_GPK0(6); gpio++) {
/* Data pin GPK0[3:6] to special-funtion 2 */
s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(2));
s3c_gpio_setpull(gpio, S3C_GPIO_PULL_UP);
@@ -55,25 +55,25 @@ void s5pv310_setup_sdhci0_cfg_gpio(struct platform_device *dev, int width)
}
if (pdata->cd_type == S3C_SDHCI_CD_INTERNAL) {
- s3c_gpio_cfgpin(S5PV310_GPK0(2), S3C_GPIO_SFN(2));
- s3c_gpio_setpull(S5PV310_GPK0(2), S3C_GPIO_PULL_UP);
+ s3c_gpio_cfgpin(EXYNOS4_GPK0(2), S3C_GPIO_SFN(2));
+ s3c_gpio_setpull(EXYNOS4_GPK0(2), S3C_GPIO_PULL_UP);
s5p_gpio_set_drvstr(gpio, S5P_GPIO_DRVSTR_LV4);
}
}
-void s5pv310_setup_sdhci1_cfg_gpio(struct platform_device *dev, int width)
+void exynos4_setup_sdhci1_cfg_gpio(struct platform_device *dev, int width)
{
struct s3c_sdhci_platdata *pdata = dev->dev.platform_data;
unsigned int gpio;
/* Set all the necessary GPK1[0:1] pins to special-function 2 */
- for (gpio = S5PV310_GPK1(0); gpio < S5PV310_GPK1(2); gpio++) {
+ for (gpio = EXYNOS4_GPK1(0); gpio < EXYNOS4_GPK1(2); gpio++) {
s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(2));
s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE);
s5p_gpio_set_drvstr(gpio, S5P_GPIO_DRVSTR_LV4);
}
- for (gpio = S5PV310_GPK1(3); gpio <= S5PV310_GPK1(6); gpio++) {
+ for (gpio = EXYNOS4_GPK1(3); gpio <= EXYNOS4_GPK1(6); gpio++) {
/* Data pin GPK1[3:6] to special-function 2 */
s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(2));
s3c_gpio_setpull(gpio, S3C_GPIO_PULL_UP);
@@ -81,19 +81,19 @@ void s5pv310_setup_sdhci1_cfg_gpio(struct platform_device *dev, int width)
}
if (pdata->cd_type == S3C_SDHCI_CD_INTERNAL) {
- s3c_gpio_cfgpin(S5PV310_GPK1(2), S3C_GPIO_SFN(2));
- s3c_gpio_setpull(S5PV310_GPK1(2), S3C_GPIO_PULL_UP);
+ s3c_gpio_cfgpin(EXYNOS4_GPK1(2), S3C_GPIO_SFN(2));
+ s3c_gpio_setpull(EXYNOS4_GPK1(2), S3C_GPIO_PULL_UP);
s5p_gpio_set_drvstr(gpio, S5P_GPIO_DRVSTR_LV4);
}
}
-void s5pv310_setup_sdhci2_cfg_gpio(struct platform_device *dev, int width)
+void exynos4_setup_sdhci2_cfg_gpio(struct platform_device *dev, int width)
{
struct s3c_sdhci_platdata *pdata = dev->dev.platform_data;
unsigned int gpio;
/* Set all the necessary GPK2[0:1] pins to special-function 2 */
- for (gpio = S5PV310_GPK2(0); gpio < S5PV310_GPK2(2); gpio++) {
+ for (gpio = EXYNOS4_GPK2(0); gpio < EXYNOS4_GPK2(2); gpio++) {
s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(2));
s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE);
s5p_gpio_set_drvstr(gpio, S5P_GPIO_DRVSTR_LV4);
@@ -101,14 +101,14 @@ void s5pv310_setup_sdhci2_cfg_gpio(struct platform_device *dev, int width)
switch (width) {
case 8:
- for (gpio = S5PV310_GPK3(3); gpio <= S5PV310_GPK3(6); gpio++) {
+ for (gpio = EXYNOS4_GPK3(3); gpio <= EXYNOS4_GPK3(6); gpio++) {
/* Data pin GPK3[3:6] to special-function 3 */
s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(3));
s3c_gpio_setpull(gpio, S3C_GPIO_PULL_UP);
s5p_gpio_set_drvstr(gpio, S5P_GPIO_DRVSTR_LV4);
}
case 4:
- for (gpio = S5PV310_GPK2(3); gpio <= S5PV310_GPK2(6); gpio++) {
+ for (gpio = EXYNOS4_GPK2(3); gpio <= EXYNOS4_GPK2(6); gpio++) {
/* Data pin GPK2[3:6] to special-function 2 */
s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(2));
s3c_gpio_setpull(gpio, S3C_GPIO_PULL_UP);
@@ -119,25 +119,25 @@ void s5pv310_setup_sdhci2_cfg_gpio(struct platform_device *dev, int width)
}
if (pdata->cd_type == S3C_SDHCI_CD_INTERNAL) {
- s3c_gpio_cfgpin(S5PV310_GPK2(2), S3C_GPIO_SFN(2));
- s3c_gpio_setpull(S5PV310_GPK2(2), S3C_GPIO_PULL_UP);
+ s3c_gpio_cfgpin(EXYNOS4_GPK2(2), S3C_GPIO_SFN(2));
+ s3c_gpio_setpull(EXYNOS4_GPK2(2), S3C_GPIO_PULL_UP);
s5p_gpio_set_drvstr(gpio, S5P_GPIO_DRVSTR_LV4);
}
}
-void s5pv310_setup_sdhci3_cfg_gpio(struct platform_device *dev, int width)
+void exynos4_setup_sdhci3_cfg_gpio(struct platform_device *dev, int width)
{
struct s3c_sdhci_platdata *pdata = dev->dev.platform_data;
unsigned int gpio;
/* Set all the necessary GPK3[0:1] pins to special-function 2 */
- for (gpio = S5PV310_GPK3(0); gpio < S5PV310_GPK3(2); gpio++) {
+ for (gpio = EXYNOS4_GPK3(0); gpio < EXYNOS4_GPK3(2); gpio++) {
s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(2));
s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE);
s5p_gpio_set_drvstr(gpio, S5P_GPIO_DRVSTR_LV4);
}
- for (gpio = S5PV310_GPK3(3); gpio <= S5PV310_GPK3(6); gpio++) {
+ for (gpio = EXYNOS4_GPK3(3); gpio <= EXYNOS4_GPK3(6); gpio++) {
/* Data pin GPK3[3:6] to special-function 2 */
s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(2));
s3c_gpio_setpull(gpio, S3C_GPIO_PULL_UP);
@@ -145,8 +145,8 @@ void s5pv310_setup_sdhci3_cfg_gpio(struct platform_device *dev, int width)
}
if (pdata->cd_type == S3C_SDHCI_CD_INTERNAL) {
- s3c_gpio_cfgpin(S5PV310_GPK3(2), S3C_GPIO_SFN(2));
- s3c_gpio_setpull(S5PV310_GPK3(2), S3C_GPIO_PULL_UP);
+ s3c_gpio_cfgpin(EXYNOS4_GPK3(2), S3C_GPIO_SFN(2));
+ s3c_gpio_setpull(EXYNOS4_GPK3(2), S3C_GPIO_PULL_UP);
s5p_gpio_set_drvstr(gpio, S5P_GPIO_DRVSTR_LV4);
}
}
diff --git a/arch/arm/mach-s5pv310/setup-sdhci.c b/arch/arm/mach-exynos4/setup-sdhci.c
similarity index 83%
rename from arch/arm/mach-s5pv310/setup-sdhci.c
rename to arch/arm/mach-exynos4/setup-sdhci.c
index db8358f..85f9433 100644
--- a/arch/arm/mach-s5pv310/setup-sdhci.c
+++ b/arch/arm/mach-exynos4/setup-sdhci.c
@@ -1,9 +1,9 @@
-/* linux/arch/arm/mach-s5pv310/setup-sdhci.c
+/* linux/arch/arm/mach-exynos4/setup-sdhci.c
*
- * Copyright (c) 2010 Samsung Electronics Co., Ltd.
- * http://www.samsung.com/
+ * Copyright (c) 2010-2011 Samsung Electronics Co., Ltd.
+ * http://www.samsung.com
*
- * S5PV310 - Helper functions for settign up SDHCI device(s) (HSMMC)
+ * EXYNOS4 - Helper functions for settign up SDHCI device(s) (HSMMC)
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
@@ -23,14 +23,14 @@
/* clock sources for the mmc bus clock, order as for the ctrl2[5..4] */
-char *s5pv310_hsmmc_clksrcs[4] = {
+char *exynos4_hsmmc_clksrcs[4] = {
[0] = NULL,
[1] = NULL,
[2] = "sclk_mmc", /* mmc_bus */
[3] = NULL,
};
-void s5pv310_setup_sdhci_cfg_card(struct platform_device *dev, void __iomem *r,
+void exynos4_setup_sdhci_cfg_card(struct platform_device *dev, void __iomem *r,
struct mmc_ios *ios, struct mmc_card *card)
{
u32 ctrl2, ctrl3;
diff --git a/arch/arm/plat-samsung/include/plat/devs.h b/arch/arm/plat-samsung/include/plat/devs.h
index b4d208b..e2b3ab9 100644
--- a/arch/arm/plat-samsung/include/plat/devs.h
+++ b/arch/arm/plat-samsung/include/plat/devs.h
@@ -1,5 +1,8 @@
/* arch/arm/plat-samsung/include/plat/devs.h
*
+ * Copyright (c) 2011 Samsung Electronics Co., Ltd.
+ * http://www.samsung.com
+ *
* Copyright (c) 2004 Simtec Electronics
* Ben Dooks <ben@simtec.co.uk>
*
@@ -96,15 +99,15 @@ extern struct platform_device s5pv210_device_iis1;
extern struct platform_device s5pv210_device_iis2;
extern struct platform_device s5pv210_device_spdif;
-extern struct platform_device s5pv310_device_ac97;
-extern struct platform_device s5pv310_device_pcm0;
-extern struct platform_device s5pv310_device_pcm1;
-extern struct platform_device s5pv310_device_pcm2;
-extern struct platform_device s5pv310_device_i2s0;
-extern struct platform_device s5pv310_device_i2s1;
-extern struct platform_device s5pv310_device_i2s2;
-extern struct platform_device s5pv310_device_spdif;
-extern struct platform_device s5pv310_device_pd[];
+extern struct platform_device exynos4_device_ac97;
+extern struct platform_device exynos4_device_pcm0;
+extern struct platform_device exynos4_device_pcm1;
+extern struct platform_device exynos4_device_pcm2;
+extern struct platform_device exynos4_device_i2s0;
+extern struct platform_device exynos4_device_i2s1;
+extern struct platform_device exynos4_device_i2s2;
+extern struct platform_device exynos4_device_spdif;
+extern struct platform_device exynos4_device_pd[];
extern struct platform_device s5p6442_device_pcm0;
extern struct platform_device s5p6442_device_pcm1;
@@ -137,7 +140,7 @@ extern struct platform_device s5p_device_fimc2;
extern struct platform_device s5p_device_mipi_csis0;
extern struct platform_device s5p_device_mipi_csis1;
-extern struct platform_device s5pv310_device_sysmmu;
+extern struct platform_device exynos4_device_sysmmu;
/* s3c2440 specific devices */
diff --git a/arch/arm/plat-samsung/include/plat/pd.h b/arch/arm/plat-samsung/include/plat/pd.h
index 5f0ad85..abb4bc3 100644
--- a/arch/arm/plat-samsung/include/plat/pd.h
+++ b/arch/arm/plat-samsung/include/plat/pd.h
@@ -1,6 +1,6 @@
/* linux/arch/arm/plat-samsung/include/plat/pd.h
*
- * Copyright (c) 2010 Samsung Electronics Co., Ltd.
+ * Copyright (c) 2010-2011 Samsung Electronics Co., Ltd.
* http://www.samsung.com
*
* This program is free software; you can redistribute it and/or modify
@@ -17,7 +17,7 @@ struct samsung_pd_info {
void __iomem *base;
};
-enum s5pv310_pd_block {
+enum exynos4_pd_block {
PD_MFC,
PD_G3D,
PD_LCD0,
diff --git a/arch/arm/plat-samsung/include/plat/sdhci.h b/arch/arm/plat-samsung/include/plat/sdhci.h
index 5a41a0b..b0bdf16 100644
--- a/arch/arm/plat-samsung/include/plat/sdhci.h
+++ b/arch/arm/plat-samsung/include/plat/sdhci.h
@@ -1,4 +1,7 @@
-/* linux/arch/arm/plat-s3c/include/plat/sdhci.h
+/* linux/arch/arm/plat-samsung/include/plat/sdhci.h
+ *
+ * Copyright (c) 2011 Samsung Electronics Co., Ltd.
+ * http://www.samsung.com
*
* Copyright 2008 Openmoko, Inc.
* Copyright 2008 Simtec Electronics
@@ -119,10 +122,10 @@ extern void s5pv210_setup_sdhci0_cfg_gpio(struct platform_device *, int w);
extern void s5pv210_setup_sdhci1_cfg_gpio(struct platform_device *, int w);
extern void s5pv210_setup_sdhci2_cfg_gpio(struct platform_device *, int w);
extern void s5pv210_setup_sdhci3_cfg_gpio(struct platform_device *, int w);
-extern void s5pv310_setup_sdhci0_cfg_gpio(struct platform_device *, int w);
-extern void s5pv310_setup_sdhci1_cfg_gpio(struct platform_device *, int w);
-extern void s5pv310_setup_sdhci2_cfg_gpio(struct platform_device *, int w);
-extern void s5pv310_setup_sdhci3_cfg_gpio(struct platform_device *, int w);
+extern void exynos4_setup_sdhci0_cfg_gpio(struct platform_device *, int w);
+extern void exynos4_setup_sdhci1_cfg_gpio(struct platform_device *, int w);
+extern void exynos4_setup_sdhci2_cfg_gpio(struct platform_device *, int w);
+extern void exynos4_setup_sdhci3_cfg_gpio(struct platform_device *, int w);
/* S3C2416 SDHCI setup */
@@ -334,57 +337,57 @@ static inline void s5pv210_default_sdhci3(void) { }
#endif /* CONFIG_S5PV210_SETUP_SDHCI */
-/* S5PV310 SDHCI setup */
-#ifdef CONFIG_S5PV310_SETUP_SDHCI
-extern char *s5pv310_hsmmc_clksrcs[4];
+/* EXYNOS4 SDHCI setup */
+#ifdef CONFIG_EXYNOS4_SETUP_SDHCI
+extern char *exynos4_hsmmc_clksrcs[4];
-extern void s5pv310_setup_sdhci_cfg_card(struct platform_device *dev,
+extern void exynos4_setup_sdhci_cfg_card(struct platform_device *dev,
void __iomem *r,
struct mmc_ios *ios,
struct mmc_card *card);
-static inline void s5pv310_default_sdhci0(void)
+static inline void exynos4_default_sdhci0(void)
{
#ifdef CONFIG_S3C_DEV_HSMMC
- s3c_hsmmc0_def_platdata.clocks = s5pv310_hsmmc_clksrcs;
- s3c_hsmmc0_def_platdata.cfg_gpio = s5pv310_setup_sdhci0_cfg_gpio;
- s3c_hsmmc0_def_platdata.cfg_card = s5pv310_setup_sdhci_cfg_card;
+ s3c_hsmmc0_def_platdata.clocks = exynos4_hsmmc_clksrcs;
+ s3c_hsmmc0_def_platdata.cfg_gpio = exynos4_setup_sdhci0_cfg_gpio;
+ s3c_hsmmc0_def_platdata.cfg_card = exynos4_setup_sdhci_cfg_card;
#endif
}
-static inline void s5pv310_default_sdhci1(void)
+static inline void exynos4_default_sdhci1(void)
{
#ifdef CONFIG_S3C_DEV_HSMMC1
- s3c_hsmmc1_def_platdata.clocks = s5pv310_hsmmc_clksrcs;
- s3c_hsmmc1_def_platdata.cfg_gpio = s5pv310_setup_sdhci1_cfg_gpio;
- s3c_hsmmc1_def_platdata.cfg_card = s5pv310_setup_sdhci_cfg_card;
+ s3c_hsmmc1_def_platdata.clocks = exynos4_hsmmc_clksrcs;
+ s3c_hsmmc1_def_platdata.cfg_gpio = exynos4_setup_sdhci1_cfg_gpio;
+ s3c_hsmmc1_def_platdata.cfg_card = exynos4_setup_sdhci_cfg_card;
#endif
}
-static inline void s5pv310_default_sdhci2(void)
+static inline void exynos4_default_sdhci2(void)
{
#ifdef CONFIG_S3C_DEV_HSMMC2
- s3c_hsmmc2_def_platdata.clocks = s5pv310_hsmmc_clksrcs;
- s3c_hsmmc2_def_platdata.cfg_gpio = s5pv310_setup_sdhci2_cfg_gpio;
- s3c_hsmmc2_def_platdata.cfg_card = s5pv310_setup_sdhci_cfg_card;
+ s3c_hsmmc2_def_platdata.clocks = exynos4_hsmmc_clksrcs;
+ s3c_hsmmc2_def_platdata.cfg_gpio = exynos4_setup_sdhci2_cfg_gpio;
+ s3c_hsmmc2_def_platdata.cfg_card = exynos4_setup_sdhci_cfg_card;
#endif
}
-static inline void s5pv310_default_sdhci3(void)
+static inline void exynos4_default_sdhci3(void)
{
#ifdef CONFIG_S3C_DEV_HSMMC3
- s3c_hsmmc3_def_platdata.clocks = s5pv310_hsmmc_clksrcs;
- s3c_hsmmc3_def_platdata.cfg_gpio = s5pv310_setup_sdhci3_cfg_gpio;
- s3c_hsmmc3_def_platdata.cfg_card = s5pv310_setup_sdhci_cfg_card;
+ s3c_hsmmc3_def_platdata.clocks = exynos4_hsmmc_clksrcs;
+ s3c_hsmmc3_def_platdata.cfg_gpio = exynos4_setup_sdhci3_cfg_gpio;
+ s3c_hsmmc3_def_platdata.cfg_card = exynos4_setup_sdhci_cfg_card;
#endif
}
#else
-static inline void s5pv310_default_sdhci0(void) { }
-static inline void s5pv310_default_sdhci1(void) { }
-static inline void s5pv310_default_sdhci2(void) { }
-static inline void s5pv310_default_sdhci3(void) { }
+static inline void exynos4_default_sdhci0(void) { }
+static inline void exynos4_default_sdhci1(void) { }
+static inline void exynos4_default_sdhci2(void) { }
+static inline void exynos4_default_sdhci3(void) { }
-#endif /* CONFIG_S5PV310_SETUP_SDHCI */
+#endif /* CONFIG_EXYNOS4_SETUP_SDHCI */
#endif /* __PLAT_S3C_SDHCI_H */
--
1.7.1
^ permalink raw reply related [flat|nested] 20+ messages in thread* [PATCH 06/11] ARM: EXYNOS4: Moved board support files
2011-02-14 8:22 [PATCH 0/11] ARM: EXYNOS4: Change ARCH name, ARCH_EXYNOS4 from ARCH_S5PV310 Kukjin Kim
` (4 preceding siblings ...)
2011-02-14 8:23 ` [PATCH 05/11] ARM: EXYNOS4: Update device support Kukjin Kim
@ 2011-02-14 8:23 ` Kukjin Kim
2011-02-14 8:23 ` [PATCH 07/11] ARM: EXYNOS4: Update Kconfig and Makefile for the new ARCH_EXYNOS4 Kukjin Kim
` (6 subsequent siblings)
12 siblings, 0 replies; 20+ messages in thread
From: Kukjin Kim @ 2011-02-14 8:23 UTC (permalink / raw)
To: linux-arm-kernel
This patch moves board support files, SMDKC210, SMKDV310
and UNIVERSAL_C210 into arch/arm/mach-exynos4/ according
to the change of ARCH name, EXYNOS4.
Cc: Kyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
---
.../{mach-s5pv310 => mach-exynos4}/mach-smdkc210.c | 48 ++++++++++----------
.../{mach-s5pv310 => mach-exynos4}/mach-smdkv310.c | 48 ++++++++++----------
.../mach-universal_c210.c | 22 +++++-----
3 files changed, 59 insertions(+), 59 deletions(-)
rename arch/arm/{mach-s5pv310 => mach-exynos4}/mach-smdkc210.c (87%)
rename arch/arm/{mach-s5pv310 => mach-exynos4}/mach-smdkv310.c (87%)
rename arch/arm/{mach-s5pv310 => mach-exynos4}/mach-universal_c210.c (93%)
diff --git a/arch/arm/mach-s5pv310/mach-smdkc210.c b/arch/arm/mach-exynos4/mach-smdkc210.c
similarity index 87%
rename from arch/arm/mach-s5pv310/mach-smdkc210.c
rename to arch/arm/mach-exynos4/mach-smdkc210.c
index d9cab02..25a2568 100644
--- a/arch/arm/mach-s5pv310/mach-smdkc210.c
+++ b/arch/arm/mach-exynos4/mach-smdkc210.c
@@ -1,7 +1,7 @@
-/* linux/arch/arm/mach-s5pv310/mach-smdkc210.c
+/* linux/arch/arm/mach-exynos4/mach-smdkc210.c
*
- * Copyright (c) 2010 Samsung Electronics Co., Ltd.
- * http://www.samsung.com/
+ * Copyright (c) 2010-2011 Samsung Electronics Co., Ltd.
+ * http://www.samsung.com
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
@@ -21,7 +21,7 @@
#include <plat/regs-serial.h>
#include <plat/regs-srom.h>
-#include <plat/s5pv310.h>
+#include <plat/exynos4.h>
#include <plat/cpu.h>
#include <plat/devs.h>
#include <plat/sdhci.h>
@@ -77,10 +77,10 @@ static struct s3c2410_uartcfg smdkc210_uartcfgs[] __initdata = {
static struct s3c_sdhci_platdata smdkc210_hsmmc0_pdata __initdata = {
.cd_type = S3C_SDHCI_CD_GPIO,
- .ext_cd_gpio = S5PV310_GPK0(2),
+ .ext_cd_gpio = EXYNOS4_GPK0(2),
.ext_cd_gpio_invert = 1,
.clk_type = S3C_SDHCI_CLK_DIV_EXTERNAL,
-#ifdef CONFIG_S5PV310_SDHCI_CH0_8BIT
+#ifdef CONFIG_EXYNOS4_SDHCI_CH0_8BIT
.max_width = 8,
.host_caps = MMC_CAP_8_BIT_DATA,
#endif
@@ -88,17 +88,17 @@ static struct s3c_sdhci_platdata smdkc210_hsmmc0_pdata __initdata = {
static struct s3c_sdhci_platdata smdkc210_hsmmc1_pdata __initdata = {
.cd_type = S3C_SDHCI_CD_GPIO,
- .ext_cd_gpio = S5PV310_GPK0(2),
+ .ext_cd_gpio = EXYNOS4_GPK0(2),
.ext_cd_gpio_invert = 1,
.clk_type = S3C_SDHCI_CLK_DIV_EXTERNAL,
};
static struct s3c_sdhci_platdata smdkc210_hsmmc2_pdata __initdata = {
.cd_type = S3C_SDHCI_CD_GPIO,
- .ext_cd_gpio = S5PV310_GPK2(2),
+ .ext_cd_gpio = EXYNOS4_GPK2(2),
.ext_cd_gpio_invert = 1,
.clk_type = S3C_SDHCI_CLK_DIV_EXTERNAL,
-#ifdef CONFIG_S5PV310_SDHCI_CH2_8BIT
+#ifdef CONFIG_EXYNOS4_SDHCI_CH2_8BIT
.max_width = 8,
.host_caps = MMC_CAP_8_BIT_DATA,
#endif
@@ -106,15 +106,15 @@ static struct s3c_sdhci_platdata smdkc210_hsmmc2_pdata __initdata = {
static struct s3c_sdhci_platdata smdkc210_hsmmc3_pdata __initdata = {
.cd_type = S3C_SDHCI_CD_GPIO,
- .ext_cd_gpio = S5PV310_GPK2(2),
+ .ext_cd_gpio = EXYNOS4_GPK2(2),
.ext_cd_gpio_invert = 1,
.clk_type = S3C_SDHCI_CLK_DIV_EXTERNAL,
};
static struct resource smdkc210_smsc911x_resources[] = {
[0] = {
- .start = S5PV310_PA_SROM_BANK(1),
- .end = S5PV310_PA_SROM_BANK(1) + SZ_64K - 1,
+ .start = EXYNOS4_PA_SROM_BANK(1),
+ .end = EXYNOS4_PA_SROM_BANK(1) + SZ_64K - 1,
.flags = IORESOURCE_MEM,
},
[1] = {
@@ -154,16 +154,16 @@ static struct platform_device *smdkc210_devices[] __initdata = {
&s3c_device_i2c1,
&s3c_device_rtc,
&s3c_device_wdt,
- &s5pv310_device_ac97,
- &s5pv310_device_i2s0,
- &s5pv310_device_pd[PD_MFC],
- &s5pv310_device_pd[PD_G3D],
- &s5pv310_device_pd[PD_LCD0],
- &s5pv310_device_pd[PD_LCD1],
- &s5pv310_device_pd[PD_CAM],
- &s5pv310_device_pd[PD_TV],
- &s5pv310_device_pd[PD_GPS],
- &s5pv310_device_sysmmu,
+ &exynos4_device_ac97,
+ &exynos4_device_i2s0,
+ &exynos4_device_pd[PD_MFC],
+ &exynos4_device_pd[PD_G3D],
+ &exynos4_device_pd[PD_LCD0],
+ &exynos4_device_pd[PD_LCD1],
+ &exynos4_device_pd[PD_CAM],
+ &exynos4_device_pd[PD_TV],
+ &exynos4_device_pd[PD_GPS],
+ &exynos4_device_sysmmu,
&samsung_asoc_dma,
&smdkc210_smsc911x,
};
@@ -216,8 +216,8 @@ static void __init smdkc210_machine_init(void)
MACHINE_START(SMDKC210, "SMDKC210")
/* Maintainer: Kukjin Kim <kgene.kim@samsung.com> */
.boot_params = S5P_PA_SDRAM + 0x100,
- .init_irq = s5pv310_init_irq,
+ .init_irq = exynos4_init_irq,
.map_io = smdkc210_map_io,
.init_machine = smdkc210_machine_init,
- .timer = &s5pv310_timer,
+ .timer = &exynos4_timer,
MACHINE_END
diff --git a/arch/arm/mach-s5pv310/mach-smdkv310.c b/arch/arm/mach-exynos4/mach-smdkv310.c
similarity index 87%
rename from arch/arm/mach-s5pv310/mach-smdkv310.c
rename to arch/arm/mach-exynos4/mach-smdkv310.c
index b1cddbf..07860a5 100644
--- a/arch/arm/mach-s5pv310/mach-smdkv310.c
+++ b/arch/arm/mach-exynos4/mach-smdkv310.c
@@ -1,7 +1,7 @@
-/* linux/arch/arm/mach-s5pv310/mach-smdkv310.c
+/* linux/arch/arm/mach-exynos4/mach-smdkv310.c
*
- * Copyright (c) 2010 Samsung Electronics Co., Ltd.
- * http://www.samsung.com/
+ * Copyright (c) 2010-2011 Samsung Electronics Co., Ltd.
+ * http://www.samsung.com
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
@@ -21,7 +21,7 @@
#include <plat/regs-serial.h>
#include <plat/regs-srom.h>
-#include <plat/s5pv310.h>
+#include <plat/exynos4.h>
#include <plat/cpu.h>
#include <plat/devs.h>
#include <plat/sdhci.h>
@@ -77,10 +77,10 @@ static struct s3c2410_uartcfg smdkv310_uartcfgs[] __initdata = {
static struct s3c_sdhci_platdata smdkv310_hsmmc0_pdata __initdata = {
.cd_type = S3C_SDHCI_CD_GPIO,
- .ext_cd_gpio = S5PV310_GPK0(2),
+ .ext_cd_gpio = EXYNOS4_GPK0(2),
.ext_cd_gpio_invert = 1,
.clk_type = S3C_SDHCI_CLK_DIV_EXTERNAL,
-#ifdef CONFIG_S5PV310_SDHCI_CH0_8BIT
+#ifdef CONFIG_EXYNOS4_SDHCI_CH0_8BIT
.max_width = 8,
.host_caps = MMC_CAP_8_BIT_DATA,
#endif
@@ -88,17 +88,17 @@ static struct s3c_sdhci_platdata smdkv310_hsmmc0_pdata __initdata = {
static struct s3c_sdhci_platdata smdkv310_hsmmc1_pdata __initdata = {
.cd_type = S3C_SDHCI_CD_GPIO,
- .ext_cd_gpio = S5PV310_GPK0(2),
+ .ext_cd_gpio = EXYNOS4_GPK0(2),
.ext_cd_gpio_invert = 1,
.clk_type = S3C_SDHCI_CLK_DIV_EXTERNAL,
};
static struct s3c_sdhci_platdata smdkv310_hsmmc2_pdata __initdata = {
.cd_type = S3C_SDHCI_CD_GPIO,
- .ext_cd_gpio = S5PV310_GPK2(2),
+ .ext_cd_gpio = EXYNOS4_GPK2(2),
.ext_cd_gpio_invert = 1,
.clk_type = S3C_SDHCI_CLK_DIV_EXTERNAL,
-#ifdef CONFIG_S5PV310_SDHCI_CH2_8BIT
+#ifdef CONFIG_EXYNOS4_SDHCI_CH2_8BIT
.max_width = 8,
.host_caps = MMC_CAP_8_BIT_DATA,
#endif
@@ -106,15 +106,15 @@ static struct s3c_sdhci_platdata smdkv310_hsmmc2_pdata __initdata = {
static struct s3c_sdhci_platdata smdkv310_hsmmc3_pdata __initdata = {
.cd_type = S3C_SDHCI_CD_GPIO,
- .ext_cd_gpio = S5PV310_GPK2(2),
+ .ext_cd_gpio = EXYNOS4_GPK2(2),
.ext_cd_gpio_invert = 1,
.clk_type = S3C_SDHCI_CLK_DIV_EXTERNAL,
};
static struct resource smdkv310_smsc911x_resources[] = {
[0] = {
- .start = S5PV310_PA_SROM_BANK(1),
- .end = S5PV310_PA_SROM_BANK(1) + SZ_64K - 1,
+ .start = EXYNOS4_PA_SROM_BANK(1),
+ .end = EXYNOS4_PA_SROM_BANK(1) + SZ_64K - 1,
.flags = IORESOURCE_MEM,
},
[1] = {
@@ -154,16 +154,16 @@ static struct platform_device *smdkv310_devices[] __initdata = {
&s3c_device_i2c1,
&s3c_device_rtc,
&s3c_device_wdt,
- &s5pv310_device_ac97,
- &s5pv310_device_i2s0,
- &s5pv310_device_pd[PD_MFC],
- &s5pv310_device_pd[PD_G3D],
- &s5pv310_device_pd[PD_LCD0],
- &s5pv310_device_pd[PD_LCD1],
- &s5pv310_device_pd[PD_CAM],
- &s5pv310_device_pd[PD_TV],
- &s5pv310_device_pd[PD_GPS],
- &s5pv310_device_sysmmu,
+ &exynos4_device_ac97,
+ &exynos4_device_i2s0,
+ &exynos4_device_pd[PD_MFC],
+ &exynos4_device_pd[PD_G3D],
+ &exynos4_device_pd[PD_LCD0],
+ &exynos4_device_pd[PD_LCD1],
+ &exynos4_device_pd[PD_CAM],
+ &exynos4_device_pd[PD_TV],
+ &exynos4_device_pd[PD_GPS],
+ &exynos4_device_sysmmu,
&samsung_asoc_dma,
&smdkv310_smsc911x,
};
@@ -217,8 +217,8 @@ MACHINE_START(SMDKV310, "SMDKV310")
/* Maintainer: Kukjin Kim <kgene.kim@samsung.com> */
/* Maintainer: Changhwan Youn <chaos.youn@samsung.com> */
.boot_params = S5P_PA_SDRAM + 0x100,
- .init_irq = s5pv310_init_irq,
+ .init_irq = exynos4_init_irq,
.map_io = smdkv310_map_io,
.init_machine = smdkv310_machine_init,
- .timer = &s5pv310_timer,
+ .timer = &exynos4_timer,
MACHINE_END
diff --git a/arch/arm/mach-s5pv310/mach-universal_c210.c b/arch/arm/mach-exynos4/mach-universal_c210.c
similarity index 93%
rename from arch/arm/mach-s5pv310/mach-universal_c210.c
rename to arch/arm/mach-exynos4/mach-universal_c210.c
index 36bc3cf..b22b6ef 100644
--- a/arch/arm/mach-s5pv310/mach-universal_c210.c
+++ b/arch/arm/mach-exynos4/mach-universal_c210.c
@@ -1,4 +1,4 @@
-/* linux/arch/arm/mach-s5pv310/mach-universal_c210.c
+/* linux/arch/arm/mach-exynos4/mach-universal_c210.c
*
* Copyright (c) 2010 Samsung Electronics Co., Ltd.
*
@@ -21,7 +21,7 @@
#include <asm/mach-types.h>
#include <plat/regs-serial.h>
-#include <plat/s5pv310.h>
+#include <plat/exynos4.h>
#include <plat/cpu.h>
#include <plat/devs.h>
#include <plat/sdhci.h>
@@ -72,35 +72,35 @@ static struct s3c2410_uartcfg universal_uartcfgs[] __initdata = {
static struct gpio_keys_button universal_gpio_keys_tables[] = {
{
.code = KEY_VOLUMEUP,
- .gpio = S5PV310_GPX2(0), /* XEINT16 */
+ .gpio = EXYNOS4_GPX2(0), /* XEINT16 */
.desc = "gpio-keys: KEY_VOLUMEUP",
.type = EV_KEY,
.active_low = 1,
.debounce_interval = 1,
}, {
.code = KEY_VOLUMEDOWN,
- .gpio = S5PV310_GPX2(1), /* XEINT17 */
+ .gpio = EXYNOS4_GPX2(1), /* XEINT17 */
.desc = "gpio-keys: KEY_VOLUMEDOWN",
.type = EV_KEY,
.active_low = 1,
.debounce_interval = 1,
}, {
.code = KEY_CONFIG,
- .gpio = S5PV310_GPX2(2), /* XEINT18 */
+ .gpio = EXYNOS4_GPX2(2), /* XEINT18 */
.desc = "gpio-keys: KEY_CONFIG",
.type = EV_KEY,
.active_low = 1,
.debounce_interval = 1,
}, {
.code = KEY_CAMERA,
- .gpio = S5PV310_GPX2(3), /* XEINT19 */
+ .gpio = EXYNOS4_GPX2(3), /* XEINT19 */
.desc = "gpio-keys: KEY_CAMERA",
.type = EV_KEY,
.active_low = 1,
.debounce_interval = 1,
}, {
.code = KEY_OK,
- .gpio = S5PV310_GPX3(5), /* XEINT29 */
+ .gpio = EXYNOS4_GPX3(5), /* XEINT29 */
.desc = "gpio-keys: KEY_OK",
.type = EV_KEY,
.active_low = 1,
@@ -146,7 +146,7 @@ static struct regulator_init_data mmc0_fixed_voltage_init_data = {
static struct fixed_voltage_config mmc0_fixed_voltage_config = {
.supply_name = "MASSMEMORY_EN",
.microvolts = 2800000,
- .gpio = S5PV310_GPE1(3),
+ .gpio = EXYNOS4_GPE1(3),
.enable_high = true,
.init_data = &mmc0_fixed_voltage_init_data,
};
@@ -165,7 +165,7 @@ static struct s3c_sdhci_platdata universal_hsmmc2_data __initdata = {
.host_caps = MMC_CAP_4_BIT_DATA |
MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED |
MMC_CAP_DISABLE,
- .ext_cd_gpio = S5PV310_GPX3(4), /* XEINT_28 */
+ .ext_cd_gpio = EXYNOS4_GPX3(4), /* XEINT_28 */
.ext_cd_gpio_invert = 1,
.cd_type = S3C_SDHCI_CD_GPIO,
.clk_type = S3C_SDHCI_CLK_DIV_EXTERNAL,
@@ -230,8 +230,8 @@ static void __init universal_machine_init(void)
MACHINE_START(UNIVERSAL_C210, "UNIVERSAL_C210")
/* Maintainer: Kyungmin Park <kyungmin.park@samsung.com> */
.boot_params = S5P_PA_SDRAM + 0x100,
- .init_irq = s5pv310_init_irq,
+ .init_irq = exynos4_init_irq,
.map_io = universal_map_io,
.init_machine = universal_machine_init,
- .timer = &s5pv310_timer,
+ .timer = &exynos4_timer,
MACHINE_END
--
1.7.1
^ permalink raw reply related [flat|nested] 20+ messages in thread* [PATCH 07/11] ARM: EXYNOS4: Update Kconfig and Makefile for the new ARCH_EXYNOS4
2011-02-14 8:22 [PATCH 0/11] ARM: EXYNOS4: Change ARCH name, ARCH_EXYNOS4 from ARCH_S5PV310 Kukjin Kim
` (5 preceding siblings ...)
2011-02-14 8:23 ` [PATCH 06/11] ARM: EXYNOS4: Moved board support files Kukjin Kim
@ 2011-02-14 8:23 ` Kukjin Kim
2011-02-14 8:23 ` [PATCH 08/11] ARM: exynos4_defconfig: Add defconfig for EXYNOS4 Kukjin Kim
` (5 subsequent siblings)
12 siblings, 0 replies; 20+ messages in thread
From: Kukjin Kim @ 2011-02-14 8:23 UTC (permalink / raw)
To: linux-arm-kernel
This patch changes the Kconfig and Makefile for the new ARCH_EXYNOS4.
It also updates arch/arm/Kconfig, Makeifile and arch/arm/mm/Kconfig
to include support for the new ARCH_EXYNOS4.
Cc: Russell King <rmk+kernel@arm.linux.org.uk>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
---
arch/arm/Kconfig | 12 +-
arch/arm/Makefile | 2 +-
arch/arm/{mach-s5pv310 => mach-exynos4}/Kconfig | 105 +++++++++----------
arch/arm/mach-exynos4/Makefile | 43 ++++++++
.../{mach-s5pv310 => mach-exynos4}/Makefile.boot | 0
arch/arm/mach-s5pv310/Makefile | 43 --------
arch/arm/mm/Kconfig | 2 +-
arch/arm/plat-s5p/Kconfig | 8 +-
8 files changed, 105 insertions(+), 110 deletions(-)
rename arch/arm/{mach-s5pv310 => mach-exynos4}/Kconfig (58%)
create mode 100644 arch/arm/mach-exynos4/Makefile
rename arch/arm/{mach-s5pv310 => mach-exynos4}/Makefile.boot (100%)
delete mode 100644 arch/arm/mach-s5pv310/Makefile
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 5cff165..4163502 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -760,8 +760,8 @@ config ARCH_S5PV210
help
Samsung S5PV210/S5PC110 series based systems
-config ARCH_S5PV310
- bool "Samsung S5PV310/S5PC210"
+config ARCH_EXYNOS4
+ bool "Samsung EXYNOS4"
select CPU_V7
select ARCH_SPARSEMEM_ENABLE
select GENERIC_GPIO
@@ -772,7 +772,7 @@ config ARCH_S5PV310
select HAVE_S3C2410_I2C if I2C
select HAVE_S3C2410_WATCHDOG if WATCHDOG
help
- Samsung S5PV310 series based systems
+ Samsung EXYNOS4 series based systems
config ARCH_SHARK
bool "Shark"
@@ -991,7 +991,7 @@ source "arch/arm/mach-s5pc100/Kconfig"
source "arch/arm/mach-s5pv210/Kconfig"
-source "arch/arm/mach-s5pv310/Kconfig"
+source "arch/arm/mach-exynos4/Kconfig"
source "arch/arm/mach-shmobile/Kconfig"
@@ -1253,7 +1253,7 @@ config SMP
depends on GENERIC_CLOCKEVENTS
depends on REALVIEW_EB_ARM11MP || REALVIEW_EB_A9MP || \
MACH_REALVIEW_PB11MP || MACH_REALVIEW_PBX || ARCH_OMAP4 || \
- ARCH_S5PV310 || ARCH_TEGRA || ARCH_U8500 || ARCH_VEXPRESS_CA9X4 || \
+ ARCH_EXYNOS4 || ARCH_TEGRA || ARCH_U8500 || ARCH_VEXPRESS_CA9X4 || \
ARCH_MSM_SCORPIONMP || ARCH_SHMOBILE
select USE_GENERIC_SMP_HELPERS
select HAVE_ARM_SCU if !ARCH_MSM_SCORPIONMP
@@ -1353,7 +1353,7 @@ source kernel/Kconfig.preempt
config HZ
int
default 200 if ARCH_EBSA110 || ARCH_S3C2410 || ARCH_S5P64X0 || \
- ARCH_S5P6442 || ARCH_S5PV210 || ARCH_S5PV310
+ ARCH_S5P6442 || ARCH_S5PV210 || ARCH_EXYNOS4
default OMAP_32K_TIMER_HZ if ARCH_OMAP && OMAP_32K_TIMER
default AT91_TIMER_HZ if ARCH_AT91
default SHMOBILE_TIMER_HZ if ARCH_SHMOBILE
diff --git a/arch/arm/Makefile b/arch/arm/Makefile
index c22c1ad..0ff5ddb 100644
--- a/arch/arm/Makefile
+++ b/arch/arm/Makefile
@@ -178,7 +178,7 @@ machine-$(CONFIG_ARCH_S5P64X0) := s5p64x0
machine-$(CONFIG_ARCH_S5P6442) := s5p6442
machine-$(CONFIG_ARCH_S5PC100) := s5pc100
machine-$(CONFIG_ARCH_S5PV210) := s5pv210
-machine-$(CONFIG_ARCH_S5PV310) := s5pv310
+machine-$(CONFIG_ARCH_EXYNOS4) := exynos4
machine-$(CONFIG_ARCH_SA1100) := sa1100
machine-$(CONFIG_ARCH_SHARK) := shark
machine-$(CONFIG_ARCH_SHMOBILE) := shmobile
diff --git a/arch/arm/mach-s5pv310/Kconfig b/arch/arm/mach-exynos4/Kconfig
similarity index 58%
rename from arch/arm/mach-s5pv310/Kconfig
rename to arch/arm/mach-exynos4/Kconfig
index b2a9acc..ad03840 100644
--- a/arch/arm/mach-s5pv310/Kconfig
+++ b/arch/arm/mach-exynos4/Kconfig
@@ -1,83 +1,83 @@
-# arch/arm/mach-s5pv310/Kconfig
+# arch/arm/mach-exynos4/Kconfig
#
-# Copyright (c) 2010 Samsung Electronics Co., Ltd.
+# Copyright (c) 2010-2011 Samsung Electronics Co., Ltd.
# http://www.samsung.com/
#
# Licensed under GPLv2
-# Configuration options for the S5PV310
+# Configuration options for the EXYNOS4
-if ARCH_S5PV310
+if ARCH_EXYNOS4
-config CPU_S5PV310
+config CPU_EXYNOS4210
bool
select S3C_PL330_DMA
help
- Enable S5PV310 CPU support
+ Enable EXYNOS4210 CPU support
-config S5PV310_DEV_PD
+config EXYNOS4_DEV_PD
bool
help
Compile in platform device definitions for Power Domain
-config S5PV310_SETUP_I2C1
+config EXYNOS4_DEV_SYSMMU
+ bool
+ help
+ Common setup code for SYSTEM MMU in EXYNOS4
+
+config EXYNOS4_SETUP_I2C1
bool
help
Common setup code for i2c bus 1.
-config S5PV310_SETUP_I2C2
+config EXYNOS4_SETUP_I2C2
bool
help
Common setup code for i2c bus 2.
-config S5PV310_SETUP_I2C3
+config EXYNOS4_SETUP_I2C3
bool
help
Common setup code for i2c bus 3.
-config S5PV310_SETUP_I2C4
+config EXYNOS4_SETUP_I2C4
bool
help
Common setup code for i2c bus 4.
-config S5PV310_SETUP_I2C5
+config EXYNOS4_SETUP_I2C5
bool
help
Common setup code for i2c bus 5.
-config S5PV310_SETUP_I2C6
+config EXYNOS4_SETUP_I2C6
bool
help
Common setup code for i2c bus 6.
-config S5PV310_SETUP_I2C7
+config EXYNOS4_SETUP_I2C7
bool
help
Common setup code for i2c bus 7.
-config S5PV310_SETUP_SDHCI
+config EXYNOS4_SETUP_SDHCI
bool
- select S5PV310_SETUP_SDHCI_GPIO
+ select EXYNOS4_SETUP_SDHCI_GPIO
help
- Internal helper functions for S5PV310 based SDHCI systems.
+ Internal helper functions for EXYNOS4 based SDHCI systems.
-config S5PV310_SETUP_SDHCI_GPIO
+config EXYNOS4_SETUP_SDHCI_GPIO
bool
help
Common setup code for SDHCI gpio.
-config S5PV310_DEV_SYSMMU
- bool
- help
- Common setup code for SYSTEM MMU in S5PV310
-
# machine support
-menu "S5PC210 Machines"
+menu "EXYNOS4 Machines"
config MACH_SMDKC210
bool "SMDKC210"
- select CPU_S5PV310
+ select CPU_EXYNOS4210
select S3C_DEV_RTC
select S3C_DEV_WDT
select S3C_DEV_I2C1
@@ -85,35 +85,16 @@ config MACH_SMDKC210
select S3C_DEV_HSMMC1
select S3C_DEV_HSMMC2
select S3C_DEV_HSMMC3
- select S5PV310_DEV_PD
- select S5PV310_SETUP_I2C1
- select S5PV310_SETUP_SDHCI
- select S5PV310_DEV_SYSMMU
+ select EXYNOS4_DEV_PD
+ select EXYNOS4_DEV_SYSMMU
+ select EXYNOS4_SETUP_I2C1
+ select EXYNOS4_SETUP_SDHCI
help
Machine support for Samsung SMDKC210
- S5PC210(MCP) is one of package option of S5PV310
-
-config MACH_UNIVERSAL_C210
- bool "Mobile UNIVERSAL_C210 Board"
- select CPU_S5PV310
- select S5P_DEV_ONENAND
- select S3C_DEV_HSMMC
- select S3C_DEV_HSMMC2
- select S3C_DEV_HSMMC3
- select S5PV310_SETUP_SDHCI
- select S3C_DEV_I2C1
- select S5PV310_SETUP_I2C1
- help
- Machine support for Samsung Mobile Universal S5PC210 Reference
- Board. S5PC210(MCP) is one of package option of S5PV310
-
-endmenu
-
-menu "S5PV310 Machines"
config MACH_SMDKV310
bool "SMDKV310"
- select CPU_S5PV310
+ select CPU_EXYNOS4210
select S3C_DEV_RTC
select S3C_DEV_WDT
select S3C_DEV_I2C1
@@ -121,26 +102,40 @@ config MACH_SMDKV310
select S3C_DEV_HSMMC1
select S3C_DEV_HSMMC2
select S3C_DEV_HSMMC3
- select S5PV310_DEV_PD
- select S5PV310_DEV_SYSMMU
- select S5PV310_SETUP_I2C1
- select S5PV310_SETUP_SDHCI
+ select EXYNOS4_DEV_PD
+ select EXYNOS4_DEV_SYSMMU
+ select EXYNOS4_SETUP_I2C1
+ select EXYNOS4_SETUP_SDHCI
help
Machine support for Samsung SMDKV310
+config MACH_UNIVERSAL_C210
+ bool "Mobile UNIVERSAL_C210 Board"
+ select CPU_EXYNOS4210
+ select S3C_DEV_HSMMC
+ select S3C_DEV_HSMMC2
+ select S3C_DEV_HSMMC3
+ select S3C_DEV_I2C1
+ select S5P_DEV_ONENAND
+ select EXYNOS4_SETUP_I2C1
+ select EXYNOS4_SETUP_SDHCI
+ help
+ Machine support for Samsung Mobile Universal S5PC210 Reference
+ Board.
+
endmenu
comment "Configuration for HSMMC bus width"
menu "Use 8-bit bus width"
-config S5PV310_SDHCI_CH0_8BIT
+config EXYNOS4_SDHCI_CH0_8BIT
bool "Channel 0 with 8-bit bus"
help
Support HSMMC Channel 0 8-bit bus.
If selected, Channel 1 is disabled.
-config S5PV310_SDHCI_CH2_8BIT
+config EXYNOS4_SDHCI_CH2_8BIT
bool "Channel 2 with 8-bit bus"
help
Support HSMMC Channel 2 8-bit bus.
diff --git a/arch/arm/mach-exynos4/Makefile b/arch/arm/mach-exynos4/Makefile
new file mode 100644
index 0000000..0558235
--- /dev/null
+++ b/arch/arm/mach-exynos4/Makefile
@@ -0,0 +1,43 @@
+# arch/arm/mach-exynos4/Makefile
+#
+# Copyright (c) 2010-2011 Samsung Electronics Co., Ltd.
+# http://www.samsung.com/
+#
+# Licensed under GPLv2
+
+obj-y :=
+obj-m :=
+obj-n :=
+obj- :=
+
+# Core support for EXYNOS4 system
+
+obj-$(CONFIG_CPU_EXYNOS4210) += cpu.o init.o clock.o irq-combiner.o
+obj-$(CONFIG_CPU_EXYNOS4210) += setup-i2c0.o time.o gpiolib.o irq-eint.o dma.o
+obj-$(CONFIG_CPU_FREQ) += cpufreq.o
+
+obj-$(CONFIG_SMP) += platsmp.o headsmp.o
+obj-$(CONFIG_LOCAL_TIMERS) += localtimer.o
+obj-$(CONFIG_HOTPLUG_CPU) += hotplug.o
+
+# machine support
+
+obj-$(CONFIG_MACH_SMDKC210) += mach-smdkc210.o
+obj-$(CONFIG_MACH_SMDKV310) += mach-smdkv310.o
+obj-$(CONFIG_MACH_UNIVERSAL_C210) += mach-universal_c210.o
+
+# device support
+
+obj-y += dev-audio.o
+obj-$(CONFIG_EXYNOS4_DEV_PD) += dev-pd.o
+obj-$(CONFIG_EXYNOS4_DEV_SYSMMU) += dev-sysmmu.o
+
+obj-$(CONFIG_EXYNOS4_SETUP_I2C1) += setup-i2c1.o
+obj-$(CONFIG_EXYNOS4_SETUP_I2C2) += setup-i2c2.o
+obj-$(CONFIG_EXYNOS4_SETUP_I2C3) += setup-i2c3.o
+obj-$(CONFIG_EXYNOS4_SETUP_I2C4) += setup-i2c4.o
+obj-$(CONFIG_EXYNOS4_SETUP_I2C5) += setup-i2c5.o
+obj-$(CONFIG_EXYNOS4_SETUP_I2C6) += setup-i2c6.o
+obj-$(CONFIG_EXYNOS4_SETUP_I2C7) += setup-i2c7.o
+obj-$(CONFIG_EXYNOS4_SETUP_SDHCI) += setup-sdhci.o
+obj-$(CONFIG_EXYNOS4_SETUP_SDHCI_GPIO) += setup-sdhci-gpio.o
diff --git a/arch/arm/mach-s5pv310/Makefile.boot b/arch/arm/mach-exynos4/Makefile.boot
similarity index 100%
rename from arch/arm/mach-s5pv310/Makefile.boot
rename to arch/arm/mach-exynos4/Makefile.boot
diff --git a/arch/arm/mach-s5pv310/Makefile b/arch/arm/mach-s5pv310/Makefile
deleted file mode 100644
index 036fb38..0000000
--- a/arch/arm/mach-s5pv310/Makefile
+++ /dev/null
@@ -1,43 +0,0 @@
-# arch/arm/mach-s5pv310/Makefile
-#
-# Copyright (c) 2010 Samsung Electronics Co., Ltd.
-# http://www.samsung.com/
-#
-# Licensed under GPLv2
-
-obj-y :=
-obj-m :=
-obj-n :=
-obj- :=
-
-# Core support for S5PV310 system
-
-obj-$(CONFIG_CPU_S5PV310) += cpu.o init.o clock.o irq-combiner.o
-obj-$(CONFIG_CPU_S5PV310) += setup-i2c0.o time.o gpiolib.o irq-eint.o dma.o
-obj-$(CONFIG_CPU_FREQ) += cpufreq.o
-
-obj-$(CONFIG_SMP) += platsmp.o headsmp.o
-obj-$(CONFIG_LOCAL_TIMERS) += localtimer.o
-obj-$(CONFIG_HOTPLUG_CPU) += hotplug.o
-
-# machine support
-
-obj-$(CONFIG_MACH_SMDKC210) += mach-smdkc210.o
-obj-$(CONFIG_MACH_SMDKV310) += mach-smdkv310.o
-obj-$(CONFIG_MACH_UNIVERSAL_C210) += mach-universal_c210.o
-
-# device support
-
-obj-y += dev-audio.o
-obj-$(CONFIG_S5PV310_DEV_PD) += dev-pd.o
-obj-$(CONFIG_S5PV310_DEV_SYSMMU) += dev-sysmmu.o
-
-obj-$(CONFIG_S5PV310_SETUP_I2C1) += setup-i2c1.o
-obj-$(CONFIG_S5PV310_SETUP_I2C2) += setup-i2c2.o
-obj-$(CONFIG_S5PV310_SETUP_I2C3) += setup-i2c3.o
-obj-$(CONFIG_S5PV310_SETUP_I2C4) += setup-i2c4.o
-obj-$(CONFIG_S5PV310_SETUP_I2C5) += setup-i2c5.o
-obj-$(CONFIG_S5PV310_SETUP_I2C6) += setup-i2c6.o
-obj-$(CONFIG_S5PV310_SETUP_I2C7) += setup-i2c7.o
-obj-$(CONFIG_S5PV310_SETUP_SDHCI) += setup-sdhci.o
-obj-$(CONFIG_S5PV310_SETUP_SDHCI_GPIO) += setup-sdhci-gpio.o
diff --git a/arch/arm/mm/Kconfig b/arch/arm/mm/Kconfig
index 9d30c6f..f93f675 100644
--- a/arch/arm/mm/Kconfig
+++ b/arch/arm/mm/Kconfig
@@ -812,7 +812,7 @@ config CACHE_L2X0
bool "Enable the L2x0 outer cache controller"
depends on REALVIEW_EB_ARM11MP || MACH_REALVIEW_PB11MP || MACH_REALVIEW_PB1176 || \
REALVIEW_EB_A9MP || ARCH_MX35 || ARCH_MX31 || MACH_REALVIEW_PBX || \
- ARCH_NOMADIK || ARCH_OMAP4 || ARCH_S5PV310 || ARCH_TEGRA || \
+ ARCH_NOMADIK || ARCH_OMAP4 || ARCH_EXYNOS4 || ARCH_TEGRA || \
ARCH_U8500 || ARCH_VEXPRESS_CA9X4 || ARCH_SHMOBILE
default y
select OUTER_CACHE
diff --git a/arch/arm/plat-s5p/Kconfig b/arch/arm/plat-s5p/Kconfig
index 557f8c5..6390ac7 100644
--- a/arch/arm/plat-s5p/Kconfig
+++ b/arch/arm/plat-s5p/Kconfig
@@ -7,10 +7,10 @@
config PLAT_S5P
bool
- depends on (ARCH_S5P64X0 || ARCH_S5P6442 || ARCH_S5PC100 || ARCH_S5PV210 || ARCH_S5PV310)
+ depends on (ARCH_S5P64X0 || ARCH_S5P6442 || ARCH_S5PC100 || ARCH_S5PV210 || ARCH_EXYNOS4)
default y
- select ARM_VIC if !ARCH_S5PV310
- select ARM_GIC if ARCH_S5PV310
+ select ARM_VIC if !ARCH_EXYNOS4
+ select ARM_GIC if ARCH_EXYNOS4
select NO_IOPORT
select ARCH_REQUIRE_GPIOLIB
select S3C_GPIO_TRACK
@@ -41,7 +41,7 @@ comment "System MMU"
config S5P_SYSTEM_MMU
bool "S5P SYSTEM MMU"
- depends on ARCH_S5PV310
+ depends on ARCH_EXYNOS4
help
Say Y here if you want to enable System MMU
--
1.7.1
^ permalink raw reply related [flat|nested] 20+ messages in thread* [PATCH 08/11] ARM: exynos4_defconfig: Add defconfig for EXYNOS4
2011-02-14 8:22 [PATCH 0/11] ARM: EXYNOS4: Change ARCH name, ARCH_EXYNOS4 from ARCH_S5PV310 Kukjin Kim
` (6 preceding siblings ...)
2011-02-14 8:23 ` [PATCH 07/11] ARM: EXYNOS4: Update Kconfig and Makefile for the new ARCH_EXYNOS4 Kukjin Kim
@ 2011-02-14 8:23 ` Kukjin Kim
2011-02-14 8:23 ` [PATCH 09/11] mtd: OneNAND: Change dependency of ARCH_EXYNOS4 Kukjin Kim
` (4 subsequent siblings)
12 siblings, 0 replies; 20+ messages in thread
From: Kukjin Kim @ 2011-02-14 8:23 UTC (permalink / raw)
To: linux-arm-kernel
Cc: Russell King <rmk+kernel@arm.linux.org.uk>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
---
arch/arm/configs/exynos4_defconfig | 70 ++++++++++++++++++++++++++++++++++++
1 files changed, 70 insertions(+), 0 deletions(-)
create mode 100644 arch/arm/configs/exynos4_defconfig
diff --git a/arch/arm/configs/exynos4_defconfig b/arch/arm/configs/exynos4_defconfig
new file mode 100644
index 0000000..2ffba24
--- /dev/null
+++ b/arch/arm/configs/exynos4_defconfig
@@ -0,0 +1,70 @@
+CONFIG_EXPERIMENTAL=y
+CONFIG_BLK_DEV_INITRD=y
+CONFIG_KALLSYMS_ALL=y
+CONFIG_MODULES=y
+CONFIG_MODULE_UNLOAD=y
+# CONFIG_BLK_DEV_BSG is not set
+CONFIG_ARCH_EXYNOS4=y
+CONFIG_S3C_LOWLEVEL_UART_PORT=1
+CONFIG_MACH_SMDKC210=y
+CONFIG_MACH_SMDKV310=y
+CONFIG_MACH_UNIVERSAL_C210=y
+CONFIG_NO_HZ=y
+CONFIG_HIGH_RES_TIMERS=y
+CONFIG_SMP=y
+CONFIG_NR_CPUS=2
+CONFIG_HOTPLUG_CPU=y
+CONFIG_PREEMPT=y
+CONFIG_AEABI=y
+CONFIG_CMDLINE="root=/dev/ram0 rw ramdisk=8192 initrd=0x41000000,8M console=ttySAC1,115200 init=/linuxrc mem=256M"
+CONFIG_VFP=y
+CONFIG_NEON=y
+CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
+CONFIG_BLK_DEV_LOOP=y
+CONFIG_BLK_DEV_RAM=y
+CONFIG_BLK_DEV_RAM_SIZE=8192
+CONFIG_SCSI=y
+CONFIG_BLK_DEV_SD=y
+CONFIG_CHR_DEV_SG=y
+CONFIG_INPUT_EVDEV=y
+# CONFIG_INPUT_KEYBOARD is not set
+# CONFIG_INPUT_MOUSE is not set
+CONFIG_INPUT_TOUCHSCREEN=y
+CONFIG_SERIAL_8250=y
+CONFIG_SERIAL_SAMSUNG=y
+CONFIG_SERIAL_SAMSUNG_CONSOLE=y
+CONFIG_HW_RANDOM=y
+CONFIG_I2C=y
+# CONFIG_HWMON is not set
+# CONFIG_MFD_SUPPORT is not set
+# CONFIG_HID_SUPPORT is not set
+# CONFIG_USB_SUPPORT is not set
+CONFIG_EXT2_FS=y
+CONFIG_MSDOS_FS=y
+CONFIG_VFAT_FS=y
+CONFIG_TMPFS=y
+CONFIG_TMPFS_POSIX_ACL=y
+CONFIG_CRAMFS=y
+CONFIG_ROMFS_FS=y
+CONFIG_PARTITION_ADVANCED=y
+CONFIG_BSD_DISKLABEL=y
+CONFIG_SOLARIS_X86_PARTITION=y
+CONFIG_NLS_CODEPAGE_437=y
+CONFIG_NLS_ASCII=y
+CONFIG_NLS_ISO8859_1=y
+CONFIG_MAGIC_SYSRQ=y
+CONFIG_DEBUG_KERNEL=y
+CONFIG_DETECT_HUNG_TASK=y
+CONFIG_DEBUG_RT_MUTEXES=y
+CONFIG_DEBUG_SPINLOCK=y
+CONFIG_DEBUG_MUTEXES=y
+CONFIG_DEBUG_SPINLOCK_SLEEP=y
+CONFIG_DEBUG_INFO=y
+# CONFIG_RCU_CPU_STALL_DETECTOR is not set
+CONFIG_SYSCTL_SYSCALL_CHECK=y
+CONFIG_DEBUG_USER=y
+CONFIG_DEBUG_ERRORS=y
+CONFIG_DEBUG_LL=y
+CONFIG_EARLY_PRINTK=y
+CONFIG_DEBUG_S3C_UART=1
+CONFIG_CRC_CCITT=y
--
1.7.1
^ permalink raw reply related [flat|nested] 20+ messages in thread* [PATCH 09/11] mtd: OneNAND: Change dependency of ARCH_EXYNOS4
2011-02-14 8:22 [PATCH 0/11] ARM: EXYNOS4: Change ARCH name, ARCH_EXYNOS4 from ARCH_S5PV310 Kukjin Kim
` (7 preceding siblings ...)
2011-02-14 8:23 ` [PATCH 08/11] ARM: exynos4_defconfig: Add defconfig for EXYNOS4 Kukjin Kim
@ 2011-02-14 8:23 ` Kukjin Kim
2011-02-14 8:23 ` [PATCH 10/11] ASoC: " Kukjin Kim
` (3 subsequent siblings)
12 siblings, 0 replies; 20+ messages in thread
From: Kukjin Kim @ 2011-02-14 8:23 UTC (permalink / raw)
To: linux-arm-kernel
This patch updates EXYNOS4 OneNAND support according to the change of
ARCH name, EXYNOS4.
Cc: Kyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
---
drivers/mtd/onenand/Kconfig | 2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
diff --git a/drivers/mtd/onenand/Kconfig b/drivers/mtd/onenand/Kconfig
index 4dbd0f5..4f42619 100644
--- a/drivers/mtd/onenand/Kconfig
+++ b/drivers/mtd/onenand/Kconfig
@@ -32,7 +32,7 @@ config MTD_ONENAND_OMAP2
config MTD_ONENAND_SAMSUNG
tristate "OneNAND on Samsung SOC controller support"
- depends on ARCH_S3C64XX || ARCH_S5PC100 || ARCH_S5PV210 || ARCH_S5PV310
+ depends on ARCH_S3C64XX || ARCH_S5PC100 || ARCH_S5PV210 || ARCH_EXYNOS4
help
Support for a OneNAND flash device connected to an Samsung SOC.
S3C64XX/S5PC100 use command mapping method.
--
1.7.1
^ permalink raw reply related [flat|nested] 20+ messages in thread* [PATCH 10/11] ASoC: Change dependency of ARCH_EXYNOS4
2011-02-14 8:22 [PATCH 0/11] ARM: EXYNOS4: Change ARCH name, ARCH_EXYNOS4 from ARCH_S5PV310 Kukjin Kim
` (8 preceding siblings ...)
2011-02-14 8:23 ` [PATCH 09/11] mtd: OneNAND: Change dependency of ARCH_EXYNOS4 Kukjin Kim
@ 2011-02-14 8:23 ` Kukjin Kim
2011-02-14 9:54 ` Jassi Brar
2011-02-14 15:59 ` Mark Brown
2011-02-14 8:23 ` [PATCH 11/11] tty: " Kukjin Kim
` (2 subsequent siblings)
12 siblings, 2 replies; 20+ messages in thread
From: Kukjin Kim @ 2011-02-14 8:23 UTC (permalink / raw)
To: linux-arm-kernel
This patch changes dependency of ARCH_EXYNOS4 from ARCH_S5PV310
according to the change of ARCH name, EXYNOS4.
Cc: Jassi Brar <jassi.brar@samsung.com>
Cc: Liam Girdwood <lrg@slimlogic.co.uk>
Cc: Mark Brown <broonie@opensource.wolfsonmicro.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
---
sound/soc/samsung/Kconfig | 2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
diff --git a/sound/soc/samsung/Kconfig b/sound/soc/samsung/Kconfig
index a6a6b5f..d6713d5 100644
--- a/sound/soc/samsung/Kconfig
+++ b/sound/soc/samsung/Kconfig
@@ -1,6 +1,6 @@
config SND_SOC_SAMSUNG
tristate "ASoC support for Samsung"
- depends on ARCH_S3C2410 || ARCH_S3C64XX || ARCH_S5PC100 || ARCH_S5PV210 || ARCH_S5P64X0 || ARCH_S5P6442 || ARCH_S5PV310
+ depends on ARCH_S3C2410 || ARCH_S3C64XX || ARCH_S5PC100 || ARCH_S5PV210 || ARCH_S5P64X0 || ARCH_S5P6442 || ARCH_EXYNOS4
select S3C64XX_DMA if ARCH_S3C64XX
select S3C2410_DMA if ARCH_S3C2410
help
--
1.7.1
^ permalink raw reply related [flat|nested] 20+ messages in thread* [PATCH 10/11] ASoC: Change dependency of ARCH_EXYNOS4
2011-02-14 8:23 ` [PATCH 10/11] ASoC: " Kukjin Kim
@ 2011-02-14 9:54 ` Jassi Brar
2011-02-14 15:59 ` Mark Brown
1 sibling, 0 replies; 20+ messages in thread
From: Jassi Brar @ 2011-02-14 9:54 UTC (permalink / raw)
To: linux-arm-kernel
On Mon, Feb 14, 2011 at 5:23 PM, Kukjin Kim <kgene.kim@samsung.com> wrote:
> This patch changes dependency of ARCH_EXYNOS4 from ARCH_S5PV310
> according to the change of ARCH name, EXYNOS4.
Acked-by: Jassi Brar <jassi.brar@samsung.com>
^ permalink raw reply [flat|nested] 20+ messages in thread
* [PATCH 10/11] ASoC: Change dependency of ARCH_EXYNOS4
2011-02-14 8:23 ` [PATCH 10/11] ASoC: " Kukjin Kim
2011-02-14 9:54 ` Jassi Brar
@ 2011-02-14 15:59 ` Mark Brown
1 sibling, 0 replies; 20+ messages in thread
From: Mark Brown @ 2011-02-14 15:59 UTC (permalink / raw)
To: linux-arm-kernel
On Mon, Feb 14, 2011 at 05:23:06PM +0900, Kukjin Kim wrote:
> This patch changes dependency of ARCH_EXYNOS4 from ARCH_S5PV310
> according to the change of ARCH name, EXYNOS4.
Acked-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
^ permalink raw reply [flat|nested] 20+ messages in thread
* [PATCH 11/11] tty: Change dependency of ARCH_EXYNOS4
2011-02-14 8:22 [PATCH 0/11] ARM: EXYNOS4: Change ARCH name, ARCH_EXYNOS4 from ARCH_S5PV310 Kukjin Kim
` (9 preceding siblings ...)
2011-02-14 8:23 ` [PATCH 10/11] ASoC: " Kukjin Kim
@ 2011-02-14 8:23 ` Kukjin Kim
2011-02-14 11:16 ` [PATCH 0/11] ARM: EXYNOS4: Change ARCH name, ARCH_EXYNOS4 from ARCH_S5PV310 Kyungmin Park
2011-02-18 1:27 ` Kukjin Kim
12 siblings, 0 replies; 20+ messages in thread
From: Kukjin Kim @ 2011-02-14 8:23 UTC (permalink / raw)
To: linux-arm-kernel
This patch changes dependency of ARCH_EXYNOS4 from ARCH_S5PV310
according to the change of ARCH name, EXYNOS4.
Cc: Ben Dooks <ben-linux@fluff.org>
Cc: Greg Kroah-Hartman <gregkh@suse.de>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
---
drivers/tty/serial/Kconfig | 4 ++--
1 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/tty/serial/Kconfig b/drivers/tty/serial/Kconfig
index 2b83346..8f144d0 100644
--- a/drivers/tty/serial/Kconfig
+++ b/drivers/tty/serial/Kconfig
@@ -537,8 +537,8 @@ config SERIAL_S3C6400
config SERIAL_S5PV210
tristate "Samsung S5PV210 Serial port support"
- depends on SERIAL_SAMSUNG && (CPU_S5PV210 || CPU_S5P6442 || CPU_S5PV310)
- select SERIAL_SAMSUNG_UARTS_4 if (CPU_S5PV210 || CPU_S5PV310)
+ depends on SERIAL_SAMSUNG && (CPU_S5PV210 || CPU_S5P6442 || CPU_EXYNOS4210)
+ select SERIAL_SAMSUNG_UARTS_4 if (CPU_S5PV210 || CPU_EXYNOS4210)
default y
help
Serial port support for Samsung's S5P Family of SoC's
--
1.7.1
^ permalink raw reply related [flat|nested] 20+ messages in thread* [PATCH 0/11] ARM: EXYNOS4: Change ARCH name, ARCH_EXYNOS4 from ARCH_S5PV310
2011-02-14 8:22 [PATCH 0/11] ARM: EXYNOS4: Change ARCH name, ARCH_EXYNOS4 from ARCH_S5PV310 Kukjin Kim
` (10 preceding siblings ...)
2011-02-14 8:23 ` [PATCH 11/11] tty: " Kukjin Kim
@ 2011-02-14 11:16 ` Kyungmin Park
2011-02-14 23:53 ` Sangbeom Kim
2011-02-18 1:27 ` Kukjin Kim
12 siblings, 1 reply; 20+ messages in thread
From: Kyungmin Park @ 2011-02-14 11:16 UTC (permalink / raw)
To: linux-arm-kernel
Hi,
Wow, fast move, but need to more explanation.
what's the exact meaning of exynos4210?
Exynos4 is prefix and remaining are variants?
Now you changed all s5pv310 to exynos4. if new exynos4xxx chip are
comes then how to handle this one?
e.g., exynos4220 or later.
it's also conflict with mach-exynos4. do you handle all exynos4 series
at this mach directory?
historically there's no rules of the base RAM address at least samsung chips.
Thank you,
Kyungmin Park
On Mon, Feb 14, 2011 at 5:22 PM, Kukjin Kim <kgene.kim@samsung.com> wrote:
> This patch set changes to ARCH_EXYNOS4 from ARCH_S5PV310 for supporting Samsung's
> new brand name EXYNOS. Samsung officially announced about the brand name of EXYNOS
> at MWC 2011 and The EXYNOS4 integrates a ARM Cortex A9 microporcessor with several
> other peripherals to support features such as multimedai, storage, graphics and gaming.
> Especially, the EXYNOS4210 CPU which is one of EXYNOS4 SoC series can be used in
> products such as Mobile devices.
>
> This patch set consists of the following patches.
>
> [PATCH 01/11] ARM: EXYNOS4: Add EXYNOS4 CPU initialization support
> [PATCH 02/11] ARM: EXYNOS4: Update Clock part
> [PATCH 03/11] ARM: EXYNOS4: Update IRQ part
> [PATCH 04/11] ARM: EXYNOS4: Update Timer part
> [PATCH 05/11] ARM: EXYNOS4: Update device support
> [PATCH 06/11] ARM: EXYNOS4: Moved board support files
> [PATCH 07/11] ARM: EXYNOS4: Update Kconfig and Makefile for the new ARCH_EXYNOS4
> [PATCH 08/11] ARM: exynos4_defconfig: Add defconfig for EXYNOS4
> [PATCH 09/11] mtd: OneNAND: Change dependency of ARCH_EXYNOS4
> [PATCH 10/11] ASoC: Change dependency of ARCH_EXYNOS4
> [PATCH 11/11] tty: Change dependency of ARCH_EXYNOS4
>
> _______________________________________________
> linux-arm-kernel mailing list
> linux-arm-kernel at lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
>
^ permalink raw reply [flat|nested] 20+ messages in thread* [PATCH 0/11] ARM: EXYNOS4: Change ARCH name, ARCH_EXYNOS4 from ARCH_S5PV310
2011-02-14 11:16 ` [PATCH 0/11] ARM: EXYNOS4: Change ARCH name, ARCH_EXYNOS4 from ARCH_S5PV310 Kyungmin Park
@ 2011-02-14 23:53 ` Sangbeom Kim
2011-02-15 0:18 ` Kyungmin Park
0 siblings, 1 reply; 20+ messages in thread
From: Sangbeom Kim @ 2011-02-14 23:53 UTC (permalink / raw)
To: linux-arm-kernel
Hi,
I answer your questions in detail.
> On Monday, February 14, 2011 8:16 PM, Kyungmin Park wrote:
>
> Hi,
>
> Wow, fast move, but need to more explanation.
> what's the exact meaning of exynos4210?
> Exynos4 is prefix and remaining are variants?
Exynos4210 means below.
1st digit means ARM core version. In this case, 4 means Cortex A9.
(If we release cortex A15, it will be Exynos5xxx)
2nd digit means number of core. 2 mean dual core.
3rd digit means application category(LSI internal category).
4th digit means design rule (generation or shrink version)
> Now you changed all s5pv310 to exynos4. if new exynos4xxx chip are
> comes then how to handle this one?
> e.g., exynos4220 or later.
> it's also conflict with mach-exynos4. do you handle all exynos4 series
> at this mach directory?
> historically there's no rules of the base RAM address at least samsung
> chips.
Yes, we will handle all exynos4 series at mach-exynos4 directory.
In the past, there is no rule.
But now, we are making consistent rules with AP design team.
So, new version of exynos4 series will have same base RAM address.
Thanks and regards,
Sangbeom Kim
>
> Thank you,
> Kyungmin Park
>
> On Mon, Feb 14, 2011 at 5:22 PM, Kukjin Kim <kgene.kim@samsung.com> wrote:
> > This patch set changes to ARCH_EXYNOS4 from ARCH_S5PV310 for supporting
> Samsung's
> > new brand name EXYNOS. Samsung officially announced about the brand name
> of EXYNOS
> > at MWC 2011 and The EXYNOS4 integrates a ARM Cortex A9 microporcessor
> with several
> > other peripherals to support features such as multimedai, storage,
> graphics and gaming.
> > Especially, the EXYNOS4210 CPU which is one of EXYNOS4 SoC series can be
> used in
> > products such as Mobile devices.
> >
> > This patch set consists of the following patches.
> >
> > [PATCH 01/11] ARM: EXYNOS4: Add EXYNOS4 CPU initialization support
> > [PATCH 02/11] ARM: EXYNOS4: Update Clock part
> > [PATCH 03/11] ARM: EXYNOS4: Update IRQ part
> > [PATCH 04/11] ARM: EXYNOS4: Update Timer part
> > [PATCH 05/11] ARM: EXYNOS4: Update device support
> > [PATCH 06/11] ARM: EXYNOS4: Moved board support files
> > [PATCH 07/11] ARM: EXYNOS4: Update Kconfig and Makefile for the new
> ARCH_EXYNOS4
> > [PATCH 08/11] ARM: exynos4_defconfig: Add defconfig for EXYNOS4
> > [PATCH 09/11] mtd: OneNAND: Change dependency of ARCH_EXYNOS4
> > [PATCH 10/11] ASoC: Change dependency of ARCH_EXYNOS4
> > [PATCH 11/11] tty: Change dependency of ARCH_EXYNOS4
> >
> > _______________________________________________
> > linux-arm-kernel mailing list
> > linux-arm-kernel at lists.infradead.org
> > http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
> >
> --
> To unsubscribe from this list: send the line "unsubscribe linux-samsung-
> soc" in
> the body of a message to majordomo at vger.kernel.org
> More majordomo info at http://vger.kernel.org/majordomo-info.html
^ permalink raw reply [flat|nested] 20+ messages in thread
* [PATCH 0/11] ARM: EXYNOS4: Change ARCH name, ARCH_EXYNOS4 from ARCH_S5PV310
2011-02-14 23:53 ` Sangbeom Kim
@ 2011-02-15 0:18 ` Kyungmin Park
2011-02-15 1:52 ` Sangbeom Kim
0 siblings, 1 reply; 20+ messages in thread
From: Kyungmin Park @ 2011-02-15 0:18 UTC (permalink / raw)
To: linux-arm-kernel
On Tue, Feb 15, 2011 at 8:53 AM, Sangbeom Kim <sbkim73@samsung.com> wrote:
> Hi,
> I answer your questions in detail.
>
>> On Monday, February 14, 2011 8:16 PM, Kyungmin Park wrote:
>>
>> Hi,
>>
>> Wow, fast move, but need to more explanation.
>> what's the exact meaning of exynos4210?
>> Exynos4 is prefix and remaining are variants?
>
> Exynos4210 means below.
>
> 1st digit means ARM core version. In this case, 4 means Cortex A9.
> (If we release cortex A15, it will be Exynos5xxx)
> 2nd digit means number of core. ?2 mean dual core.
> 3rd digit means application category(LSI internal category).
> 4th digit means design rule (generation or shrink version)
Nice, I want these rules.
>
>> Now you changed all s5pv310 to exynos4. if new exynos4xxx chip are
>> comes then how to handle this one?
>> e.g., exynos4220 or later.
>> it's also conflict with mach-exynos4. do you handle all exynos4 series
>> at this mach directory?
>> historically there's no rules of the base RAM address at least samsung
>> chips.
>
> Yes, we will handle all exynos4 series at mach-exynos4 directory.
> In the past, there is no rule.
> But now, we are making consistent rules with AP design team.
> So, new version of exynos4 series will have same base RAM address.
Okay, no problem with base ram address,
Another one is how do you handle the GPIOs?
Now it's also changed as EXYNOS4_GPXX, I think it's difficult to use
the same banks as exynos4210 has if new chips are introduced.
maybe IRQ also has similar issue.
Now these patches assumes all exynos4 has same gpios, irqs and so on.
How do you think about it?
Thank you,
Kyungmin Park
>
> Thanks and regards,
> Sangbeom Kim
>
>>
>> Thank you,
>> Kyungmin Park
>>
>> On Mon, Feb 14, 2011 at 5:22 PM, Kukjin Kim <kgene.kim@samsung.com> wrote:
>> > This patch set changes to ARCH_EXYNOS4 from ARCH_S5PV310 for supporting
>> Samsung's
>> > new brand name EXYNOS. Samsung officially announced about the brand name
>> of EXYNOS
>> > at MWC 2011 and The EXYNOS4 integrates a ARM Cortex A9 microporcessor
>> with several
>> > other peripherals to support features such as multimedai, storage,
>> graphics and gaming.
>> > Especially, the EXYNOS4210 CPU which is one of EXYNOS4 SoC series can be
>> used in
>> > products such as Mobile devices.
>> >
>> > This patch set consists of the following patches.
>> >
>> > [PATCH 01/11] ARM: EXYNOS4: Add EXYNOS4 CPU initialization support
>> > [PATCH 02/11] ARM: EXYNOS4: Update Clock part
>> > [PATCH 03/11] ARM: EXYNOS4: Update IRQ part
>> > [PATCH 04/11] ARM: EXYNOS4: Update Timer part
>> > [PATCH 05/11] ARM: EXYNOS4: Update device support
>> > [PATCH 06/11] ARM: EXYNOS4: Moved board support files
>> > [PATCH 07/11] ARM: EXYNOS4: Update Kconfig and Makefile for the new
>> ARCH_EXYNOS4
>> > [PATCH 08/11] ARM: exynos4_defconfig: Add defconfig for EXYNOS4
>> > [PATCH 09/11] mtd: OneNAND: Change dependency of ARCH_EXYNOS4
>> > [PATCH 10/11] ASoC: Change dependency of ARCH_EXYNOS4
>> > [PATCH 11/11] tty: Change dependency of ARCH_EXYNOS4
>> >
>> > _______________________________________________
>> > linux-arm-kernel mailing list
>> > linux-arm-kernel at lists.infradead.org
>> > http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
>> >
>> --
>> To unsubscribe from this list: send the line "unsubscribe linux-samsung-
>> soc" in
>> the body of a message to majordomo at vger.kernel.org
>> More majordomo info at ?http://vger.kernel.org/majordomo-info.html
>
> --
> To unsubscribe from this list: send the line "unsubscribe linux-samsung-soc" in
> the body of a message to majordomo at vger.kernel.org
> More majordomo info at ?http://vger.kernel.org/majordomo-info.html
>
^ permalink raw reply [flat|nested] 20+ messages in thread
* [PATCH 0/11] ARM: EXYNOS4: Change ARCH name, ARCH_EXYNOS4 from ARCH_S5PV310
2011-02-15 0:18 ` Kyungmin Park
@ 2011-02-15 1:52 ` Sangbeom Kim
2011-02-15 4:39 ` Kyungmin Park
0 siblings, 1 reply; 20+ messages in thread
From: Sangbeom Kim @ 2011-02-15 1:52 UTC (permalink / raw)
To: linux-arm-kernel
Hi,
On Monday, February 14, 2011 8:16 PM, Kyungmin Park wrote:
> > Hi,
> > I answer your questions in detail.
> >
> >> On Monday, February 14, 2011 8:16 PM, Kyungmin Park wrote:
> >>
> >> Hi,
> >>
> >> Wow, fast move, but need to more explanation.
> >> what's the exact meaning of exynos4210?
> >> Exynos4 is prefix and remaining are variants?
> >
> > Exynos4210 means below.
> >
> > 1st digit means ARM core version. In this case, 4 means Cortex A9.
> > (If we release cortex A15, it will be Exynos5xxx)
> > 2nd digit means number of core. ?2 mean dual core.
> > 3rd digit means application category(LSI internal category).
> > 4th digit means design rule (generation or shrink version)
>
> Nice, I want these rules.
> >
> >> Now you changed all s5pv310 to exynos4. if new exynos4xxx chip are
> >> comes then how to handle this one?
> >> e.g., exynos4220 or later.
> >> it's also conflict with mach-exynos4. do you handle all exynos4 series
> >> at this mach directory?
> >> historically there's no rules of the base RAM address at least samsung
> >> chips.
> >
> > Yes, we will handle all exynos4 series at mach-exynos4 directory.
> > In the past, there is no rule.
> > But now, we are making consistent rules with AP design team.
> > So, new version of exynos4 series will have same base RAM address.
>
> Okay, no problem with base ram address,
>
> Another one is how do you handle the GPIOs?
> Now it's also changed as EXYNOS4_GPXX, I think it's difficult to use
> the same banks as exynos4210 has if new chips are introduced.
> maybe IRQ also has similar issue.
We already had reviewed your concern before.
S5P6450 and S5P6440 is basically same processor.
But GPIO, IRQ and some peripheral is little different.
We can handle that by checking each processors chipid.
Please check the below patch.
http://www.spinics.net/lists/linux-samsung-soc/msg03530.html
Thanks and regards,
Sangbeom Kim
>
> Now these patches assumes all exynos4 has same gpios, irqs and so on.
>
> How do you think about it?
>
> Thank you,
> Kyungmin Park
> >
> > Thanks and regards,
> > Sangbeom Kim
> >
> >>
> >> Thank you,
> >> Kyungmin Park
> >>
> >> On Mon, Feb 14, 2011 at 5:22 PM, Kukjin Kim <kgene.kim@samsung.com>
> wrote:
> >> > This patch set changes to ARCH_EXYNOS4 from ARCH_S5PV310 for
> supporting
> >> Samsung's
> >> > new brand name EXYNOS. Samsung officially announced about the brand
> name
> >> of EXYNOS
> >> > at MWC 2011 and The EXYNOS4 integrates a ARM Cortex A9 microporcessor
> >> with several
> >> > other peripherals to support features such as multimedai, storage,
> >> graphics and gaming.
> >> > Especially, the EXYNOS4210 CPU which is one of EXYNOS4 SoC series can
> be
> >> used in
> >> > products such as Mobile devices.
> >> >
> >> > This patch set consists of the following patches.
> >> >
> >> > [PATCH 01/11] ARM: EXYNOS4: Add EXYNOS4 CPU initialization support
> >> > [PATCH 02/11] ARM: EXYNOS4: Update Clock part
> >> > [PATCH 03/11] ARM: EXYNOS4: Update IRQ part
> >> > [PATCH 04/11] ARM: EXYNOS4: Update Timer part
> >> > [PATCH 05/11] ARM: EXYNOS4: Update device support
> >> > [PATCH 06/11] ARM: EXYNOS4: Moved board support files
> >> > [PATCH 07/11] ARM: EXYNOS4: Update Kconfig and Makefile for the new
> >> ARCH_EXYNOS4
> >> > [PATCH 08/11] ARM: exynos4_defconfig: Add defconfig for EXYNOS4
> >> > [PATCH 09/11] mtd: OneNAND: Change dependency of ARCH_EXYNOS4
> >> > [PATCH 10/11] ASoC: Change dependency of ARCH_EXYNOS4
> >> > [PATCH 11/11] tty: Change dependency of ARCH_EXYNOS4
> >> >
> >> > _______________________________________________
> >> > linux-arm-kernel mailing list
> >> > linux-arm-kernel at lists.infradead.org
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^ permalink raw reply [flat|nested] 20+ messages in thread
* [PATCH 0/11] ARM: EXYNOS4: Change ARCH name, ARCH_EXYNOS4 from ARCH_S5PV310
2011-02-15 1:52 ` Sangbeom Kim
@ 2011-02-15 4:39 ` Kyungmin Park
0 siblings, 0 replies; 20+ messages in thread
From: Kyungmin Park @ 2011-02-15 4:39 UTC (permalink / raw)
To: linux-arm-kernel
On Tue, Feb 15, 2011 at 10:52 AM, Sangbeom Kim <sbkim73@samsung.com> wrote:
> Hi,
>
> On Monday, February 14, 2011 8:16 PM, Kyungmin Park wrote:
>> > Hi,
>> > I answer your questions in detail.
>> >
>> >> On Monday, February 14, 2011 8:16 PM, Kyungmin Park wrote:
>> >>
>> >> Hi,
>> >>
>> >> Wow, fast move, but need to more explanation.
>> >> what's the exact meaning of exynos4210?
>> >> Exynos4 is prefix and remaining are variants?
>> >
>> > Exynos4210 means below.
>> >
>> > 1st digit means ARM core version. In this case, 4 means Cortex A9.
>> > (If we release cortex A15, it will be Exynos5xxx)
>> > 2nd digit means number of core. ?2 mean dual core.
>> > 3rd digit means application category(LSI internal category).
>> > 4th digit means design rule (generation or shrink version)
>>
>> Nice, I want these rules.
>> >
>> >> Now you changed all s5pv310 to exynos4. if new exynos4xxx chip are
>> >> comes then how to handle this one?
>> >> e.g., exynos4220 or later.
>> >> it's also conflict with mach-exynos4. do you handle all exynos4 series
>> >> at this mach directory?
>> >> historically there's no rules of the base RAM address at least samsung
>> >> chips.
>> >
>> > Yes, we will handle all exynos4 series at mach-exynos4 directory.
>> > In the past, there is no rule.
>> > But now, we are making consistent rules with AP design team.
>> > So, new version of exynos4 series will have same base RAM address.
>>
>> Okay, no problem with base ram address,
>>
>> Another one is how do you handle the GPIOs?
>> Now it's also changed as EXYNOS4_GPXX, I think it's difficult to use
>> the same banks as exynos4210 has if new chips are introduced.
>> maybe IRQ also has similar issue.
>
> We already had reviewed your concern before.
> S5P6450 and S5P6440 is basically same processor.
> But GPIO, IRQ and some peripheral is little different.
> We can handle that by checking each processors chipid.
>
> Please check the below patch.
> http://www.spinics.net/lists/linux-samsung-soc/msg03530.html
Right, in this patch it used the S5P64XX, S5P6440, and S5P6450 is used.
but EXYNOS patches used the EXYNOS4 prefix instead of EXYNOS4210 at
least at GPIO patch.
maybe you will rename it as EXYNOS4210 and use the EXYNOS4 as
representative prefix.
Anyway it means it will use the cpu_is_exynos4210 or similar style to
detect each cpu. and assign proper data structure
Then I recommend that create the cpu.h header file as other SOC does
and use a common macro if new one comes.
Thank you,
Kyungmin Park
>
> Thanks and regards,
> Sangbeom Kim
>>
>> Now these patches assumes all exynos4 has same gpios, irqs and so on.
>>
>> How do you think about it?
>>
>> Thank you,
>> Kyungmin Park
>> >
>> > Thanks and regards,
>> > Sangbeom Kim
>> >
>> >>
>> >> Thank you,
>> >> Kyungmin Park
>> >>
>> >> On Mon, Feb 14, 2011 at 5:22 PM, Kukjin Kim <kgene.kim@samsung.com>
>> wrote:
>> >> > This patch set changes to ARCH_EXYNOS4 from ARCH_S5PV310 for
>> supporting
>> >> Samsung's
>> >> > new brand name EXYNOS. Samsung officially announced about the brand
>> name
>> >> of EXYNOS
>> >> > at MWC 2011 and The EXYNOS4 integrates a ARM Cortex A9 microporcessor
>> >> with several
>> >> > other peripherals to support features such as multimedai, storage,
>> >> graphics and gaming.
>> >> > Especially, the EXYNOS4210 CPU which is one of EXYNOS4 SoC series can
>> be
>> >> used in
>> >> > products such as Mobile devices.
>> >> >
>> >> > This patch set consists of the following patches.
>> >> >
>> >> > [PATCH 01/11] ARM: EXYNOS4: Add EXYNOS4 CPU initialization support
>> >> > [PATCH 02/11] ARM: EXYNOS4: Update Clock part
>> >> > [PATCH 03/11] ARM: EXYNOS4: Update IRQ part
>> >> > [PATCH 04/11] ARM: EXYNOS4: Update Timer part
>> >> > [PATCH 05/11] ARM: EXYNOS4: Update device support
>> >> > [PATCH 06/11] ARM: EXYNOS4: Moved board support files
>> >> > [PATCH 07/11] ARM: EXYNOS4: Update Kconfig and Makefile for the new
>> >> ARCH_EXYNOS4
>> >> > [PATCH 08/11] ARM: exynos4_defconfig: Add defconfig for EXYNOS4
>> >> > [PATCH 09/11] mtd: OneNAND: Change dependency of ARCH_EXYNOS4
>> >> > [PATCH 10/11] ASoC: Change dependency of ARCH_EXYNOS4
>> >> > [PATCH 11/11] tty: Change dependency of ARCH_EXYNOS4
>> >> >
>> >> > _______________________________________________
>> >> > linux-arm-kernel mailing list
>> >> > linux-arm-kernel at lists.infradead.org
>> >> > http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
>> >> >
>> >> --
>> >> To unsubscribe from this list: send the line "unsubscribe linux-
>> samsung-
>> >> soc" in
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>> >> More majordomo info at ?http://vger.kernel.org/majordomo-info.html
>> >
>> > --
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>> soc" in
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>> >
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>
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^ permalink raw reply [flat|nested] 20+ messages in thread
* [PATCH 0/11] ARM: EXYNOS4: Change ARCH name, ARCH_EXYNOS4 from ARCH_S5PV310
2011-02-14 8:22 [PATCH 0/11] ARM: EXYNOS4: Change ARCH name, ARCH_EXYNOS4 from ARCH_S5PV310 Kukjin Kim
` (11 preceding siblings ...)
2011-02-14 11:16 ` [PATCH 0/11] ARM: EXYNOS4: Change ARCH name, ARCH_EXYNOS4 from ARCH_S5PV310 Kyungmin Park
@ 2011-02-18 1:27 ` Kukjin Kim
12 siblings, 0 replies; 20+ messages in thread
From: Kukjin Kim @ 2011-02-18 1:27 UTC (permalink / raw)
To: linux-arm-kernel
Kukjin Kim wrote:
>
> This patch set changes to ARCH_EXYNOS4 from ARCH_S5PV310 for supporting
> Samsung's
> new brand name EXYNOS. Samsung officially announced about the brand name
of
> EXYNOS
> at MWC 2011 and The EXYNOS4 integrates a ARM Cortex A9 microporcessor with
> several
> other peripherals to support features such as multimedai, storage,
graphics
> and gaming.
> Especially, the EXYNOS4210 CPU which is one of EXYNOS4 SoC series can be
used
> in
> products such as Mobile devices.
>
Hi all,
If there are no more comments for this, will merge this into for-next this
weekend.
Thanks.
Best regards,
Kgene.
--
Kukjin Kim <kgene.kim@samsung.com>, Senior Engineer,
SW Solution Development Team, Samsung Electronics Co., Ltd.
^ permalink raw reply [flat|nested] 20+ messages in thread