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* [PATCH V3 0/3] ARM: S5PV310: Move and Update L2 cache init code
@ 2010-10-21  6:44 Kukjin Kim
  2010-10-21  6:44 ` [PATCH V3 1/3] ARM: Add L2X0 PREFETCH and POWER control register Kukjin Kim
                   ` (2 more replies)
  0 siblings, 3 replies; 8+ messages in thread
From: Kukjin Kim @ 2010-10-21  6:44 UTC (permalink / raw)
  To: linux-arm-kernel

This patch moves L2X0 cache init code from each machine to ARCH_S5PV310's cpu.c
for common usage and updates its feature such as L2X0 Prefetch and Power control
configuration.

Changes since v1 and v2:
- updated L2 cache init function's features.

[PATCH V3 1/3] ARM: Add L2X0 PREFETCH and POWER control register
[PATCH V3 2/3] ARM: S5PV310: Remove L2 cache init in machine
[PATCH V3 3/3] ARM: S5PV310: Add L2 cache init function in cpu.c

^ permalink raw reply	[flat|nested] 8+ messages in thread

end of thread, other threads:[~2010-10-21  8:55 UTC | newest]

Thread overview: 8+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2010-10-21  6:44 [PATCH V3 0/3] ARM: S5PV310: Move and Update L2 cache init code Kukjin Kim
2010-10-21  6:44 ` [PATCH V3 1/3] ARM: Add L2X0 PREFETCH and POWER control register Kukjin Kim
2010-10-21  8:44   ` Catalin Marinas
2010-10-21  8:55     ` Kukjin Kim
2010-10-21  6:44 ` [PATCH V3 2/3] ARM: S5PV310: Remove L2 cache init in machine Kukjin Kim
2010-10-21  7:23   ` Daein Moon
2010-10-21  7:28     ` Kukjin Kim
2010-10-21  6:44 ` [PATCH V3 3/3] ARM: S5PV310: Add L2 cache init function in cpu.c Kukjin Kim

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