From: "Hyunki Koo" <hyunki00.koo@samsung.com>
To: "'Krzysztof Kozlowski'" <krzk@kernel.org>
Cc: linux-samsung-soc@vger.kernel.org, gregkh@linuxfoundation.org,
linux-kernel@vger.kernel.org, 'Kukjin Kim' <kgene@kernel.org>,
linux-serial@vger.kernel.org, 'Jiri Slaby' <jslaby@suse.com>,
linux-arm-kernel@lists.infradead.org
Subject: RE: [PATCH v2] tty: samsung_tty: 32-bit access for TX/RX hold registers
Date: Fri, 3 Apr 2020 19:19:30 +0900 [thread overview]
Message-ID: <005501d609a1$5cbbbb40$163331c0$@samsung.com> (raw)
In-Reply-To: <20200403075122.GA9358@kozik-lap>
On Thu, Apr 02, 2020 at 4:51:29PM +0900, Krzysztof Kozlowski
> On Fri, Apr 03, 2020 at 04:30:38PM +0900, Hyunki Koo wrote:
> > On Thu, Apr 02, 2020 at 10:59:29PM +0900, Krzysztof Kozlowski
> > > On Thu, Apr 02, 2020 at 08:04:29PM +0900, Hyunki Koo wrote:
> > > > Support 32-bit access for the TX/RX hold registers UTXH and URXH.
> > > >
> > > > This is required for some newer SoCs.
> > > >
> > > > Signed-off-by: Hyunki Koo <hyunki00.koo@samsung.com>
> > > > ---
> > > > drivers/tty/serial/samsung_tty.c | 78
> > > > +++++++++++++++++++++++++++++++++-------
> > > > 1 file changed, 66 insertions(+), 12 deletions(-)
> > > >
> > > > diff --git a/drivers/tty/serial/samsung_tty.c
> > > > b/drivers/tty/serial/samsung_tty.c
> > > > index 73f951d65b93..826d8c5846a6 100644
> > > > --- a/drivers/tty/serial/samsung_tty.c
> > > > +++ b/drivers/tty/serial/samsung_tty.c
> > > > @@ -154,12 +154,47 @@ struct s3c24xx_uart_port { #define
> > > > portaddrl(port, reg) \
> > > > ((unsigned long *)(unsigned long)((port)->membase + (reg)))
> > > >
> > > > -#define rd_regb(port, reg) (readb_relaxed(portaddr(port, reg)))
> > > > +static unsigned int rd_reg(struct uart_port *port, int reg) {
> > > > + switch (port->iotype) {
> > > > + case UPIO_MEM:
> > > > + return readb_relaxed(portaddr(port, reg));
> > > > + case UPIO_MEM32:
> > > > + return readl_relaxed(portaddr(port, reg));
> > > > + default:
> > > > + return 0;
> > > > + }
> > > > + return 0;
> > > > +}
> > > > +
> > > > #define rd_regl(port, reg) (readl_relaxed(portaddr(port, reg)))
> > > >
> > > > -#define wr_regb(port, reg, val) writeb_relaxed(val,
> > > > portaddr(port,
> > > > reg))
> > > > +static void wr_reg(struct uart_port *port, int reg, int val) {
> > > > + switch (port->iotype) {
> > > > + case UPIO_MEM:
> > > > + writeb_relaxed(val, portaddr(port, reg));
> > > > + break;
> > > > + case UPIO_MEM32:
> > > > + writel_relaxed(val, portaddr(port, reg));
> > > > + break;
> > > > + }
> > > > +}
> > > > +
> > > > #define wr_regl(port, reg, val) writel_relaxed(val,
> > > > portaddr(port,
> > > > reg))
> > > >
> > > > +static void write_buf(struct uart_port *port, int reg, int val) {
> > > > + switch (port->iotype) {
> > > > + case UPIO_MEM:
> > > > + writeb(val, portaddr(port, reg));
> > > > + break;
> > > > + case UPIO_MEM32:
> > > > + writel(val, portaddr(port, reg));
> > > > + break;
> > > > + }
> > > > +}
> > > > +
> > > > /* Byte-order aware bit setting/clearing functions. */
> > > >
> > > > static inline void s3c24xx_set_bit(struct uart_port *port, int
> > > > idx, @@ -714,7 +749,7 @@ static void
> > > > s3c24xx_serial_rx_drain_fifo(struct
> > > s3c24xx_uart_port *ourport)
> > > > fifocnt--;
> > > >
> > > > uerstat = rd_regl(port, S3C2410_UERSTAT);
> > > > - ch = rd_regb(port, S3C2410_URXH);
> > > > + ch = rd_reg(port, S3C2410_URXH);
> > > >
> > > > if (port->flags & UPF_CONS_FLOW) {
> > > > int txe = s3c24xx_serial_txempty_nofifo(port);
> > > > @@ -826,7 +861,7 @@ static irqreturn_t
> s3c24xx_serial_tx_chars(int
> > > irq, void *id)
> > > > }
> > > >
> > > > if (port->x_char) {
> > > > - wr_regb(port, S3C2410_UTXH, port->x_char);
> > > > + wr_reg(port, S3C2410_UTXH, port->x_char);
> > > > port->icount.tx++;
> > > > port->x_char = 0;
> > > > goto out;
> > > > @@ -852,7 +887,7 @@ static irqreturn_t
> s3c24xx_serial_tx_chars(int
> > > irq, void *id)
> > > > if (rd_regl(port, S3C2410_UFSTAT) & ourport->info-
> > > >tx_fifofull)
> > > > break;
> > > >
> > > > - wr_regb(port, S3C2410_UTXH, xmit->buf[xmit->tail]);
> > > > + wr_reg(port, S3C2410_UTXH, xmit->buf[xmit->tail]);
> > > > xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
> > > > port->icount.tx++;
> > > > count--;
> > > > @@ -916,7 +951,7 @@ static unsigned int
> > > s3c24xx_serial_tx_empty(struct
> > > > uart_port *port)
> > > > /* no modem control lines */
> > > > static unsigned int s3c24xx_serial_get_mctrl(struct uart_port
> > > > *port) {
> > > > - unsigned int umstat = rd_regb(port, S3C2410_UMSTAT);
> > > > + unsigned int umstat = rd_reg(port, S3C2410_UMSTAT);
> > > >
> > > > if (umstat & S3C2410_UMSTAT_CTS)
> > > > return TIOCM_CAR | TIOCM_DSR | TIOCM_CTS; @@ -
> > > 1974,7 +2009,7 @@
> > > > static int s3c24xx_serial_probe(struct platform_device *pdev)
> > > > struct device_node *np = pdev->dev.of_node;
> > > > struct s3c24xx_uart_port *ourport;
> > > > int index = probe_index;
> > > > - int ret;
> > > > + int ret, prop = 0;
> > > >
> > > > if (np) {
> > > > ret = of_alias_get_id(np, "serial"); @@ -2000,10
> > > +2035,29 @@ static
> > > > int s3c24xx_serial_probe(struct platform_device *pdev)
> > > > dev_get_platdata(&pdev->dev) :
> > > > ourport->drv_data->def_cfg;
> > > >
> > > > - if (np)
> > > > + if (np) {
> > > > of_property_read_u32(np,
> > > > "samsung,uart-fifosize", &ourport->port.fifosize);
> > > >
> > > > + if (of_property_read_u32(np, "reg-io-width", &prop) ==
> > > 0) {
> > > > + switch (prop) {
> > > > + case 1:
> > > > + ourport->port.iotype = UPIO_MEM;
> > > > + break;
> > > > + case 4:
> > > > + ourport->port.iotype = UPIO_MEM32;
> > > > + break;
> > > > + default:
> > > > + dev_warn(&pdev->dev, "unsupported
> > > reg-io-width (%d)\n",
> > > > + prop);
> > > > + ret = -EINVAL;
> > > > + break;
> > > > + }
> > > > + } else {
> > > > + ourport->port.iotype = UPIO_MEM;
> > > > + }
> > > > + }
> > >
> > > I think this still breaks all non-DT platforms (e.g. s3c).
> > >
> > > Best regards,
> > > Krzysztof
> >
> > Thank you for your comment.
> > I hope ourport->port.iotype is initialized by below table for non-DT
> > platforms
>
> Indeed, you're right. In this case, this else() you added is not needed.
> The default value for non-DT and existing DT platforms will be the same
> (UPIO_MEM).
>
> Best regards,
> Krzysztof
Thank you for your comment.
I will remove this line also in v3
+ } else {
+ ourport->port.iotype = UPIO_MEM;
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next prev parent reply other threads:[~2020-04-03 10:19 UTC|newest]
Thread overview: 38+ messages / expand[flat|nested] mbox.gz Atom feed top
[not found] <CGME20200401082749epcas2p2a774da515805bc3f761b6b5a8dc9e3d2@epcas2p2.samsung.com>
2020-04-01 8:27 ` [PATCH] tty: samsung_tty: 32-bit access for TX/RX hold registers Hyunki Koo
2020-04-01 8:55 ` Greg Kroah-Hartman
2020-04-01 9:19 ` Krzysztof Kozlowski
2020-04-02 9:44 ` Hyunki Koo
2020-04-02 9:48 ` 'Krzysztof Kozlowski'
2020-04-02 11:04 ` [PATCH v2] " Hyunki Koo
2020-04-02 12:18 ` Greg KH
2020-04-02 13:59 ` Krzysztof Kozlowski
2020-04-03 7:30 ` Hyunki Koo
2020-04-03 7:51 ` 'Krzysztof Kozlowski'
2020-04-03 10:19 ` Hyunki Koo [this message]
2020-04-03 10:20 ` [PATCH v3] " Hyunki Koo
2020-04-03 10:47 ` Krzysztof Kozlowski
2020-04-03 11:12 ` Hyunki Koo
2020-04-03 11:39 ` 'Krzysztof Kozlowski'
2020-04-03 11:15 ` [PATCH v4] " Hyunki Koo
2020-04-03 11:42 ` Greg KH
2020-04-03 11:53 ` Krzysztof Kozlowski
2020-04-03 11:57 ` Greg KH
2020-04-03 12:08 ` Krzysztof Kozlowski
2020-04-03 11:59 ` Krzysztof Kozlowski
2020-04-05 21:35 ` Hyunki Koo
2020-04-06 9:54 ` 'Krzysztof Kozlowski'
2020-04-03 13:34 ` Krzysztof Kozlowski
2020-04-05 21:41 ` Hyunki Koo
2020-04-06 9:53 ` 'Krzysztof Kozlowski'
2020-04-06 10:31 ` [PATCH v5 2/2] " Hyunki Koo
2020-04-06 10:34 ` Krzysztof Kozlowski
2020-04-06 23:08 ` [PATCH v6 " Hyunki Koo
2020-04-07 4:49 ` Jiri Slaby
2020-04-07 6:02 ` Hyunki Koo
2020-04-07 6:24 ` Krzysztof Kozlowski
2020-04-07 6:32 ` Jiri Slaby
2020-04-07 7:22 ` Krzysztof Kozlowski
2020-04-07 6:26 ` Krzysztof Kozlowski
2020-04-07 6:28 ` Jiri Slaby
2020-04-07 6:37 ` Jiri Slaby
2020-04-07 6:54 ` Hyunki Koo
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