From: yitian.bu@tangramtek.com (yitian)
To: linux-arm-kernel@lists.infradead.org
Subject: [RESEND PATCH 1/1] ASoC: dwc: correct irq clear method
Date: Tue, 29 Sep 2015 22:39:00 +0800 [thread overview]
Message-ID: <006301d0fac4$94eb5890$bec209b0$@tangramtek.com> (raw)
from Designware I2S datasheet, irq is cleared by reading from
TOR/ROR registers, rather than by writing into them.
Signed-off-by: Yitian Bu <yitian.bu@tangramtek.com>
---
sound/soc/dwc/designware_i2s.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/sound/soc/dwc/designware_i2s.c b/sound/soc/dwc/designware_i2s.c
index a3e97b4..0d28e3b 100644
--- a/sound/soc/dwc/designware_i2s.c
+++ b/sound/soc/dwc/designware_i2s.c
@@ -131,10 +131,10 @@ static inline void i2s_clear_irqs(struct dw_i2s_dev
*dev, u32 stream)
if (stream == SNDRV_PCM_STREAM_PLAYBACK) {
for (i = 0; i < 4; i++)
- i2s_write_reg(dev->i2s_base, TOR(i), 0);
+ i2s_read_reg(dev->i2s_base, TOR(i));
} else {
for (i = 0; i < 4; i++)
- i2s_write_reg(dev->i2s_base, ROR(i), 0);
+ i2s_read_reg(dev->i2s_base, ROR(i));
}
}
--
1.7.12.4
next reply other threads:[~2015-09-29 14:39 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-09-29 14:39 yitian [this message]
2015-09-30 18:17 ` [RESEND PATCH 1/1] ASoC: dwc: correct irq clear method Mark Brown
2015-10-01 2:39 ` yitian
2015-10-01 10:03 ` Mark Brown
2015-10-02 7:22 ` [alsa-devel] " yitian
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