From: "Alim Akhtar" <alim.akhtar@samsung.com>
To: "'Devang Tailor'" <dev.tailor@samsung.com>, <robh@kernel.org>,
<krzk+dt@kernel.org>, <conor+dt@kernel.org>
Cc: <devicetree@vger.kernel.org>,
<linux-arm-kernel@lists.infradead.org>,
<linux-samsung-soc@vger.kernel.org>,
<linux-kernel@vger.kernel.org>, <faraz.ata@samsung.com>
Subject: RE: [PATCH v2] arm64: dts: add cpu cache information to ExynosAuto-v920
Date: Fri, 31 Jan 2025 17:19:09 +0530 [thread overview]
Message-ID: <006401db73d6$2af35fb0$80da1f10$@samsung.com> (raw)
In-Reply-To: <20250108055012.1938530-1-dev.tailor@samsung.com>
Hi Devang
> -----Original Message-----
> From: Devang Tailor <dev.tailor@samsung.com>
> Sent: Wednesday, January 8, 2025 11:20 AM
> To: alim.akhtar@samsung.com; dev.tailor@samsung.com; robh@kernel.org;
> krzk+dt@kernel.org; conor+dt@kernel.org
> Cc: devicetree@vger.kernel.org; linux-arm-kernel@lists.infradead.org; linux-
> samsung-soc@vger.kernel.org; linux-kernel@vger.kernel.org;
> faraz.ata@samsung.com
> Subject: [PATCH v2] arm64: dts: add cpu cache information to ExynosAuto-
> v920
>
> Add CPU caches information to its dt nodes so that the same is available to
> userspace via sysfs. This SoC has 64/64 KB I/D cache and 256KB of L2 cache for
> each core, 2 MB of shared L3 cache for each quad cpu cluster and 1 MB of
> shared L3 cache for the dual cpu cluster.
>
> Signed-off-by: Devang Tailor <dev.tailor@samsung.com>
>
> ---
> Changes in v2:
> - Added L3 cache for all the three cpu clusters
> - Corrected L2 cache numbering as a part of review comments from Krzysztof
> and updated as per cpus clusters.
> - Link to v1: https://patchwork.kernel.org/project/linux-arm-
> kernel/patch/20241231064350.523713-1-dev.tailor@samsung.com/
> ---
> .../arm64/boot/dts/exynos/exynosautov920.dtsi | 127
> ++++++++++++++++++
> 1 file changed, 127 insertions(+)
>
[snip]
> + l3_cache_cl0: l3-cache0 {
You can add one node for cl0 and cl1, say "l3_cache_cl0_cl1" and
Remove the specific node for CL1, because both are same.
> + compatible = "cache";
> + cache-level = <3>;
> + cache-unified;
> + cache-size = <0x200000>;/* 2MB L3 cache for cpu
> cluster-0 */
> + cache-line-size = <64>;
> + cache-sets = <2048>;
> + };
> +
> + l3_cache_cl1: l3-cache1 {
> + compatible = "cache";
> + cache-level = <3>;
> + cache-unified;
> + cache-size = <0x200000>;/* 2MB L3 cache for cpu
> cluster-1 */
> + cache-line-size = <64>;
> + cache-sets = <2048>;
> + };
> +
[snip]
> + l3_cache_cl2: l3-cache2 {
> 2.34.1
next prev parent reply other threads:[~2025-01-31 11:51 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
[not found] <CGME20250108054224epcas5p399f3d734f8d9f82e5ae75d183d1a5344@epcas5p3.samsung.com>
2025-01-08 5:50 ` [PATCH v2] arm64: dts: add cpu cache information to ExynosAuto-v920 Devang Tailor
2025-01-31 11:49 ` Alim Akhtar [this message]
2025-01-31 13:27 ` Sudeep Holla
2025-02-05 15:52 ` Krzysztof Kozlowski
2025-02-05 16:10 ` Alim Akhtar
2025-02-17 8:45 ` Devang Tailor
2025-02-05 16:07 ` Alim Akhtar
2025-02-17 10:36 ` Krzysztof Kozlowski
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