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Fri, 13 Sep 2024 04:05:51 -0400 (EDT) X-Mailer: MessagingEngine.com Webmail Interface MIME-Version: 1.0 Date: Fri, 13 Sep 2024 08:05:31 +0000 From: "Arnd Bergmann" To: arturs.artamonovs@analog.com, "Catalin Marinas" , "Will Deacon" , "Greg Malysa" , "Philipp Zabel" , "Rob Herring" , "Krzysztof Kozlowski" , "Conor Dooley" , "Utsav Agarwal" , "Michael Turquette" , "Stephen Boyd" , "Linus Walleij" , "Bartosz Golaszewski" , "Thomas Gleixner" , "Andi Shyti" , "Greg Kroah-Hartman" , "Jiri Slaby" , "Olof Johansson" , soc@kernel.org Cc: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, linux-clk@vger.kernel.org, "open list:GPIO SUBSYSTEM" , linux-i2c@vger.kernel.org, linux-serial@vger.kernel.org, adsp-linux@analog.com, "Nathan Barrett-Morrison" Message-Id: <00860eb3-8c88-45d3-84f5-5f8f0f03c28c@app.fastmail.com> In-Reply-To: <20240912-test-v1-19-458fa57c8ccf@analog.com> References: <20240912-test-v1-0-458fa57c8ccf@analog.com> <20240912-test-v1-19-458fa57c8ccf@analog.com> Subject: Re: [PATCH 19/21] arm64: dts: adi: sc598: add device tree Content-Type: text/plain Content-Transfer-Encoding: 7bit X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240913_010553_584802_B4AA6203 X-CRM114-Status: UNSURE ( 9.28 ) X-CRM114-Notice: Please train this message. X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Thu, Sep 12, 2024, at 18:25, Arturs Artamonovs via B4 Relay wrote: > +/ { > + chosen { > + stdout-path = &uart1; > + bootargs = "earlycon=adi_uart,0x31003000 console=ttySC0,115200 > mem=224M"; > + }; You should not need the mem= and earlycon= arguments, as that data is already part of the stdout-path property and the memory node. > + aliases { > + serial0 = &uart0; > + serial2 = &uart2; > + serial3 = &uart3; > + }; The aliases are board specific, please only list the ones that are actually enabled and wired on on a particular board, and make the aliases match the labels on the board rather than the internal components of hte chip. > + cpus { > + #address-cells = <0x2>; > + #size-cells = <0x0>; > + > + cpu0: cpu@0 { > + device_type = "cpu"; > + compatible = "arm,cortex-a55"; > + reg = <0x0 0x0>; > + enable-method = "spin-table"; > + cpu-release-addr = <0x0 0xdeadbeef>; Is that the actual address? It looks like some placeholder that should not have been here. Arnd