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[60.250.196.139]) by smtp.gmail.com with ESMTPSA id 5a478bee46e88-36ca39972d4sm18304920eec.26.2026.11.04.16.14.51 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Wed, 04 Nov 2026 16:14:53 -0800 (PST) Message-ID: <0093d120-b966-4ece-be57-55a4751e17be@gmail.com> Date: Thu, 5 Nov 2026 08:14:41 +0800 X-Archived-By: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 1/2] dt-bindings: dma: nuvoton,ma35d1-pdma: Document MA35D1 PDMA controller To: Krzysztof Kozlowski Cc: ychuang3@nuvoton.com, schung@nuvoton.com, vkoul@kernel.org, Frank.Li@kernel.org, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, kees@kernel.org, gustavoars@kernel.org, linux-arm-kernel@lists.infradead.org, dmaengine@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-hardening@vger.kernel.org References: <20261103022202.2139674-1-shanchun1218@gmail.com> <20261103022202.2139674-2-shanchun1218@gmail.com> <20261104-vole-of-legendary-plenty-811cf1@quoll> Content-Language: en-US From: Shan-Chun Hung In-Reply-To: <20261104-vole-of-legendary-plenty-811cf1@quoll> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.9.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20261104_161455_662119_DABC19F9 X-CRM114-Status: GOOD ( 21.41 ) X-Spam-Score: -1.9 (-) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" X-Spam-Status: No, score=-14.3 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,FREEMAIL_FORGED_FROMDOMAIN, FREEMAIL_FROM,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER, INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS, USER_AGENT_SANE_1 autolearn=ham autolearn_force=no version=4.0.1 X-Spam-Checker-Version: SpamAssassin 4.0.1 (2024-03-26) on aws-us-west-2-korg-listserv-alma10-1 Dear Krzysztof, Thanks for your review. On 11/4/2026 10:03 PM, Krzysztof Kozlowski wrote: > On Tue, Nov 03, 2026 at 10:22:01AM +0800, Shan-Chun Hung wrote: >> Add binding for Nuvoton MA35D1 PDMA controller. >> > > Looks like valid Sashiko review, so only few nits, not a full review: > >> Signed-off-by: Shan-Chun Hung >> --- >> .../bindings/dma/nuvoton,ma35d1-pdma.yaml | 72 +++++++++++ >> include/dt-bindings/dma/ma35d1-pdma.h | 113 ++++++++++++++++++ >> 2 files changed, 185 insertions(+) >> create mode 100644 Documentation/devicetree/bindings/dma/nuvoton,ma35d1-pdma.yaml >> create mode 100644 include/dt-bindings/dma/ma35d1-pdma.h >> >> diff --git a/Documentation/devicetree/bindings/dma/nuvoton,ma35d1-pdma.yaml b/Documentation/devicetree/bindings/dma/nuvoton,ma35d1-pdma.yaml >> new file mode 100644 >> index 000000000000..cd752571242c >> --- /dev/null >> +++ b/Documentation/devicetree/bindings/dma/nuvoton,ma35d1-pdma.yaml >> @@ -0,0 +1,72 @@ >> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) >> +%YAML 1.2 >> +--- >> +$id: http://devicetree.org/schemas/dma/nuvoton,ma35d1-pdma.yaml# >> +$schema: http://devicetree.org/meta-schemas/core.yaml# >> + >> +title: Nuvoton MA35D1 PDMA controller >> + >> +description: >> + This describes the devicetree bindings for four Peripheral DMA engines to perform > > Do not describe what the binding document is describe. Just describe > that directly, so explain the hardware. Look at other examples. I will fix it. > >> + memory-to-memory, memory-to-peripheral, or peripheral-to-memory data transfer >> + capable of supporting 10 channels, implemented in Nuvoton MA35D1 SoCs. >> + >> +maintainers: >> + - Shan-Chun Hung >> + >> +allOf: >> + - $ref: dma-controller.yaml# >> + >> +properties: >> + compatible: >> + const: nuvoton,ma35d1-pdma >> + >> + reg: >> + maxItems: 1 >> + >> + clocks: >> + maxItems: 1 >> + >> + interrupts: >> + maxItems: 1 >> + >> + "#dma-cells": >> + const: 2 >> + description: >> + The first cell is the channel number. The second cell is the >> + peripheral request source (REQSRC) selection, which defines which >> + peripheral is connected to that PDMA channel. >> + >> + dma-channels: >> + const: 10 > > Why isn't this implied by the compatible? Drop. I will remove it. > >> + >> +additionalProperties: false > > This goes after required block. I will fix it.> >> + >> +required: >> + - compatible >> + - reg >> + - clocks >> + - interrupts >> + - "#dma-cells" >> + - dma-channels >> + >> +examples: >> + - | >> + #include >> + #include >> + >> + soc { >> + #address-cells = <2>; >> + #size-cells = <2>; >> + >> + dma-controller@40080000 { >> + compatible = "nuvoton,ma35d1-pdma"; >> + reg = <0x0 0x40080000 0x0 0x2000>; >> + interrupts = ; >> + clocks = <&clk PDMA0_GATE>; >> + #dma-cells = <2>; >> + dma-channels = <10>; >> + }; >> + }; >> + >> +... >> diff --git a/include/dt-bindings/dma/ma35d1-pdma.h b/include/dt-bindings/dma/ma35d1-pdma.h >> new file mode 100644 >> index 000000000000..0ddc99d29661 >> --- /dev/null >> +++ b/include/dt-bindings/dma/ma35d1-pdma.h > > Filename must match the binding filename. I will fix it> >> @@ -0,0 +1,113 @@ >> +/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */ >> +/* >> + * Copyright (C) 2026 Nuvoton Technology Corp. >> + */ >> + >> +#ifndef __DT_BINDINGS_DMA_MA35D1_PDMA_H__ >> +#define __DT_BINDINGS_DMA_MA35D1_PDMA_H__ >> + >> +#define MA35D1_PDMA_MEM 0 > > > Hole > >> +#define MA35D1_PDMA_UART0_TX 4 >> +#define MA35D1_PDMA_UART0_RX 5 >> +#define MA35D1_PDMA_UART1_TX 6 >> +#define MA35D1_PDMA_UART1_RX 7 >> +#define MA35D1_PDMA_UART2_TX 8 >> +#define MA35D1_PDMA_UART2_RX 9 >> +#define MA35D1_PDMA_UART3_TX 10 >> +#define MA35D1_PDMA_UART3_RX 11 >> +#define MA35D1_PDMA_UART4_TX 12 >> +#define MA35D1_PDMA_UART4_RX 13 >> +#define MA35D1_PDMA_UART5_TX 14 >> +#define MA35D1_PDMA_UART5_RX 15 >> +#define MA35D1_PDMA_UART6_TX 16 >> +#define MA35D1_PDMA_UART6_RX 17 >> +#define MA35D1_PDMA_UART7_TX 18 >> +#define MA35D1_PDMA_UART7_RX 19 >> +#define MA35D1_PDMA_UART8_TX 20 >> +#define MA35D1_PDMA_UART8_RX 21 >> +#define MA35D1_PDMA_UART9_TX 22 >> +#define MA35D1_PDMA_UART9_RX 23 >> +#define MA35D1_PDMA_UART10_TX 24 >> +#define MA35D1_PDMA_UART10_RX 25 >> +#define MA35D1_PDMA_UART11_TX 26 >> +#define MA35D1_PDMA_UART11_RX 27 >> +#define MA35D1_PDMA_UART12_TX 28 >> +#define MA35D1_PDMA_UART12_RX 29 >> +#define MA35D1_PDMA_UART13_TX 30 >> +#define MA35D1_PDMA_UART13_RX 31 >> +#define MA35D1_PDMA_UART14_TX 32 >> +#define MA35D1_PDMA_UART14_RX 33 >> +#define MA35D1_PDMA_UART15_TX 34 >> +#define MA35D1_PDMA_UART15_RX 35 >> +#define MA35D1_PDMA_UART16_TX 36 >> +#define MA35D1_PDMA_UART16_RX 37 >> +#define MA35D1_PDMA_QSPI0_TX 54 > > You should not have holes in the ABI or this is not DT ABI, so drop or > move out entire file from bindings. I will fix it.> > Best regards, > Krzysztof Best Regards, Shan-Chun