From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 9D248C433F5 for ; Thu, 13 Jan 2022 03:04:28 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:In-Reply-To:MIME-Version:Date: Message-ID:From:References:Cc:To:Subject:Reply-To:Content-ID: Content-Description:Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc :Resent-Message-ID:List-Owner; bh=G8hmYh+kp/TzrSUKMyXPo31D0i1fySWVeGS4gNYeaxQ=; b=PtKOyPPUDlhoKsaReCBEVt8BRe /oL7oMWJeO/MtZwDjaP+tgHpk+svTgpHcaMcFY+s8cQ1yn2oxWqqbBtsSIWvSZ2vdGsw6SbgXiTUm u9DwfzIajkbvIMAgPg1RmvoWYDMGk3nic/+05oWsl9Hpkgs53bLM/kmdDq9xrqsAiToVXjSer/RJT Z63jQuSMI1lR2Q/1G0bew8LI00+fqEYrGu/2fTQgRNIND48w5joJMRSECF4p/pBL4w4AXCC60ZReR CMl2p8hVjbyLI+wl41w3BBJyY75PWddJ1iBP6wuY3bjVUXbaDCG+DSxePSbdD70YSGJ/g8/wqNJk7 tyYd9MTA==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1n7qOM-004MLt-HK; Thu, 13 Jan 2022 03:03:10 +0000 Received: from foss.arm.com ([217.140.110.172]) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1n7qOJ-004MLH-6R for linux-arm-kernel@lists.infradead.org; Thu, 13 Jan 2022 03:03:08 +0000 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 4E435D6E; Wed, 12 Jan 2022 19:03:05 -0800 (PST) Received: from [10.163.65.170] (unknown [10.163.65.170]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 75A0A3F766; Wed, 12 Jan 2022 19:03:02 -0800 (PST) Subject: Re: [PATCH 1/2] arm64: Add Cortex-X2 CPU part definition To: Arnd Bergmann Cc: Linux ARM , Catalin Marinas , Will Deacon , Mathieu Poirier , Suzuki Poulose , coresight@lists.linaro.org, Linux Kernel Mailing List References: <1641980099-20315-1-git-send-email-anshuman.khandual@arm.com> <1641980099-20315-2-git-send-email-anshuman.khandual@arm.com> From: Anshuman Khandual Message-ID: <00e28671-8d3a-f789-91c4-109814792a07@arm.com> Date: Thu, 13 Jan 2022 08:33:04 +0530 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:68.0) Gecko/20100101 Thunderbird/68.10.0 MIME-Version: 1.0 In-Reply-To: Content-Language: en-US X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220112_190307_325510_FEB382A0 X-CRM114-Status: GOOD ( 20.23 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On 1/12/22 4:20 PM, Arnd Bergmann wrote: > On Wed, Jan 12, 2022 at 10:34 AM Anshuman Khandual > wrote: >> >> Add the CPU Partnumbers for the new Arm designs. >> >> Cc: Catalin Marinas >> Cc: Will Deacon >> Cc: Suzuki Poulose >> Cc: linux-arm-kernel@lists.infradead.org >> Cc: linux-kernel@vger.kernel.org >> Signed-off-by: Anshuman Khandual >> --- >> arch/arm64/include/asm/cputype.h | 2 ++ >> 1 file changed, 2 insertions(+) >> >> diff --git a/arch/arm64/include/asm/cputype.h b/arch/arm64/include/asm/cputype.h >> index 19b8441aa8f2..657eeb06c784 100644 >> --- a/arch/arm64/include/asm/cputype.h >> +++ b/arch/arm64/include/asm/cputype.h >> @@ -74,6 +74,7 @@ >> #define ARM_CPU_PART_NEOVERSE_N1 0xD0C >> #define ARM_CPU_PART_CORTEX_A77 0xD0D >> #define ARM_CPU_PART_CORTEX_A710 0xD47 >> +#define ARM_CPU_PART_CORTEX_X2 0xD48 >> #define ARM_CPU_PART_NEOVERSE_N2 0xD49 > > No objections to the patch, but would it be possible to just add all the missing > ones here to the degree that they are known already? I don't see any entries for > Cortex-A34, Cortex-A65AE, Cortex-A78, Cortex-A78C, Cortex-A78AE, > Neoverse-E1, Neoverse-V1, Cortex-X1, Cortex-X2, Cortex-A510, Cortex-A710 > and Cortex-R82 among the Arm-designed cores that can run Linux, and there > are probably others that I missed going through the list. Hi Arnd, IIUC the part numbers are enumerated here only if there is an errata applicable for them which needs to be detected at boot. I am not sure whether all cpu versions that can run Linux, needs to be defined here. But then I might be missing something. - Anshuman > > Arnd > _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel