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Thu, 14 Dec 2023 17:28:53 +0100 (CET) Received: from euls16034.sgp.st.com (euls16034.sgp.st.com [10.75.44.20]) by beta.dmz-eu.st.com (STMicroelectronics) with ESMTP id 10B76100053; Thu, 14 Dec 2023 17:28:43 +0100 (CET) Received: from Webmail-eu.st.com (shfdag1node1.st.com [10.75.129.69]) by euls16034.sgp.st.com (STMicroelectronics) with ESMTP id EEA6A2747B2; Thu, 14 Dec 2023 17:28:42 +0100 (CET) Received: from [10.201.21.122] (10.201.21.122) by SHFDAG1NODE1.st.com (10.75.129.69) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.27; Thu, 14 Dec 2023 17:28:41 +0100 Message-ID: <0145e75a-0d4c-4e34-a247-7852796f0552@foss.st.com> Date: Thu, 14 Dec 2023 17:28:40 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 0/4] stm32: add support for STM32MP25 BSEC to control OTP data Content-Language: en-US To: Patrick Delaunay , Srinivas Kandagatla , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Maxime Coquelin , Catalin Marinas , Will Deacon , Fabrice Gasnier CC: Arnd Bergmann , Bjorn Andersson , Dmitry Baryshkov , Geert Uytterhoeven , Konrad Dybcio , Krzysztof Kozlowski , Marek Szyprowski , Neil Armstrong , =?UTF-8?B?TsOtY29sYXMgRi4gUi4gQS4gUHJhZG8=?= , Peng Fan , Udit Kumar , , , , References: <20231117143338.1173475-1-patrick.delaunay@foss.st.com> From: Alexandre TORGUE In-Reply-To: <20231117143338.1173475-1-patrick.delaunay@foss.st.com> X-Originating-IP: [10.201.21.122] X-ClientProxiedBy: EQNCAS1NODE4.st.com (10.75.129.82) To SHFDAG1NODE1.st.com (10.75.129.69) X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.272,Aquarius:18.0.997,Hydra:6.0.619,FMLib:17.11.176.26 definitions=2023-12-14_11,2023-12-14_01,2023-05-22_02 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20231214_082908_495642_A016D06B X-CRM114-Status: GOOD ( 13.37 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Transfer-Encoding: 7bit Content-Type: text/plain; charset="us-ascii"; Format="flowed" Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Hi On 11/17/23 15:33, Patrick Delaunay wrote: > > Non volatile memory area is available on STM32MP25 with OTP in BSEC. > > The 12 Kbits of OTP (effective) for STM32MP25x SoC Family > are organized into the following regions: > - lower OTP (OTP0 to OTP127) = 4096 lower OTP bits, > bitwise (1-bit) programmable > - mid OTP (OTP128 to OTP255) = 4096 middle OTP bits, > bulk (32-bit) programmable > - upper OTP (OTP256 to OTP383) = 4096 upper OTP bits, > bulk (32-bit) programmable, > only accessible when BSEC is in closed state. > > BSEC is only accessible by secure world, so the OTP access is done > by driver with OP-TEE TA, as on STM32MP13x family. > > > > Patrick Delaunay (4): > dt-bindings: nvmem: add new stm32mp25 compatible for stm32-romem > nvmem: stm32: add support for STM32MP25 BSEC to control OTP data > arm64: defconfig: enable NVMEM STM32 ROMEM for stm32mp25 > nvmem: add bsec support to stm32mp25 > > .../bindings/nvmem/st,stm32-romem.yaml | 1 + > arch/arm64/boot/dts/st/stm32mp251.dtsi | 16 ++++++++++++++++ > arch/arm64/configs/defconfig | 1 + > drivers/nvmem/stm32-romem.c | 16 ++++++++++++++++ > 4 files changed, 34 insertions(+) > patch[4] (DT) applied on stm32-next. thanks Alex _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel