From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-8.2 required=3.0 tests=DKIMWL_WL_HIGH,DKIM_SIGNED, DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PATCH,MAILING_LIST_MULTI, SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_SANE_1 autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 59DE9C3A5A1 for ; Wed, 28 Aug 2019 16:16:47 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 2DF7822CED for ; Wed, 28 Aug 2019 16:16:47 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=lists.infradead.org header.i=@lists.infradead.org header.b="UB7Gi7fB"; dkim=fail reason="signature verification failed" (2048-bit key) header.d=nvidia.com header.i=@nvidia.com header.b="ddOdhhcY" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 2DF7822CED Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=nvidia.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-arm-kernel-bounces+infradead-linux-arm-kernel=archiver.kernel.org@lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20170209; h=Sender:Content-Type: Content-Transfer-Encoding:Cc:List-Subscribe:List-Help:List-Post:List-Archive: List-Unsubscribe:List-Id:In-Reply-To:MIME-Version:Date:Message-ID:From: References:To:Subject:Reply-To:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=tqpqshNXrewOvIrzWmyQPZt4lZ19kybtzjr9dGyt0g4=; b=UB7Gi7fBJy0jrhS0mQbpgRHp1 zemiylYJFvVNoeXFn1YhLBmRd4Od+YSPVsyIAogCxuGHk0iS4hEsBG7Z1Z0GTWxixNmc0sgDK1rDB dyAYDECDWunK0j761G54X7KJhYIQ3Z1BacaF4UXFeqSkgpFUKvh6KbrDMz8TqQ/qq/ifLcqGJYwf6 FiOYjnY9EhNf4SeHLvl/e4/B8Eq575LpanjdabzHLxvQeh4bp3RjQwymIzQMZ1V/v/OR0l0pBejTg S9B2vXAFo0gEVpFkILhAHpLkDGAdECGjLjyiLzpudE6MkT2RUYfaXNDMPAfzT8SgfgCT9Cf0r4O/r PmZg/dzig==; Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.92 #3 (Red Hat Linux)) id 1i30ci-0005TK-9F; Wed, 28 Aug 2019 16:16:40 +0000 Received: from hqemgate15.nvidia.com ([216.228.121.64]) by bombadil.infradead.org with esmtps (Exim 4.92 #3 (Red Hat Linux)) id 1i30cf-0005SZ-3s for linux-arm-kernel@lists.infradead.org; Wed, 28 Aug 2019 16:16:38 +0000 Received: from hqpgpgate101.nvidia.com (Not Verified[216.228.121.13]) by hqemgate15.nvidia.com (using TLS: TLSv1.2, DES-CBC3-SHA) id ; Wed, 28 Aug 2019 09:16:36 -0700 Received: from hqmail.nvidia.com ([172.20.161.6]) by hqpgpgate101.nvidia.com (PGP Universal service); Wed, 28 Aug 2019 09:16:34 -0700 X-PGP-Universal: processed; by hqpgpgate101.nvidia.com on Wed, 28 Aug 2019 09:16:34 -0700 Received: from DRHQMAIL107.nvidia.com (10.27.9.16) by HQMAIL101.nvidia.com (172.20.187.10) with Microsoft SMTP Server (TLS) id 15.0.1473.3; Wed, 28 Aug 2019 16:16:33 +0000 Received: from [10.25.74.161] (10.124.1.5) by DRHQMAIL107.nvidia.com (10.27.9.16) with Microsoft SMTP Server (TLS) id 15.0.1473.3; Wed, 28 Aug 2019 16:16:28 +0000 Subject: Re: [PATCH V2 3/6] PCI: tegra: Add support to configure sideband pins To: Andrew Murray References: <20190828131505.28475-1-vidyas@nvidia.com> <20190828131505.28475-4-vidyas@nvidia.com> <20190828150739.GX14582@e119886-lin.cambridge.arm.com> X-Nvconfidentiality: public From: Vidya Sagar Message-ID: <015280f6-cf13-9a36-6ae7-77476d089af4@nvidia.com> Date: Wed, 28 Aug 2019 21:46:26 +0530 User-Agent: Mozilla/5.0 (Windows NT 10.0; WOW64; rv:60.0) Gecko/20100101 Thunderbird/60.8.0 MIME-Version: 1.0 In-Reply-To: <20190828150739.GX14582@e119886-lin.cambridge.arm.com> X-Originating-IP: [10.124.1.5] X-ClientProxiedBy: HQMAIL101.nvidia.com (172.20.187.10) To DRHQMAIL107.nvidia.com (10.27.9.16) Content-Language: en-US DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=nvidia.com; s=n1; t=1567008996; bh=vkYR9GMGra4mXvzpjpzlucRSvf0JCKSyhfkQefgDo5g=; h=X-PGP-Universal:Subject:To:CC:References:X-Nvconfidentiality:From: Message-ID:Date:User-Agent:MIME-Version:In-Reply-To: X-Originating-IP:X-ClientProxiedBy:Content-Type:Content-Language: Content-Transfer-Encoding; b=ddOdhhcYgMCMUdb0NaOCMhghD3DAvywx7L0BfIq4QMvoctZLVx6TYtgcTOWclJqd1 Kk5QMQWGX+FdIkHUG+yE+dFVqPPL2JPHnamym5DTHQJ5RrGsjvtzPckOR4ct3icH3n kCVV6C3TQnc35zWT2euvmQP/mBZ52L7x1JhVWJAgvn05Mi5U8tbzCM6htKUHVtGfl6 xYhsu/1q0UBrr458CbH/lzSxu99dJmrc1xEPJJ3IMYPLXhWR0TKHihzHQNrpli90zw FtrGsKFehb71WlKSxCLC9ZxPCmQYeXv7qntl9qOoeOh8VaCFgBbrNAorTAI4jyOjwX df6qf8GLoa4GA== X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20190828_091637_172603_99416FC0 X-CRM114-Status: GOOD ( 13.37 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: devicetree@vger.kernel.org, lorenzo.pieralisi@arm.com, mperttunen@nvidia.com, mmaddireddy@nvidia.com, kthota@nvidia.com, gustavo.pimentel@synopsys.com, linux-kernel@vger.kernel.org, robh+dt@kernel.org, kishon@ti.com, linux-tegra@vger.kernel.org, thierry.reding@gmail.com, linux-pci@vger.kernel.org, bhelgaas@google.com, digetx@gmail.com, jonathanh@nvidia.com, linux-arm-kernel@lists.infradead.org, sagar.tv@gmail.com Content-Transfer-Encoding: 7bit Content-Type: text/plain; charset="us-ascii"; Format="flowed" Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+infradead-linux-arm-kernel=archiver.kernel.org@lists.infradead.org On 8/28/2019 8:37 PM, Andrew Murray wrote: > On Wed, Aug 28, 2019 at 06:45:02PM +0530, Vidya Sagar wrote: >> Add support to configure sideband signal pins when information is present >> in respective controller's device-tree node. >> >> Signed-off-by: Vidya Sagar >> --- >> V2: >> * Addressed review comment from Andrew Murray >> * Handled failure case of pinctrl_pm_select_default_state() cleanly >> >> drivers/pci/controller/dwc/pcie-tegra194.c | 11 +++++++++-- >> 1 file changed, 9 insertions(+), 2 deletions(-) >> >> diff --git a/drivers/pci/controller/dwc/pcie-tegra194.c b/drivers/pci/controller/dwc/pcie-tegra194.c >> index fc0dbeb31d78..057ba4f9fbcd 100644 >> --- a/drivers/pci/controller/dwc/pcie-tegra194.c >> +++ b/drivers/pci/controller/dwc/pcie-tegra194.c >> @@ -1304,8 +1304,13 @@ static int tegra_pcie_config_rp(struct tegra_pcie_dw *pcie) >> if (ret < 0) { >> dev_err(dev, "Failed to get runtime sync for PCIe dev: %d\n", >> ret); >> - pm_runtime_disable(dev); >> - return ret; >> + goto fail_pm_get_sync; >> + } >> + >> + ret = pinctrl_pm_select_default_state(pcie->dev); > > This patch looks OK, though you're still using pcie->dev here instead of dev. I'll take care of this. Thanks for the thorough review. - Vidya Sagar > > Thanks, > > Andrew Murray > >> + if (ret < 0) { >> + dev_err(dev, "Failed to configure sideband pins: %d\n", ret); >> + goto fail_pinctrl; >> } >> >> tegra_pcie_init_controller(pcie); >> @@ -1332,7 +1337,9 @@ static int tegra_pcie_config_rp(struct tegra_pcie_dw *pcie) >> >> fail_host_init: >> tegra_pcie_deinit_controller(pcie); >> +fail_pinctrl: >> pm_runtime_put_sync(dev); >> +fail_pm_get_sync: >> pm_runtime_disable(dev); >> return ret; >> } >> -- >> 2.17.1 >> _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel