* [PATCH] ARM: EXYNOS4: Add ARMLEX4210 Board support file
@ 2011-03-03 7:27 ALIM AKHTAR
2011-03-03 9:06 ` Kyungmin Park
0 siblings, 1 reply; 3+ messages in thread
From: ALIM AKHTAR @ 2011-03-03 7:27 UTC (permalink / raw)
To: linux-arm-kernel
This patch is based on 'for-next' branch of kgene tree.
This patch adds Samsung ARMLEX4210 board support file
which is based on Exynos4210.
Signed-off-by: Alim Akhtar <alim.akhtar@samsung.com>
---
arch/arm/mach-exynos4/Kconfig | 13 ++
arch/arm/mach-exynos4/Makefile | 1 +
arch/arm/mach-exynos4/mach-armlex4210.c | 213 +++++++++++++++++++++++++++++++
3 files changed, 227 insertions(+), 0 deletions(-)
create mode 100644 arch/arm/mach-exynos4/mach-armlex4210.c
diff --git a/arch/arm/mach-exynos4/Kconfig b/arch/arm/mach-exynos4/Kconfig
index ad03840..a12bddf 100644
--- a/arch/arm/mach-exynos4/Kconfig
+++ b/arch/arm/mach-exynos4/Kconfig
@@ -109,6 +109,19 @@ config MACH_SMDKV310
help
Machine support for Samsung SMDKV310
+config MACH_ARMLEX4210
+ bool "ARMLEX4210"
+ select CPU_EXYNOS4210
+ select S3C_DEV_RTC
+ select S3C_DEV_WDT
+ select S3C_DEV_HSMMC
+ select S3C_DEV_HSMMC2
+ select S3C_DEV_HSMMC3
+ select EXYNOS4_DEV_SYSMMU
+ select EXYNOS4_SETUP_SDHCI
+ help
+ Machine support for Samsung ARMLEX4210 based on EXYNOS4210
+
config MACH_UNIVERSAL_C210
bool "Mobile UNIVERSAL_C210 Board"
select CPU_EXYNOS4210
diff --git a/arch/arm/mach-exynos4/Makefile b/arch/arm/mach-exynos4/Makefile
index 0558235..2860af8 100644
--- a/arch/arm/mach-exynos4/Makefile
+++ b/arch/arm/mach-exynos4/Makefile
@@ -24,6 +24,7 @@ obj-$(CONFIG_HOTPLUG_CPU) += hotplug.o
obj-$(CONFIG_MACH_SMDKC210) += mach-smdkc210.o
obj-$(CONFIG_MACH_SMDKV310) += mach-smdkv310.o
+obj-$(CONFIG_MACH_ARMLEX4210) += mach-armlex4210.o
obj-$(CONFIG_MACH_UNIVERSAL_C210) += mach-universal_c210.o
# device support
diff --git a/arch/arm/mach-exynos4/mach-armlex4210.c b/arch/arm/mach-exynos4/mach-armlex4210.c
new file mode 100644
index 0000000..856ab6e
--- /dev/null
+++ b/arch/arm/mach-exynos4/mach-armlex4210.c
@@ -0,0 +1,213 @@
+/* linux/arch/arm/mach-exynos4/mach-armlex4210.c
+ *
+ * Copyright (c) 2011 Samsung Electronics Co., Ltd.
+ * http://www.samsung.com
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+#include <linux/gpio.h>
+#include <linux/io.h>
+#include <linux/mmc/host.h>
+#include <linux/platform_device.h>
+#include <linux/serial_core.h>
+#include <linux/smsc911x.h>
+
+#include <asm/mach/arch.h>
+#include <asm/mach-types.h>
+
+#include <plat/cpu.h>
+#include <plat/devs.h>
+#include <plat/exynos4.h>
+#include <plat/gpio-cfg.h>
+#include <plat/regs-serial.h>
+#include <plat/regs-srom.h>
+#include <plat/sdhci.h>
+
+#include <mach/map.h>
+
+/* Following are default values for UCON, ULCON and UFCON UART registers */
+#define ARMLEX4210_UCON_DEFAULT (S3C2410_UCON_TXILEVEL | \
+ S3C2410_UCON_RXILEVEL | \
+ S3C2410_UCON_TXIRQMODE | \
+ S3C2410_UCON_RXIRQMODE | \
+ S3C2410_UCON_RXFIFO_TOI | \
+ S3C2443_UCON_RXERR_IRQEN)
+
+#define ARMLEX4210_ULCON_DEFAULT S3C2410_LCON_CS8
+
+#define ARMLEX4210_UFCON_DEFAULT (S3C2410_UFCON_FIFOMODE | \
+ S5PV210_UFCON_TXTRIG4 | \
+ S5PV210_UFCON_RXTRIG4)
+
+static struct s3c2410_uartcfg armlex4210_uartcfgs[] __initdata = {
+ [0] = {
+ .hwport = 0,
+ .flags = 0,
+ .ucon = ARMLEX4210_UCON_DEFAULT,
+ .ulcon = ARMLEX4210_ULCON_DEFAULT,
+ .ufcon = ARMLEX4210_UFCON_DEFAULT,
+ },
+ [1] = {
+ .hwport = 1,
+ .flags = 0,
+ .ucon = ARMLEX4210_UCON_DEFAULT,
+ .ulcon = ARMLEX4210_ULCON_DEFAULT,
+ .ufcon = ARMLEX4210_UFCON_DEFAULT,
+ },
+ [2] = {
+ .hwport = 2,
+ .flags = 0,
+ .ucon = ARMLEX4210_UCON_DEFAULT,
+ .ulcon = ARMLEX4210_ULCON_DEFAULT,
+ .ufcon = ARMLEX4210_UFCON_DEFAULT,
+ },
+ [3] = {
+ .hwport = 3,
+ .flags = 0,
+ .ucon = ARMLEX4210_UCON_DEFAULT,
+ .ulcon = ARMLEX4210_ULCON_DEFAULT,
+ .ufcon = ARMLEX4210_UFCON_DEFAULT,
+ },
+};
+
+static struct s3c_sdhci_platdata armlex4210_hsmmc0_pdata __initdata = {
+ .cd_type = S3C_SDHCI_CD_PERMANENT,
+ .clk_type = S3C_SDHCI_CLK_DIV_EXTERNAL,
+#ifdef CONFIG_EXYNOS4_SDHCI_CH0_8BIT
+ .max_width = 8,
+ .host_caps = MMC_CAP_8_BIT_DATA,
+#endif
+};
+
+static struct s3c_sdhci_platdata armlex4210_hsmmc2_pdata __initdata = {
+ .cd_type = S3C_SDHCI_CD_GPIO,
+ .ext_cd_gpio = EXYNOS4_GPX2(5),
+ .ext_cd_gpio_invert = 1,
+ .clk_type = S3C_SDHCI_CLK_DIV_EXTERNAL,
+ .max_width = 4,
+};
+
+static struct s3c_sdhci_platdata armlex4210_hsmmc3_pdata __initdata = {
+ .cd_type = S3C_SDHCI_CD_PERMANENT,
+ .max_width = 4,
+};
+
+static void __init armlex4210_sdhci_init(void)
+{
+ s3c_sdhci0_set_platdata(&armlex4210_hsmmc0_pdata);
+ s3c_sdhci2_set_platdata(&armlex4210_hsmmc2_pdata);
+ s3c_sdhci3_set_platdata(&armlex4210_hsmmc3_pdata);
+}
+
+static void __init armlex4210_wlan_init(void)
+{
+ /* enable */
+ s3c_gpio_cfgpin(EXYNOS4_GPX2(0), S3C_GPIO_SFN(0xf));
+ s3c_gpio_setpull(EXYNOS4_GPX2(0), S3C_GPIO_PULL_UP);
+
+ /* reset */
+ s3c_gpio_cfgpin(EXYNOS4_GPX1(6), S3C_GPIO_SFN(0xf));
+ s3c_gpio_setpull(EXYNOS4_GPX1(6), S3C_GPIO_PULL_UP);
+
+ /* wakeup */
+ s3c_gpio_cfgpin(EXYNOS4_GPX1(5), S3C_GPIO_SFN(0xf));
+ s3c_gpio_setpull(EXYNOS4_GPX1(5), S3C_GPIO_PULL_UP);
+}
+
+static struct resource armlex4210_smsc911x_resources[] = {
+ [0] = {
+ .start = EXYNOS4_PA_SROM_BANK(3),
+ .end = EXYNOS4_PA_SROM_BANK(3) + SZ_64K - 1,
+ .flags = IORESOURCE_MEM,
+ },
+ [1] = {
+ .start = IRQ_EINT(27),
+ .end = IRQ_EINT(27),
+ .flags = IORESOURCE_IRQ | IRQF_TRIGGER_HIGH,
+ },
+};
+
+static struct smsc911x_platform_config smsc9215_config = {
+ .irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_HIGH,
+ .irq_type = SMSC911X_IRQ_TYPE_PUSH_PULL,
+ .flags = SMSC911X_USE_16BIT | SMSC911X_FORCE_INTERNAL_PHY,
+ .phy_interface = PHY_INTERFACE_MODE_MII,
+ .mac = {0x00, 0x80, 0x00, 0x23, 0x45, 0x67},
+};
+
+static struct platform_device armlex4210_smsc911x = {
+ .name = "smsc911x",
+ .id = -1,
+ .num_resources = ARRAY_SIZE(armlex4210_smsc911x_resources),
+ .resource = armlex4210_smsc911x_resources,
+ .dev = {
+ .platform_data = &smsc9215_config,
+ },
+};
+
+static struct platform_device *armlex4210_devices[] __initdata = {
+ &s3c_device_hsmmc0,
+ &s3c_device_hsmmc2,
+ &s3c_device_hsmmc3,
+ &s3c_device_rtc,
+ &s3c_device_wdt,
+ &exynos4_device_sysmmu,
+ &samsung_asoc_dma,
+ &armlex4210_smsc911x,
+};
+
+static void __init armlex4210_smsc911x_init(void)
+{
+ u32 cs1;
+
+ /* configure nCS1 width to 16 bits */
+ cs1 = __raw_readl(S5P_SROM_BW) &
+ ~(S5P_SROM_BW__CS_MASK << S5P_SROM_BW__NCS1__SHIFT);
+ cs1 |= ((1 << S5P_SROM_BW__DATAWIDTH__SHIFT) |
+ (0 << S5P_SROM_BW__WAITENABLE__SHIFT) |
+ (1 << S5P_SROM_BW__ADDRMODE__SHIFT) |
+ (1 << S5P_SROM_BW__BYTEENABLE__SHIFT)) <<
+ S5P_SROM_BW__NCS1__SHIFT;
+ __raw_writel(cs1, S5P_SROM_BW);
+
+ /* set timing for nCS1 suitable for ethernet chip */
+ __raw_writel((0x1 << S5P_SROM_BCX__PMC__SHIFT) |
+ (0x9 << S5P_SROM_BCX__TACP__SHIFT) |
+ (0xc << S5P_SROM_BCX__TCAH__SHIFT) |
+ (0x1 << S5P_SROM_BCX__TCOH__SHIFT) |
+ (0x6 << S5P_SROM_BCX__TACC__SHIFT) |
+ (0x1 << S5P_SROM_BCX__TCOS__SHIFT) |
+ (0x1 << S5P_SROM_BCX__TACS__SHIFT), S5P_SROM_BC1);
+}
+
+static void __init armlex4210_map_io(void)
+{
+ s5p_init_io(NULL, 0, S5P_VA_CHIPID);
+ s3c24xx_init_clocks(24000000);
+ s3c24xx_init_uarts(armlex4210_uartcfgs,
+ ARRAY_SIZE(armlex4210_uartcfgs));
+}
+
+static void __init armlex4210_machine_init(void)
+{
+ armlex4210_smsc911x_init();
+
+ armlex4210_sdhci_init();
+
+ armlex4210_wlan_init();
+
+ platform_add_devices(armlex4210_devices,
+ ARRAY_SIZE(armlex4210_devices));
+}
+
+MACHINE_START(ARMLEX4210, "ARMLEX4210")
+ /* Maintainer: Alim Akhtar <alim.akhtar@samsung.com> */
+ .boot_params = S5P_PA_SDRAM + 0x100,
+ .init_irq = exynos4_init_irq,
+ .map_io = armlex4210_map_io,
+ .init_machine = armlex4210_machine_init,
+ .timer = &exynos4_timer,
+MACHINE_END
--
1.7.0.4
^ permalink raw reply related [flat|nested] 3+ messages in thread
* [PATCH] ARM: EXYNOS4: Add ARMLEX4210 Board support file
2011-03-03 7:27 [PATCH] ARM: EXYNOS4: Add ARMLEX4210 Board support file ALIM AKHTAR
@ 2011-03-03 9:06 ` Kyungmin Park
2011-03-04 7:29 ` Kukjin Kim
0 siblings, 1 reply; 3+ messages in thread
From: Kyungmin Park @ 2011-03-03 9:06 UTC (permalink / raw)
To: linux-arm-kernel
On Thu, Mar 3, 2011 at 4:27 PM, ALIM AKHTAR <alim.akhtar@samsung.com> wrote:
> This patch is based on 'for-next' ?branch of kgene tree.
>
> This patch adds Samsung ARMLEX4210 ?board support file
> which is based on Exynos4210.
>
> Signed-off-by: Alim Akhtar <alim.akhtar@samsung.com>
> ---
> ?arch/arm/mach-exynos4/Kconfig ? ? ? ? ? | ? 13 ++
> ?arch/arm/mach-exynos4/Makefile ? ? ? ? ?| ? ?1 +
> ?arch/arm/mach-exynos4/mach-armlex4210.c | ?213 +++++++++++++++++++++++++++++++
> ?3 files changed, 227 insertions(+), 0 deletions(-)
> ?create mode 100644 arch/arm/mach-exynos4/mach-armlex4210.c
>
> diff --git a/arch/arm/mach-exynos4/Kconfig b/arch/arm/mach-exynos4/Kconfig
> index ad03840..a12bddf 100644
> --- a/arch/arm/mach-exynos4/Kconfig
> +++ b/arch/arm/mach-exynos4/Kconfig
> @@ -109,6 +109,19 @@ config MACH_SMDKV310
> ? ? ? ?help
> ? ? ? ? ?Machine support for Samsung SMDKV310
>
> +config MACH_ARMLEX4210
> + ? ? ? bool "ARMLEX4210"
> + ? ? ? select CPU_EXYNOS4210
> + ? ? ? select S3C_DEV_RTC
> + ? ? ? select S3C_DEV_WDT
> + ? ? ? select S3C_DEV_HSMMC
> + ? ? ? select S3C_DEV_HSMMC2
> + ? ? ? select S3C_DEV_HSMMC3
> + ? ? ? select EXYNOS4_DEV_SYSMMU
> + ? ? ? select EXYNOS4_SETUP_SDHCI
> + ? ? ? help
> + ? ? ? ? Machine support for Samsung ARMLEX4210 based on EXYNOS4210
> +
> ?config MACH_UNIVERSAL_C210
> ? ? ? ?bool "Mobile UNIVERSAL_C210 Board"
> ? ? ? ?select CPU_EXYNOS4210
> diff --git a/arch/arm/mach-exynos4/Makefile b/arch/arm/mach-exynos4/Makefile
> index 0558235..2860af8 100644
> --- a/arch/arm/mach-exynos4/Makefile
> +++ b/arch/arm/mach-exynos4/Makefile
> @@ -24,6 +24,7 @@ obj-$(CONFIG_HOTPLUG_CPU) ? ? += hotplug.o
>
> ?obj-$(CONFIG_MACH_SMDKC210) ? ? ? ? ? ?+= mach-smdkc210.o
> ?obj-$(CONFIG_MACH_SMDKV310) ? ? ? ? ? ?+= mach-smdkv310.o
> +obj-$(CONFIG_MACH_ARMLEX4210) ? ? ? ? ?+= mach-armlex4210.o
> ?obj-$(CONFIG_MACH_UNIVERSAL_C210) ? ? ?+= mach-universal_c210.o
>
> ?# device support
> diff --git a/arch/arm/mach-exynos4/mach-armlex4210.c b/arch/arm/mach-exynos4/mach-armlex4210.c
> new file mode 100644
> index 0000000..856ab6e
> --- /dev/null
> +++ b/arch/arm/mach-exynos4/mach-armlex4210.c
> @@ -0,0 +1,213 @@
> +/* linux/arch/arm/mach-exynos4/mach-armlex4210.c
> + *
> + * Copyright (c) 2011 Samsung Electronics Co., Ltd.
> + * ? ? ? ? ? ? http://www.samsung.com
> + *
> + * This program is free software; you can redistribute it and/or modify
> + * it under the terms of the GNU General Public License version 2 as
> + * published by the Free Software Foundation.
> +*/
> +
> +#include <linux/gpio.h>
> +#include <linux/io.h>
> +#include <linux/mmc/host.h>
> +#include <linux/platform_device.h>
> +#include <linux/serial_core.h>
> +#include <linux/smsc911x.h>
> +
> +#include <asm/mach/arch.h>
> +#include <asm/mach-types.h>
> +
> +#include <plat/cpu.h>
> +#include <plat/devs.h>
> +#include <plat/exynos4.h>
> +#include <plat/gpio-cfg.h>
> +#include <plat/regs-serial.h>
> +#include <plat/regs-srom.h>
> +#include <plat/sdhci.h>
> +
> +#include <mach/map.h>
> +
> +/* Following are default values for UCON, ULCON and UFCON UART registers */
> +#define ARMLEX4210_UCON_DEFAULT ? ? ? ?(S3C2410_UCON_TXILEVEL | ? ? ? ?\
> + ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ?S3C2410_UCON_RXILEVEL | ? ? ? ?\
> + ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ?S3C2410_UCON_TXIRQMODE | ? ? ? \
> + ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ?S3C2410_UCON_RXIRQMODE | ? ? ? \
> + ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ?S3C2410_UCON_RXFIFO_TOI | ? ? ?\
> + ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ?S3C2443_UCON_RXERR_IRQEN)
> +
> +#define ARMLEX4210_ULCON_DEFAULT ? ? ? S3C2410_LCON_CS8
> +
> +#define ARMLEX4210_UFCON_DEFAULT ? ? ? (S3C2410_UFCON_FIFOMODE | ? ? ? \
> + ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ?S5PV210_UFCON_TXTRIG4 | ? ? ? ?\
> + ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ?S5PV210_UFCON_RXTRIG4)
> +
> +static struct s3c2410_uartcfg armlex4210_uartcfgs[] __initdata = {
> + ? ? ? [0] = {
> + ? ? ? ? ? ? ? .hwport ? ? ? ? = 0,
> + ? ? ? ? ? ? ? .flags ? ? ? ? ?= 0,
> + ? ? ? ? ? ? ? .ucon ? ? ? ? ? = ARMLEX4210_UCON_DEFAULT,
> + ? ? ? ? ? ? ? .ulcon ? ? ? ? ?= ARMLEX4210_ULCON_DEFAULT,
> + ? ? ? ? ? ? ? .ufcon ? ? ? ? ?= ARMLEX4210_UFCON_DEFAULT,
> + ? ? ? },
> + ? ? ? [1] = {
> + ? ? ? ? ? ? ? .hwport ? ? ? ? = 1,
> + ? ? ? ? ? ? ? .flags ? ? ? ? ?= 0,
> + ? ? ? ? ? ? ? .ucon ? ? ? ? ? = ARMLEX4210_UCON_DEFAULT,
> + ? ? ? ? ? ? ? .ulcon ? ? ? ? ?= ARMLEX4210_ULCON_DEFAULT,
> + ? ? ? ? ? ? ? .ufcon ? ? ? ? ?= ARMLEX4210_UFCON_DEFAULT,
> + ? ? ? },
> + ? ? ? [2] = {
> + ? ? ? ? ? ? ? .hwport ? ? ? ? = 2,
> + ? ? ? ? ? ? ? .flags ? ? ? ? ?= 0,
> + ? ? ? ? ? ? ? .ucon ? ? ? ? ? = ARMLEX4210_UCON_DEFAULT,
> + ? ? ? ? ? ? ? .ulcon ? ? ? ? ?= ARMLEX4210_ULCON_DEFAULT,
> + ? ? ? ? ? ? ? .ufcon ? ? ? ? ?= ARMLEX4210_UFCON_DEFAULT,
> + ? ? ? },
> + ? ? ? [3] = {
> + ? ? ? ? ? ? ? .hwport ? ? ? ? = 3,
> + ? ? ? ? ? ? ? .flags ? ? ? ? ?= 0,
> + ? ? ? ? ? ? ? .ucon ? ? ? ? ? = ARMLEX4210_UCON_DEFAULT,
> + ? ? ? ? ? ? ? .ulcon ? ? ? ? ?= ARMLEX4210_ULCON_DEFAULT,
> + ? ? ? ? ? ? ? .ufcon ? ? ? ? ?= ARMLEX4210_UFCON_DEFAULT,
> + ? ? ? },
> +};
> +
> +static struct s3c_sdhci_platdata armlex4210_hsmmc0_pdata __initdata = {
> + ? ? ? .cd_type ? ? ? ? ? ? ? ?= S3C_SDHCI_CD_PERMANENT,
> + ? ? ? .clk_type ? ? ? ? ? ? ? = S3C_SDHCI_CLK_DIV_EXTERNAL,
> +#ifdef CONFIG_EXYNOS4_SDHCI_CH0_8BIT
> + ? ? ? .max_width ? ? ? ? ? ? ?= 8,
> + ? ? ? .host_caps ? ? ? ? ? ? ?= MMC_CAP_8_BIT_DATA,
> +#endif
> +};
> +
> +static struct s3c_sdhci_platdata armlex4210_hsmmc2_pdata __initdata = {
> + ? ? ? .cd_type ? ? ? ? ? ? ? ?= S3C_SDHCI_CD_GPIO,
> + ? ? ? .ext_cd_gpio ? ? ? ? ? ?= EXYNOS4_GPX2(5),
> + ? ? ? .ext_cd_gpio_invert ? ? = 1,
> + ? ? ? .clk_type ? ? ? ? ? ? ? = S3C_SDHCI_CLK_DIV_EXTERNAL,
> + ? ? ? .max_width ? ? ? ? ? ? ?= 4,
> +};
> +
> +static struct s3c_sdhci_platdata armlex4210_hsmmc3_pdata __initdata = {
> + ? ? ? .cd_type ? ? ? ? ? ? ? ?= S3C_SDHCI_CD_PERMANENT,
> + ? ? ? .max_width ? ? ? ? ? ? ?= 4,
maybe you missed the clk_type. It's required for exynos4 series.
clk_type ? ? ? ? ? ? ? = S3C_SDHCI_CLK_DIV_EXTERNAL,
> +};
> +
> +static void __init armlex4210_sdhci_init(void)
> +{
> + ? ? ? s3c_sdhci0_set_platdata(&armlex4210_hsmmc0_pdata);
> + ? ? ? s3c_sdhci2_set_platdata(&armlex4210_hsmmc2_pdata);
> + ? ? ? s3c_sdhci3_set_platdata(&armlex4210_hsmmc3_pdata);
> +}
> +
> +static void __init armlex4210_wlan_init(void)
> +{
> + ? ? ? /* enable */
> + ? ? ? s3c_gpio_cfgpin(EXYNOS4_GPX2(0), S3C_GPIO_SFN(0xf));
> + ? ? ? s3c_gpio_setpull(EXYNOS4_GPX2(0), S3C_GPIO_PULL_UP);
> +
> + ? ? ? /* reset */
> + ? ? ? s3c_gpio_cfgpin(EXYNOS4_GPX1(6), S3C_GPIO_SFN(0xf));
> + ? ? ? s3c_gpio_setpull(EXYNOS4_GPX1(6), S3C_GPIO_PULL_UP);
> +
> + ? ? ? /* wakeup */
> + ? ? ? s3c_gpio_cfgpin(EXYNOS4_GPX1(5), S3C_GPIO_SFN(0xf));
> + ? ? ? s3c_gpio_setpull(EXYNOS4_GPX1(5), S3C_GPIO_PULL_UP);
> +}
> +
> +static struct resource armlex4210_smsc911x_resources[] = {
> + ? ? ? [0] = {
> + ? ? ? ? ? ? ? .start ?= EXYNOS4_PA_SROM_BANK(3),
> + ? ? ? ? ? ? ? .end ? ?= EXYNOS4_PA_SROM_BANK(3) + SZ_64K - 1,
> + ? ? ? ? ? ? ? .flags ?= IORESOURCE_MEM,
> + ? ? ? },
> + ? ? ? [1] = {
> + ? ? ? ? ? ? ? .start ?= IRQ_EINT(27),
> + ? ? ? ? ? ? ? .end ? ?= IRQ_EINT(27),
> + ? ? ? ? ? ? ? .flags ?= IORESOURCE_IRQ | IRQF_TRIGGER_HIGH,
> + ? ? ? },
> +};
> +
> +static struct smsc911x_platform_config smsc9215_config = {
> + ? ? ? .irq_polarity ? = SMSC911X_IRQ_POLARITY_ACTIVE_HIGH,
> + ? ? ? .irq_type ? ? ? = SMSC911X_IRQ_TYPE_PUSH_PULL,
> + ? ? ? .flags ? ? ? ? ?= SMSC911X_USE_16BIT | SMSC911X_FORCE_INTERNAL_PHY,
> + ? ? ? .phy_interface ?= PHY_INTERFACE_MODE_MII,
> + ? ? ? .mac ? ? ? ? ? ?= {0x00, 0x80, 0x00, 0x23, 0x45, 0x67},
> +};
> +
> +static struct platform_device armlex4210_smsc911x = {
> + ? ? ? .name ? ? ? ? ? = "smsc911x",
> + ? ? ? .id ? ? ? ? ? ? = -1,
> + ? ? ? .num_resources ?= ARRAY_SIZE(armlex4210_smsc911x_resources),
> + ? ? ? .resource ? ? ? = armlex4210_smsc911x_resources,
> + ? ? ? .dev ? ? ? ? ? ?= {
> + ? ? ? ? ? ? ? .platform_data ?= &smsc9215_config,
> + ? ? ? },
> +};
> +
> +static struct platform_device *armlex4210_devices[] __initdata = {
> + ? ? ? &s3c_device_hsmmc0,
> + ? ? ? &s3c_device_hsmmc2,
> + ? ? ? &s3c_device_hsmmc3,
> + ? ? ? &s3c_device_rtc,
> + ? ? ? &s3c_device_wdt,
> + ? ? ? &exynos4_device_sysmmu,
> + ? ? ? &samsung_asoc_dma,
> + ? ? ? &armlex4210_smsc911x,
> +};
> +
> +static void __init armlex4210_smsc911x_init(void)
> +{
> + ? ? ? u32 cs1;
> +
> + ? ? ? /* configure nCS1 width to 16 bits */
> + ? ? ? cs1 = __raw_readl(S5P_SROM_BW) &
> + ? ? ? ? ? ? ? ~(S5P_SROM_BW__CS_MASK << S5P_SROM_BW__NCS1__SHIFT);
> + ? ? ? cs1 |= ((1 << S5P_SROM_BW__DATAWIDTH__SHIFT) |
> + ? ? ? ? ? ? ? (0 << S5P_SROM_BW__WAITENABLE__SHIFT) |
> + ? ? ? ? ? ? ? (1 << S5P_SROM_BW__ADDRMODE__SHIFT) |
> + ? ? ? ? ? ? ? (1 << S5P_SROM_BW__BYTEENABLE__SHIFT)) <<
> + ? ? ? ? ? ? ? S5P_SROM_BW__NCS1__SHIFT;
> + ? ? ? __raw_writel(cs1, S5P_SROM_BW);
> +
> + ? ? ? /* set timing for nCS1 suitable for ethernet chip */
> + ? ? ? __raw_writel((0x1 << S5P_SROM_BCX__PMC__SHIFT) |
> + ? ? ? ? ? ? ? ? ? ?(0x9 << S5P_SROM_BCX__TACP__SHIFT) |
> + ? ? ? ? ? ? ? ? ? ?(0xc << S5P_SROM_BCX__TCAH__SHIFT) |
> + ? ? ? ? ? ? ? ? ? ?(0x1 << S5P_SROM_BCX__TCOH__SHIFT) |
> + ? ? ? ? ? ? ? ? ? ?(0x6 << S5P_SROM_BCX__TACC__SHIFT) |
> + ? ? ? ? ? ? ? ? ? ?(0x1 << S5P_SROM_BCX__TCOS__SHIFT) |
> + ? ? ? ? ? ? ? ? ? ?(0x1 << S5P_SROM_BCX__TACS__SHIFT), S5P_SROM_BC1);
> +}
> +
> +static void __init armlex4210_map_io(void)
> +{
> + ? ? ? s5p_init_io(NULL, 0, S5P_VA_CHIPID);
> + ? ? ? s3c24xx_init_clocks(24000000);
> + ? ? ? s3c24xx_init_uarts(armlex4210_uartcfgs,
> + ? ? ? ? ? ? ? ? ? ? ? ? ?ARRAY_SIZE(armlex4210_uartcfgs));
> +}
> +
> +static void __init armlex4210_machine_init(void)
> +{
> + ? ? ? armlex4210_smsc911x_init();
> +
> + ? ? ? armlex4210_sdhci_init();
> +
> + ? ? ? armlex4210_wlan_init();
> +
> + ? ? ? platform_add_devices(armlex4210_devices,
> + ? ? ? ? ? ? ? ? ? ? ? ? ? ?ARRAY_SIZE(armlex4210_devices));
> +}
> +
> +MACHINE_START(ARMLEX4210, "ARMLEX4210")
> + ? ? ? /* Maintainer: Alim Akhtar <alim.akhtar@samsung.com> */
> + ? ? ? .boot_params ? ?= S5P_PA_SDRAM + 0x100,
> + ? ? ? .init_irq ? ? ? = exynos4_init_irq,
> + ? ? ? .map_io ? ? ? ? = armlex4210_map_io,
> + ? ? ? .init_machine ? = armlex4210_machine_init,
> + ? ? ? .timer ? ? ? ? ?= &exynos4_timer,
> +MACHINE_END
> --
> 1.7.0.4
>
^ permalink raw reply [flat|nested] 3+ messages in thread
* [PATCH] ARM: EXYNOS4: Add ARMLEX4210 Board support file
2011-03-03 9:06 ` Kyungmin Park
@ 2011-03-04 7:29 ` Kukjin Kim
0 siblings, 0 replies; 3+ messages in thread
From: Kukjin Kim @ 2011-03-04 7:29 UTC (permalink / raw)
To: linux-arm-kernel
Kyungmin Park wrote:
>
> On Thu, Mar 3, 2011 at 4:27 PM, ALIM AKHTAR <alim.akhtar@samsung.com>
wrote:
> > This patch is based on 'for-next' ?branch of kgene tree.
> >
> > This patch adds Samsung ARMLEX4210 ?board support file
> > which is based on Exynos4210.
> >
> > Signed-off-by: Alim Akhtar <alim.akhtar@samsung.com>
> > ---
> > ?arch/arm/mach-exynos4/Kconfig ? ? ? ? ? | ? 13 ++
> > ?arch/arm/mach-exynos4/Makefile ? ? ? ? ?| ? ?1 +
> > ?arch/arm/mach-exynos4/mach-armlex4210.c | ?213
> +++++++++++++++++++++++++++++++
> > ?3 files changed, 227 insertions(+), 0 deletions(-)
> > ?create mode 100644 arch/arm/mach-exynos4/mach-armlex4210.c
(snip)
> > +static struct s3c_sdhci_platdata armlex4210_hsmmc3_pdata __initdata = {
> > + ? ? ? .cd_type ? ? ? ? ? ? ? ?= S3C_SDHCI_CD_PERMANENT,
> > + ? ? ? .max_width ? ? ? ? ? ? ?= 4,
> maybe you missed the clk_type. It's required for exynos4 series.
> clk_type ? ? ? ? ? ? ? = S3C_SDHCI_CLK_DIV_EXTERNAL,
Right :)
The clk_type(..._EXTERNAL) should be added for Exynos4210.
Hi Alim,
Others, looks ok.
So applied with fixing above.
If any problems, please let me know.
Thanks.
Best regards,
Kgene.
--
Kukjin Kim <kgene.kim@samsung.com>, Senior Engineer,
SW Solution Development Team, Samsung Electronics Co., Ltd.
^ permalink raw reply [flat|nested] 3+ messages in thread
end of thread, other threads:[~2011-03-04 7:29 UTC | newest]
Thread overview: 3+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2011-03-03 7:27 [PATCH] ARM: EXYNOS4: Add ARMLEX4210 Board support file ALIM AKHTAR
2011-03-03 9:06 ` Kyungmin Park
2011-03-04 7:29 ` Kukjin Kim
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).