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[81.204.249.205]) by smtp.gmail.com with ESMTPSA id x21sm4892801eje.118.2021.02.26.02.47.43 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Fri, 26 Feb 2021 02:47:44 -0800 (PST) Subject: Re: [PATCH v2 1/4] dt-binding: clock: Document rockchip, rk3568-cru bindings To: Elaine Zhang , mturquette@baylibre.com, robh+dt@kernel.org, sboyd@kernel.org, heiko@sntech.de References: <20210226082234.1733-1-zhangqing@rock-chips.com> <20210226082234.1733-2-zhangqing@rock-chips.com> From: Johan Jonker Message-ID: <04bca26f-080f-384a-11c5-6fc51f82e359@gmail.com> Date: Fri, 26 Feb 2021 11:47:42 +0100 User-Agent: Mozilla/5.0 (X11; Linux i686; rv:68.0) Gecko/20100101 Thunderbird/68.11.0 MIME-Version: 1.0 In-Reply-To: <20210226082234.1733-2-zhangqing@rock-chips.com> Content-Language: en-US X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20210226_054747_864128_28BE7588 X-CRM114-Status: GOOD ( 20.35 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: huangtao@rock-chips.com, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, kever.yang@rock-chips.com, linux-rockchip@lists.infradead.org, tony.xie@rock-chips.com, finley.xiao@rock-chips.com, cl@rock-chips.com, linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Hi Elaine, On 2/26/21 9:22 AM, Elaine Zhang wrote: > Document the device tree bindings of the rockchip Rk3568 SoC > clock driver in Documentation/devicetree/bindings/clock/rockchip,rk3568-cru.yaml. > > Signed-off-by: Elaine Zhang > --- > .../bindings/clock/rockchip,rk3568-cru.yaml | 55 +++++++++++++++++++ > 1 file changed, 55 insertions(+) > create mode 100644 Documentation/devicetree/bindings/clock/rockchip,rk3568-cru.yaml > > diff --git a/Documentation/devicetree/bindings/clock/rockchip,rk3568-cru.yaml b/Documentation/devicetree/bindings/clock/rockchip,rk3568-cru.yaml > new file mode 100644 > index 000000000000..612da341ea67 > --- /dev/null > +++ b/Documentation/devicetree/bindings/clock/rockchip,rk3568-cru.yaml > @@ -0,0 +1,55 @@ > +# SPDX-License-Identifier: GPL-2.0 This is a new document. Use GPL-2.0 only for a conversion of an existing document in the main kernel. ./scripts/checkpatch.pl --strict 0001-dt-binding-clock-Document-rockchip-rk3568-cru-bindin.patch WARNING: DT binding documents should be licensed (GPL-2.0-only OR BSD-2-Clause) #21: FILE: Documentation/devicetree/bindings/clock/rockchip,rk3568-cru.yaml:1: +# SPDX-License-Identifier: GPL-2.0 > +%YAML 1.2 > +--- > +$id: http://devicetree.org/schemas/clock/rockchip,rk3568-cru.yaml# > +$schema: http://devicetree.org/meta-schemas/core.yaml# > + > +title: ROCKCHIP rk3568 Family Clock Control Module Binding > + > +maintainers: > + - Elaine Zhang - Heiko Stuebner Add the maintainer of the clock drivers as well. > + > +description: | > + The RK3568 clock controller generates and supplies clock to various supplies clock This phrase could be improved a bit. (?? generates the clocks signals for ??) > + controllers within the SoC and also implements a reset controller for SoC > + peripherals. > + > +properties: > + compatible: > + enum: > + - rockchip,rk3568-cru > + - rockchip,rk3568-pmucru > + > + reg: > + maxItems: 1 > + > + '#clock-cells': > + const: 1 > + > + '#reset-cells': > + const: 1 > + > +required: > + - compatible > + - reg > + - "#clock-cells" > + - "#reset-cells" > + > +additionalProperties: false > + > +examples: > + # Clock Control Module node: > + - | > + pmucru: clock-controller@fdd00000 { > + compatible = "rockchip,rk3568-pmucru"; > + reg = <0x0 0xfdd00000 0x0 0x1000>; Method 1 (easier): reg = <0xfdd00000 0x1000>; This example is 64 bit. The dt_binding_check uses standard 32 bit. Method 2: Add both examples in a subnode. example { #address-cells = <2>; #size-cells = <2>; pmucru {} cru {} } make ARCH=arm64 dt_binding_check DT_SCHEMA_FILES=Documentation/devicetree/bindings/clock/rockchip,rk3568-cru.yaml /Documentation/devicetree/bindings/clock/rockchip,rk3568-cru.example.dt.yaml: example-1: clock-controller@fdd20000:reg:0: [0, 4258398208, 0, 4096] is too long From schema: ~/.local/lib/python3.5/site-packages/dtschema/schemas/reg.yaml /Documentation/devicetree/bindings/clock/rockchip,rk3568-cru.example.dt.yaml: example-0: clock-controller@fdd00000:reg:0: [0, 4258267136, 0, 4096] is too long From schema: ~/.local/lib/python3.5/site-packages/dtschema/schemas/reg.yaml > + #clock-cells = <1>; > + #reset-cells = <1>; > + }; > + - | > + cru: clock-controller@fdd20000 { > + compatible = "rockchip,rk3568-cru"; > + reg = <0x0 0xfdd20000 0x0 0x1000>; dito > + #clock-cells = <1>; > + #reset-cells = <1>; > + }; > _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel