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dkim=none (message not signed) header.d=none;dmarc=fail action=none header.from=foss.st.com; Received-SPF: Fail (protection.outlook.com: domain of foss.st.com does not designate 164.130.1.60 as permitted sender) receiver=protection.outlook.com; client-ip=164.130.1.60; helo=smtpO365.st.com; Received: from smtpO365.st.com (164.130.1.60) by MAD0EPF000008AF.mail.protection.outlook.com (10.167.241.184) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.21.406.5 via Frontend Transport; Fri, 11 Sep 2026 16:17:56 +0000 Received: from STKDAG1NODE2.st.com (10.75.128.133) by smtpO365.st.com (10.250.44.72) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.2562.43; Fri, 11 Sep 2026 18:23:24 +0200 Received: from [10.48.86.79] (10.48.86.79) by STKDAG1NODE2.st.com (10.75.128.133) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.2562.43; Fri, 11 Sep 2026 18:17:54 +0200 Message-ID: <04cf5b87-dcf9-49b4-a3a2-33be039be199@foss.st.com> Date: Fri, 11 Sep 2026 18:17:53 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v8 00/16] arm64: support Engicam MicroGEA-STM32MP257D-RMM board To: Dario Binacchi , CC: , , , , , , "Arnd Bergmann" , Bjorn Andersson , "Christophe Parant" , Conor Dooley , "Dmitry Baryshkov" , Eric Biggers , Geert Uytterhoeven , "Krzysztof Kozlowski" , Krzysztof Kozlowski , Luca Weiss , Maxime Coquelin , Michal Simek , Rob Herring , "Sven Peter" , References: <20260820091652.43541-1-dario.binacchi@amarulasolutions.com> Content-Language: en-US From: Alexandre TORGUE In-Reply-To: <20260820091652.43541-1-dario.binacchi@amarulasolutions.com> Content-Type: text/plain; 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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: wqhMoPzcGuv+tHsbhalAusE9qpP1tdf6d0WwI5X791MJBx2pG+GN56KLnl0zJmO1Gcvb8fOEf7QYqJUK7lIJSA+rJ0BQdscunTkiJGY8OPDBVWCNnqAW7fIN0gKK2jSUJ4z2U5r6bOGkKHyHnnkt4RCWhayvn6FuvgJAbqqrZaAr7fo7XuWVBzAwPbO/SdDgjwFT+aRfVRyf0VmLfqkYuP8090gqtB8R+GpYiVMKKalTW0zAdDobAa5hJAgpU6/zmqvvNNyxe6i8k3DV9v/zuc8z4HCsoNyyp8dhAZ/8ardgfmCNPktbe3YxZZHmYm0yVVKmnECAERbLFpdaqNZiUcuvKaOBpBxuBRkdEt6ltrD23DdB+1AQUYBUFuFL0m3LLtBpql4Ua5Fv79dAgDINYFclnMZG7FWLPnfBUKXupmgb1MRjRl+yeTW2MKXwDWub X-OriginatorOrg: foss.st.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 11 Sep 2026 16:17:56.2211 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: d953637d-473c-4900-b832-08df10203d4e X-MS-Exchange-CrossTenant-Id: 75e027c9-20d5-47d5-b82f-77d7cd041e8f X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=75e027c9-20d5-47d5-b82f-77d7cd041e8f;Ip=[164.130.1.60];Helo=[smtpO365.st.com] X-MS-Exchange-CrossTenant-AuthSource: MAD0EPF000008AF.eurprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: AS2PR10MB6615 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.9.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20260911_091802_803811_298EFF9F X-CRM114-Status: GOOD ( 14.65 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Hi Dario On 8/20/26 11:12, Dario Binacchi wrote: > This series adds initial support for the Engicam MicroGEA-STM32MP257D-RMM > board based on the MicroGEA-STM32MP257 SoM. > > The support includes device tree descriptions for both the SoM and the > carrier board, together with the required pinctrl definitions for the > peripherals used. > > The series also updates the arm64 defconfig accordingly. > > Changes in v8: > - Add the "d" letter to the board name (DT file name, model and > compatible) as done for the other STM32 boards. > > Changes in v7: > - Add Reviewed-by tag of Olivier Moysan to patch 10/16 "arm64: dts: st: add > sai1 pins for stm32mp25" > - Switch CONFIG_I2C_STM32F7 and CONFIG_SPI_STM32 to modules in > arch/arm64/configs/defconfig. > > Changes in v6: > - Update arch/arm64/configs/defconfig to match the current upstream defconfig > after merge window changes (no functional changes). > > Changes in v5: > - Add patch 2/16 arm64: dts: st: add power-domains to sdmmc1 on stm32mp231 > - Add patch 3/16 arm64: dts: st: add power-domains to sdmmc1 on stm32mp251 > - Increase slew-rate to <1> of ltdc pins to support the 27 MHz pixel clock > and prevent timing violations. > - Change SDMMC2_CK pin bias from pull-up to bias-disable to avoid signal > integrity issues on the clock line > - Fix touchscreen resolution to 480x854 > - Fix SPI1 CS0 polarity to GPIO_ACTIVE_LOW > > Changes in v4: > - Drop inclusion of stm32mp25xf.dtsi from stm32mp257-engicam-microgea.dtsi > > Changes in v3: > - Add power-domains property in the SDMMC2 node. > - Drop patch "arm64: defconfig: cleanup the defconfig" > > Changes in v2: > - Add Acked-by of Conor Dooley for patch 0/1 "dt-bindings: arm: stm32: > support Engicam MicroGEA-STM32MP257-RMM board" > - Add resets property to dts CAN node. Suggested by Sashiko. > - Drop the clocks property from the sai1 node in stm32mp257-engicam-microgea-rmm.dts > to avoid overriding the peripheral bus clock reference defined in the base > SoC device tree. Suggested by Sashiko. > - Reference the existing labeled nodes directly at the root level using > &sai1a and &sai1b in stm32mp257-engicam-microgea-rmm.dts instead of > redefining the entire node structure and redeclaring the labels. Suggested by Sashiko. > - Drop the #clock-cells property from sai1a and remove the reference to sai1a from > the clocks array in sai1b, relying strictly on the st,sync property to handle > internal synchronization. > Series applied on stm32-next. Thanks Alex