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mx.zohomail.com; dkim=pass header.i=collabora.com; spf=pass smtp.mailfrom=michael.riesch@collabora.com; dmarc=pass header.from= DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; t=1783675811; s=zohomail; d=collabora.com; i=michael.riesch@collabora.com; h=Message-ID:Date:Date:MIME-Version:Subject:Subject:To:To:Cc:Cc:References:From:From:In-Reply-To:Content-Type:Content-Transfer-Encoding:Message-Id:Reply-To; bh=6hb5I4/2IdOfdGyllTI2W7LkWVdlsgKxVqV5mnOeQwE=; b=T5Q6KMbp3jUFiOxL9g1l69BSL9Db9tKLBcOrZtqzbd4ZnRJNwGMuaaipJirsB4Ih zxU0w3wJS8vGnNlSW1La9QlxUU70ihBJwwGfOdmnAh+HG/srEQ4u6/gBZbxxDcU/tZ3 Mw+TY97hFcHSK778cbqEaK1AL8z7goCZD22kuaOQ= Received: by mx.zohomail.com with SMTPS id 1783675810094635.854368220136; Fri, 10 Jul 2026 02:30:10 -0700 (PDT) Message-ID: <04e9a542-a05d-4608-ac00-d40da4763f45@collabora.com> Date: Fri, 10 Jul 2026 11:30:06 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v3 2/3] dt-bindings: phy: rockchip-inno-csi-dphy: add rockchip,clk-lane-phase property To: Gerald Loacker , Vinod Koul , Neil Armstrong , Heiko Stuebner , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: linux-phy@lists.infradead.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org References: <20260630-feature-mipi-csi-dphy-4k60-v3-0-176792ab71fa@wolfvision.net> <20260630-feature-mipi-csi-dphy-4k60-v3-2-176792ab71fa@wolfvision.net> Content-Language: en-US From: Michael Riesch In-Reply-To: <20260630-feature-mipi-csi-dphy-4k60-v3-2-176792ab71fa@wolfvision.net> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-ZohoMailClient: External X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.9.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20260710_023017_019750_F9DF2F60 X-CRM114-Status: GOOD ( 12.00 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Hi Gerald, On 6/30/26 09:48, Gerald Loacker wrote: > Add support for the optional rockchip,clk-lane-phase device tree property > to allow board-specific tuning of the clock lane sampling phase for > improved signal integrity across supported data rates. > > Signed-off-by: Gerald Loacker Acked-by: Michael Riesch Thanks and best regards, Michael > --- > .../devicetree/bindings/phy/rockchip-inno-csi-dphy.yaml | 10 ++++++++++ > 1 file changed, 10 insertions(+) > > diff --git a/Documentation/devicetree/bindings/phy/rockchip-inno-csi-dphy.yaml b/Documentation/devicetree/bindings/phy/rockchip-inno-csi-dphy.yaml > index 03950b3cad08c..913aa688c0ae9 100644 > --- a/Documentation/devicetree/bindings/phy/rockchip-inno-csi-dphy.yaml > +++ b/Documentation/devicetree/bindings/phy/rockchip-inno-csi-dphy.yaml > @@ -56,6 +56,16 @@ properties: > description: > Some additional phy settings are access through GRF regs. > > + rockchip,clk-lane-phase: > + $ref: /schemas/types.yaml#/definitions/uint32 > + minimum: 0 > + maximum: 7 > + default: 3 > + description: > + Clock lane sampling phase selection (hardware tap index 0–7). Each step > + corresponds to an approximately 40 ps delay as described in the hardware > + specification. > + > required: > - compatible > - reg >