From: Nicolin Chen <nicolinc@nvidia.com>
To: <will@kernel.org>, <robin.murphy@arm.com>, <jgg@nvidia.com>,
"Jonathan Cameron" <jonathan.cameron@oss.qualcomm.com>
Cc: <joro@8bytes.org>, <bhelgaas@google.com>, <praan@google.com>,
<kevin.tian@intel.com>, <kees@kernel.org>, <smostafa@google.com>,
<baolu.lu@linux.intel.com>,
Jean-Philippe Brucker <jpb@kernel.org>,
"Eric Auger" <eric.auger@redhat.com>,
<linux-arm-kernel@lists.infradead.org>, <iommu@lists.linux.dev>,
<linux-kernel@vger.kernel.org>, <linux-pci@vger.kernel.org>,
<skaestle@nvidia.com>, <mmarrid@nvidia.com>,
<skolothumtho@nvidia.com>, <bbiber@nvidia.com>,
<harsha.v@oss.qualcomm.com>
Subject: [PATCH v5 06/15] iommu/arm-smmu-v3: Allocate IOPF queue without FEAT_SVA
Date: Tue, 15 Sep 2026 09:38:18 -0700 [thread overview]
Message-ID: <04fab7d8ebfc7e5d365f42569928d015d9c8b781.1789446520.git.nicolinc@nvidia.com> (raw)
In-Reply-To: <cover.1789446520.git.nicolinc@nvidia.com>
arm_smmu_init_queues() allocates the IOPF queue only for FEAT_SVA together
with FEAT_STALLS. This queue has no SVA dependency, and FEAT_STALLS alone
can produce events that need IOPF.
On HW with FEAT_STALLS but no FEAT_SVA, a master with the "dma-can-stall"
device-tree property has master->stall_enabled set at probe. Then also with
CONFIG_ARM_SMMU_V3_SVA=y, arm_smmu_enable_iopf() sees stall_enabled, calls
iopf_queue_add_device(NULL, ...) at fault-handling domain attach, which can
oops on mutex_lock(&queue->lock).
Allocate the queue whenever FEAT_STALLS is present. Also select IOMMU_IOPF
so iopf_queue_alloc() is always available without CONFIG_ARM_SMMU_V3_SVA.
Since IOPF does not depend on SVA, drop the SVA guards from its enable and
disable paths.
Fixes: 395ad89d11fd9 ("iommu/arm-smmu-v3: Add stall support for platform devices")
Cc: stable@vger.kernel.org # v5.14
Reviewed-by: Jonathan Cameron <jonathan.cameron@oss.qualcomm.com>
Assisted-by: LLM
Signed-off-by: Nicolin Chen <nicolinc@nvidia.com>
---
drivers/iommu/arm/Kconfig | 1 +
drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c | 9 +--------
2 files changed, 2 insertions(+), 8 deletions(-)
diff --git a/drivers/iommu/arm/Kconfig b/drivers/iommu/arm/Kconfig
index 5fac08b89deea..b848a4253677d 100644
--- a/drivers/iommu/arm/Kconfig
+++ b/drivers/iommu/arm/Kconfig
@@ -78,6 +78,7 @@ config ARM_SMMU_V3
depends on ARM64
select IOMMU_API
select IOMMU_IO_PGTABLE_LPAE
+ select IOMMU_IOPF
select GENERIC_MSI_IRQ
select IOMMUFD_DRIVER if IOMMUFD
help
diff --git a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c
index c8fb1c38090d1..0087a59da80de 100644
--- a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c
+++ b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c
@@ -3215,9 +3215,6 @@ static int arm_smmu_enable_iopf(struct arm_smmu_master *master,
iommu_group_mutex_assert(master->dev);
- if (!IS_ENABLED(CONFIG_ARM_SMMU_V3_SVA))
- return -EOPNOTSUPP;
-
/*
* Drivers for devices supporting PRI or stall require iopf others have
* device-specific fault handlers and don't need IOPF, so this is not a
@@ -3249,9 +3246,6 @@ static void arm_smmu_disable_iopf(struct arm_smmu_master *master,
{
iommu_group_mutex_assert(master->dev);
- if (!IS_ENABLED(CONFIG_ARM_SMMU_V3_SVA))
- return;
-
if (!master_domain || !master_domain->using_iopf)
return;
@@ -4667,8 +4661,7 @@ static int arm_smmu_init_queues(struct arm_smmu_device *smmu)
if (ret)
return ret;
- if ((smmu->features & ARM_SMMU_FEAT_SVA) &&
- (smmu->features & ARM_SMMU_FEAT_STALLS)) {
+ if (smmu->features & ARM_SMMU_FEAT_STALLS) {
smmu->evtq.iopf = iopf_queue_alloc(dev_name(smmu->dev));
if (!smmu->evtq.iopf)
return -ENOMEM;
--
2.43.0
next prev parent reply other threads:[~2026-09-15 16:39 UTC|newest]
Thread overview: 40+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-09-15 16:38 [PATCH v5 00/15] iommu/arm-smmu-v3: Add PRI support Nicolin Chen
2026-09-15 16:38 ` [PATCH v5 01/15] iommu/arm-smmu-v3: Disable the impl before disabling the SMMU on shutdown Nicolin Chen
2026-09-23 18:37 ` Jason Gunthorpe
2026-09-15 16:38 ` [PATCH v5 02/15] iommu/arm-smmu-v3: Add arm_smmu_attach_release() Nicolin Chen
2026-09-23 18:37 ` Jason Gunthorpe
2026-09-15 16:38 ` [PATCH v5 03/15] iommu/arm-smmu-v3: Add Q_POS() macro Nicolin Chen
2026-09-15 23:19 ` Jonathan Cameron
2026-09-15 16:38 ` [PATCH v5 04/15] iommu/arm-smmu-v3: Drain in-flight fault events on domain detach Nicolin Chen
2026-09-23 18:37 ` Jason Gunthorpe
2026-09-23 22:33 ` Nicolin Chen
2026-09-23 23:39 ` Jason Gunthorpe
2026-09-24 1:42 ` Nicolin Chen
2026-09-24 14:03 ` Jason Gunthorpe
2026-09-28 22:29 ` Nicolin Chen
2026-09-29 19:46 ` Nicolin Chen
2026-09-15 16:38 ` [PATCH v5 05/15] iommu/arm-smmu-v3: Flush in-flight fault work " Nicolin Chen
2026-09-23 18:37 ` Jason Gunthorpe
2026-09-15 16:38 ` Nicolin Chen [this message]
2026-09-23 18:37 ` [PATCH v5 06/15] iommu/arm-smmu-v3: Allocate IOPF queue without FEAT_SVA Jason Gunthorpe
2026-09-15 16:38 ` [PATCH v5 07/15] iommu/arm-smmu-v3: Submit CMDQ_OP_PRI_RESP for IOPF event Nicolin Chen
2026-09-23 18:37 ` Jason Gunthorpe
2026-09-15 16:38 ` [PATCH v5 08/15] iommu/arm-smmu-v3: Disable the queue IRQs before disabling the SMMU Nicolin Chen
2026-09-15 23:21 ` Jonathan Cameron
2026-09-23 18:37 ` Jason Gunthorpe
2026-09-24 1:12 ` Nicolin Chen
2026-09-15 16:38 ` [PATCH v5 09/15] iommu/arm-smmu-v3: Disable PRI when no IRQ handler is registered Nicolin Chen
2026-09-23 18:37 ` Jason Gunthorpe
2026-09-15 16:38 ` [PATCH v5 10/15] iommu/arm-smmu-v3: Support PRI Page Request in arm_smmu_handle_ppr() Nicolin Chen
2026-09-15 23:22 ` Jonathan Cameron
2026-09-23 18:37 ` Jason Gunthorpe
2026-09-15 16:38 ` [PATCH v5 11/15] iommu/arm-smmu-v3: Discard partial PRI faults on PRIQ overflow Nicolin Chen
2026-09-23 18:37 ` Jason Gunthorpe
2026-09-15 16:38 ` [PATCH v5 12/15] iommu/arm-smmu-v3: Allocate IOPF queue for ARM_SMMU_FEAT_PRI Nicolin Chen
2026-09-23 18:37 ` Jason Gunthorpe
2026-09-15 16:38 ` [PATCH v5 13/15] PCI/ATS: Add PRI stubs Nicolin Chen
2026-09-23 18:37 ` Jason Gunthorpe
2026-09-15 16:38 ` [PATCH v5 14/15] PCI/ATS: Export pci_enable_pri() and pci_reset_pri() Nicolin Chen
2026-09-23 18:37 ` Jason Gunthorpe
2026-09-15 16:38 ` [PATCH v5 15/15] iommu/arm-smmu-v3: Enable PRI for PCI device in arm_smmu_probe_device() Nicolin Chen
2026-10-04 16:50 ` [PATCH v5 00/15] iommu/arm-smmu-v3: Add PRI support Will Deacon
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=04fab7d8ebfc7e5d365f42569928d015d9c8b781.1789446520.git.nicolinc@nvidia.com \
--to=nicolinc@nvidia.com \
--cc=baolu.lu@linux.intel.com \
--cc=bbiber@nvidia.com \
--cc=bhelgaas@google.com \
--cc=eric.auger@redhat.com \
--cc=harsha.v@oss.qualcomm.com \
--cc=iommu@lists.linux.dev \
--cc=jgg@nvidia.com \
--cc=jonathan.cameron@oss.qualcomm.com \
--cc=joro@8bytes.org \
--cc=jpb@kernel.org \
--cc=kees@kernel.org \
--cc=kevin.tian@intel.com \
--cc=linux-arm-kernel@lists.infradead.org \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-pci@vger.kernel.org \
--cc=mmarrid@nvidia.com \
--cc=praan@google.com \
--cc=robin.murphy@arm.com \
--cc=skaestle@nvidia.com \
--cc=skolothumtho@nvidia.com \
--cc=smostafa@google.com \
--cc=will@kernel.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox