From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id CD20CCEBF69 for ; Fri, 27 Sep 2024 02:12:54 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:List-Subscribe:List-Help :List-Post:List-Archive:List-Unsubscribe:List-Id:Content-Transfer-Encoding: Content-Type:In-Reply-To:From:References:To:Subject:Cc:MIME-Version:Date: Message-ID:Reply-To:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=PxQ0Kl6coQAYPsbvbaGHUnMZ1mwNr6O79uiJDodM740=; b=fnW5Sb3jgt5rCfsqKcNoI5KCsm ngYKG4p2+7sqsKSkr6JF7sJeTZLw9SpdOkmQz3SPAoxthtRvmoRXrF30v45fvn1XffcTc5EdwA2iH 2KYDBJDGWFuf97vpZE9y+KTXrdWcPfBXOActM+pKr31W2qghxLXsqFYNS1kdKBTpw6p3Y82pP5F0G KibRzD+850dEdM2cXsFE7yKSRi3/n75PyGQyACYCy9v6Q/nrjFLXN7B9Vk0sDIi1XXSIZ9LCYApVU d6FIATVcg8lG2jZRjgYp3aHWMDY9r/FJv7Fc45y5wbwrN5nJoBwdIBebNkrbCPURdkFwwfPn3w8Uh RQULQWJw==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.98 #2 (Red Hat Linux)) id 1su0TN-00000009nyN-1nyj; Fri, 27 Sep 2024 02:12:45 +0000 Received: from mgamail.intel.com ([198.175.65.11]) by bombadil.infradead.org with esmtps (Exim 4.98 #2 (Red Hat Linux)) id 1su0Qm-00000009nOS-15Oi for linux-arm-kernel@lists.infradead.org; Fri, 27 Sep 2024 02:10:05 +0000 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1727403004; x=1758939004; h=message-id:date:mime-version:cc:subject:to:references: from:in-reply-to:content-transfer-encoding; bh=hxwzEUSAu4nppCQkrodBnYJTu2L6SXlL2T8Cbgq8CtA=; b=F0sAoPfFitS4wC9lwaNk0dca9PByc26VTDRj4iUrR6n4bu5FSfrzf0/+ QLGJYtthRNo27AlcLiqYlG0cBUcXpIjl8rBXojuPbREFcwD3TfOr3Bmmc gmj0DxBkCy72DGcLuNTmqWLdEqY0y0VgSxvmIdfysKJMFC05j1M2ewSA+ 916Hugsz+Qt9/fExg2jOw2UNMytTAsiBntJ/7OP+i894ALEVJqh5LY7bu S8+9uyz6zxphqPDEC6ivs45dVaIzL768BeaIOnjtn7ijq56SC8bMo0cBY RG+nzk6Yq0Plv7+N5DIeKweCXzI3IyZ0+gXL7qEeHV4fkaYHNpQ8HZ2Kx w==; X-CSE-ConnectionGUID: 1MrSKT3EQoGTivDG+iq05Q== X-CSE-MsgGUID: MKhnklNwQxurnVnVkt/onA== X-IronPort-AV: E=McAfee;i="6700,10204,11207"; a="37102252" X-IronPort-AV: E=Sophos;i="6.11,157,1725346800"; d="scan'208";a="37102252" Received: from fmviesa007.fm.intel.com ([10.60.135.147]) by orvoesa103.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 26 Sep 2024 19:10:03 -0700 X-CSE-ConnectionGUID: AfvG0hxfSWGrhLa2PUJ7vg== X-CSE-MsgGUID: 7pKaXJYUSAGUzgVX+TeqiQ== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.11,157,1725346800"; d="scan'208";a="72032686" Received: from allen-box.sh.intel.com (HELO [10.239.159.127]) ([10.239.159.127]) by fmviesa007.fm.intel.com with ESMTP; 26 Sep 2024 19:09:58 -0700 Message-ID: <05a6b098-8197-4ae6-af80-6dcc16c9f29f@linux.intel.com> Date: Fri, 27 Sep 2024 10:05:35 +0800 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Cc: baolu.lu@linux.intel.com, jgg@nvidia.com, kevin.tian@intel.com, will@kernel.org, joro@8bytes.org, suravee.suthikulpanit@amd.com, robin.murphy@arm.com, dwmw2@infradead.org, shuah@kernel.org, linux-kernel@vger.kernel.org, iommu@lists.linux.dev, linux-arm-kernel@lists.infradead.org, linux-kselftest@vger.kernel.org, eric.auger@redhat.com, jean-philippe@linaro.org, mdf@kernel.org, mshavit@google.com, shameerali.kolothum.thodi@huawei.com, smostafa@google.com Subject: Re: [PATCH v2 00/19] iommufd: Add VIOMMU infrastructure (Part-1) To: Nicolin Chen , Yi Liu References: <82632802-c55a-4199-b685-8b594a8e7104@intel.com> Content-Language: en-US From: Baolu Lu In-Reply-To: Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240926_191004_422129_721CFE11 X-CRM114-Status: GOOD ( 13.03 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On 9/27/24 4:03 AM, Nicolin Chen wrote: > On Thu, Sep 26, 2024 at 04:47:02PM +0800, Yi Liu wrote: >> On 2024/9/26 02:55, Nicolin Chen wrote: >>> On Wed, Sep 25, 2024 at 06:30:20PM +0800, Yi Liu wrote: >>>> Hi Nic, >>>> >>>> On 2024/8/28 00:59, Nicolin Chen wrote: >>>>> This series introduces a new VIOMMU infrastructure and related ioctls. >>>>> >>>>> IOMMUFD has been using the HWPT infrastructure for all cases, including a >>>>> nested IO page table support. Yet, there're limitations for an HWPT-based >>>>> structure to support some advanced HW-accelerated features, such as CMDQV >>>>> on NVIDIA Grace, and HW-accelerated vIOMMU on AMD. Even for a multi-IOMMU >>>>> environment, it is not straightforward for nested HWPTs to share the same >>>>> parent HWPT (stage-2 IO pagetable), with the HWPT infrastructure alone. >>>> could you elaborate a bit for the last sentence in the above paragraph? >>> Stage-2 HWPT/domain on ARM holds a VMID. If we share the parent >>> domain across IOMMU instances, we'd have to make sure that VMID >>> is available on all IOMMU instances. There comes the limitation >>> and potential resource starving, so not ideal. >> got it. >> >>> Baolu told me that Intel may have the same: different domain IDs >>> on different IOMMUs; multiple IOMMU instances on one chip: >>> https://lore.kernel.org/linux-iommu/cf4fe15c-8bcb-4132-a1fd-b2c8ddf2731b@linux.intel.com/ >>> So, I think we are having the same situation here. >> yes, it's called iommu unit or dmar. A typical Intel server can have >> multiple iommu units. But like Baolu mentioned in that thread, the intel >> iommu driver maintains separate domain ID spaces for iommu units, which >> means a given iommu domain has different DIDs when associated with >> different iommu units. So intel side is not suffering from this so far. > An ARM SMMU has its own VMID pool as well. The suffering comes > from associating VMIDs to one shared parent S2 domain. > > Does a DID per S1 nested domain or parent S2? If it is per S2, > I think the same suffering applies when we share the S2 across > IOMMU instances? It's per S1 nested domain in current VT-d design. It's simple but lacks sharing of DID within a VM. We probably will change this later. Thanks, baolu