[PATCH v6 00/10] Add device tree support for PL330 dma controller driver

[PATCH v6 00/10] Add device tree support for PL330 dma controller driver

[Thomas Abraham]

Changes since v5:
- Added alias clocks for pdma clocks on Exynos4.
- Modified platform data for s5p64x0, s5pc100 and s5pv210.
- Rebased on the tip of for-next branch of linux-samsung kernel and tested.

Changes since v4:
- Rebased with Samsung maintainer's for-next branch which is at linux-3.1-rc7
  - Modified Patch 6/6 to apply cleanly.

Changes since v3:
- In Patch 4/6, a recommendation is added in the pl330 binding documentation
  for the name of the property which specifies the dma channel in the client
  device node.
- In Patch 6/6, dropped #ifdef around of_have_populated_dt.

Changes since v2:
- Only the sixth patch is changed, to make dma platform data conditionally
  selectable.
- Tested with v8 version of pl330 dma driver update patches from Boojin Kim.

Changes since v1:
- Removed "arm,pl330-pdma" and "arm,pl330-mdma" compatible values.
- Removed "arm,primecell-periphid" and "arm,pl330-peri-reqs"
  property requirements.

This patchset adds device tree support for PL330 driver and uses it to add
device tree support for Samsung platforms, specifically Exynos4.

Patch 1 moves the pl330_filter function from Samsung specific wrappers to pl330
dma driver and also adds a check to ensure that the filter function proceeds
only if it the dma channel being investigated belongs to pl330 dma controller
instance.

Patch 2 adds support to infer the direction of the dma transfer using the
direction specified with the transfer request instead of including this
information in the platform data. This simlifies the addition of device tree
support. Patch 3 simplifies the platform data for Exynos4 pl330 dma controllers.

Patch 4 adds device tree support for pl330 dma controller driver. A dma channel
is represented using a phandle of the dma controller node and the channel id
within that controller. Client driver request a dma channel using the phandle
and channel id pair. Correspondingly, the pl330 filter function has been
modified to lookup a channel based on this value.

Patch 5 adds device tree support for Samsung's DMA engine wrappers. Client
drivers retrive the channel property from their device node and pass it to the
wrappers. The wrapper functions use the property value as the filter function
parameter. Patch 6 restricts the usage of pl330 device and platform data
instances to non-dt platforms.

Patch 7 adds clock alias for both the pdma clocks. When pdma controllers are
instantiated from device tree, the amba device registration process enables
clock to the controllers to read the peripheral id of the PDMA amba device. In
case of Exynos4, the clocks to the PDMA controllers are named as 'dma' but
amba_device_register() looks up the clock using the name 'apb_pclk'. Hence,
alias clocks with name 'apb_pclk' clock are created for clocks with name 'dma'.

Patch 8 to 10 simplifies the pdma platform data for s5p64x0, s5pc100 and
s5pv210.

This patchset is based on the following tree:
https://github.com/kgene/linux-samsung.git   branch: for-next

and tested tested for both device-tree and non-device-tree kernel on smdkv310.

This patchset has dependency on the following patchset.
[PATCH V2 0/2] Add a common macro for creating struct clk_lookup entries.


Thomas Abraham (10):
  DMA: PL330: move filter function into driver
  DMA: PL330: Infer transfer direction from transfer request instead of platform data
  ARM: EXYNOS4: Modify platform data for pl330 driver
  DMA: PL330: Add device tree support
  ARM: SAMSUNG: Add device tree support for pl330 dma engine wrappers
  ARM: EXYNOS4: Limit usage of pl330 device instance to non-dt build
  ARM: Exynos4: Add a alias for pdma clocks
  ARM: S5P64x0: Modify platform data for pl330 driver
  ARM: S5PC100: Modify platform data for pl330 driver
  ARM: S5PV210: Modify platform data for pl330 driver

 .../devicetree/bindings/dma/arm-pl330.txt          |   30 +++
 arch/arm/mach-exynos4/Kconfig                      |   10 +
 arch/arm/mach-exynos4/Makefile                     |    3 +-
 arch/arm/mach-exynos4/clock.c                      |   35 ++-
 arch/arm/mach-exynos4/dma.c                        |  227 ++++++-------------
 arch/arm/mach-s5p64x0/dma.c                        |  227 +++++-------------
 arch/arm/mach-s5pc100/dma.c                        |  247 ++++++--------------
 arch/arm/mach-s5pv210/dma.c                        |  241 ++++++--------------
 arch/arm/plat-samsung/dma-ops.c                    |   15 +-
 arch/arm/plat-samsung/include/plat/dma-ops.h       |    1 +
 arch/arm/plat-samsung/include/plat/dma-pl330.h     |    3 +-
 drivers/dma/pl330.c                                |   99 +++++----
 include/linux/amba/pl330.h                         |   15 +-
 13 files changed, 405 insertions(+), 748 deletions(-)
 create mode 100644 Documentation/devicetree/bindings/dma/arm-pl330.txt

[PATCH v6 01/10] DMA: PL330: move filter function into driver

[Thomas Abraham]

The dma channel selection filter function is moved from plat-samsung
into the pl330 driver. In additon to that, a check is added in the
filter function to ensure that the channel on which the filter has
been invoked is pl330 channel instance (and avoid any incorrect
access of chan->private in a system with multiple types of DMA
drivers).

Suggested-by: Russell King <rmk+kernel@arm.linux.org.uk>
Signed-off-by: Thomas Abraham <thomas.abraham@linaro.org>
Acked-by: Jassi Brar <jassisinghbrar@gmail.com>
Acked-by: Grant Likely <grant.likely@secretlab.ca>
---
 arch/arm/plat-samsung/dma-ops.c |    6 ------
 drivers/dma/pl330.c             |   15 +++++++++++++++
 include/linux/amba/pl330.h      |    2 ++
 3 files changed, 17 insertions(+), 6 deletions(-)

diff --git a/arch/arm/plat-samsung/dma-ops.c b/arch/arm/plat-samsung/dma-ops.c
index 6e3d9ab..8d18425 100644
--- a/arch/arm/plat-samsung/dma-ops.c
+++ b/arch/arm/plat-samsung/dma-ops.c
@@ -17,12 +17,6 @@
 
 #include <mach/dma.h>
 
-static inline bool pl330_filter(struct dma_chan *chan, void *param)
-{
-	struct dma_pl330_peri *peri = chan->private;
-	return peri->peri_id == (unsigned)param;
-}
-
 static unsigned samsung_dmadev_request(enum dma_ch dma_ch,
 				struct samsung_dma_info *info)
 {
diff --git a/drivers/dma/pl330.c b/drivers/dma/pl330.c
index 621134f..5f1d24c 100644
--- a/drivers/dma/pl330.c
+++ b/drivers/dma/pl330.c
@@ -116,6 +116,9 @@ struct dma_pl330_desc {
 	struct dma_pl330_chan *pchan;
 };
 
+/* forward declaration */
+static struct amba_driver pl330_driver;
+
 static inline struct dma_pl330_chan *
 to_pchan(struct dma_chan *ch)
 {
@@ -267,6 +270,18 @@ static void dma_pl330_rqcb(void *token, enum pl330_op_err err)
 	tasklet_schedule(&pch->task);
 }
 
+bool pl330_filter(struct dma_chan *chan, void *param)
+{
+	struct dma_pl330_peri *peri;
+
+	if (chan->device->dev->driver != &pl330_driver.drv)
+		return false;
+
+	peri = chan->private;
+	return peri->peri_id == (unsigned)param;
+}
+EXPORT_SYMBOL(pl330_filter);
+
 static int pl330_alloc_chan_resources(struct dma_chan *chan)
 {
 	struct dma_pl330_chan *pch = to_pchan(chan);
diff --git a/include/linux/amba/pl330.h b/include/linux/amba/pl330.h
index d12f077..6db72da 100644
--- a/include/linux/amba/pl330.h
+++ b/include/linux/amba/pl330.h
@@ -12,6 +12,7 @@
 #ifndef	__AMBA_PL330_H_
 #define	__AMBA_PL330_H_
 
+#include <linux/dmaengine.h>
 #include <asm/hardware/pl330.h>
 
 struct dma_pl330_peri {
@@ -38,4 +39,5 @@ struct dma_pl330_platdata {
 	unsigned mcbuf_sz;
 };
 
+extern bool pl330_filter(struct dma_chan *chan, void *param);
 #endif	/* __AMBA_PL330_H_ */
-- 
1.6.6.rc2

[PATCH v6 02/10] DMA: PL330: Infer transfer direction from transfer request instead of platform data

[Thomas Abraham]

The transfer direction for a channel can be inferred from the transfer
request and the need for specifying transfer direction in platfrom data
can be eliminated. So the structure definition 'struct dma_pl330_peri'
is no longer required.

The channel's private data is set to point to a channel id specified in
the platform data (instead of an instance of type 'struct dma_pl330_peri').
The filter function is correspondingly modified to match the channel id.

With the 'struct dma_pl330_peri' removed from platform data, the dma
controller transfer capabilities cannot be inferred any more. Hence,
the dma controller capabilities is specified using platform data.

Cc: Jassi Brar <jassisinghbrar@gmail.com>
Cc: Boojin Kim <boojin.kim@samsung.com>
Signed-off-by: Thomas Abraham <thomas.abraham@linaro.org>
Acked-by: Jassi Brar <jassisinghbrar@gmail.com>
Acked-by: Grant Likely <grant.likely@secretlab.ca>
---
 drivers/dma/pl330.c        |   65 +++++++++++---------------------------------
 include/linux/amba/pl330.h |   13 ++-------
 2 files changed, 19 insertions(+), 59 deletions(-)

diff --git a/drivers/dma/pl330.c b/drivers/dma/pl330.c
index 5f1d24c..992bf82 100644
--- a/drivers/dma/pl330.c
+++ b/drivers/dma/pl330.c
@@ -272,13 +272,13 @@ static void dma_pl330_rqcb(void *token, enum pl330_op_err err)
 
 bool pl330_filter(struct dma_chan *chan, void *param)
 {
-	struct dma_pl330_peri *peri;
+	u8 *peri_id;
 
 	if (chan->device->dev->driver != &pl330_driver.drv)
 		return false;
 
-	peri = chan->private;
-	return peri->peri_id == (unsigned)param;
+	peri_id = chan->private;
+	return *peri_id == (unsigned)param;
 }
 EXPORT_SYMBOL(pl330_filter);
 
@@ -512,7 +512,7 @@ pluck_desc(struct dma_pl330_dmac *pdmac)
 static struct dma_pl330_desc *pl330_get_desc(struct dma_pl330_chan *pch)
 {
 	struct dma_pl330_dmac *pdmac = pch->dmac;
-	struct dma_pl330_peri *peri = pch->chan.private;
+	u8 *peri_id = pch->chan.private;
 	struct dma_pl330_desc *desc;
 
 	/* Pluck one desc from the pool of DMAC */
@@ -537,13 +537,7 @@ static struct dma_pl330_desc *pl330_get_desc(struct dma_pl330_chan *pch)
 	desc->txd.cookie = 0;
 	async_tx_ack(&desc->txd);
 
-	if (peri) {
-		desc->req.rqtype = peri->rqtype;
-		desc->req.peri = pch->chan.chan_id;
-	} else {
-		desc->req.rqtype = MEMTOMEM;
-		desc->req.peri = 0;
-	}
+	desc->req.peri = peri_id ? pch->chan.chan_id : 0;
 
 	dma_async_tx_descriptor_init(&desc->txd, &pch->chan);
 
@@ -630,12 +624,14 @@ static struct dma_async_tx_descriptor *pl330_prep_dma_cyclic(
 	case DMA_TO_DEVICE:
 		desc->rqcfg.src_inc = 1;
 		desc->rqcfg.dst_inc = 0;
+		desc->req.rqtype = MEMTODEV;
 		src = dma_addr;
 		dst = pch->fifo_addr;
 		break;
 	case DMA_FROM_DEVICE:
 		desc->rqcfg.src_inc = 0;
 		desc->rqcfg.dst_inc = 1;
+		desc->req.rqtype = DEVTOMEM;
 		src = pch->fifo_addr;
 		dst = dma_addr;
 		break;
@@ -661,16 +657,12 @@ pl330_prep_dma_memcpy(struct dma_chan *chan, dma_addr_t dst,
 {
 	struct dma_pl330_desc *desc;
 	struct dma_pl330_chan *pch = to_pchan(chan);
-	struct dma_pl330_peri *peri = chan->private;
 	struct pl330_info *pi;
 	int burst;
 
 	if (unlikely(!pch || !len))
 		return NULL;
 
-	if (peri && peri->rqtype != MEMTOMEM)
-		return NULL;
-
 	pi = &pch->dmac->pif;
 
 	desc = __pl330_prep_dma_memcpy(pch, dst, src, len);
@@ -679,6 +671,7 @@ pl330_prep_dma_memcpy(struct dma_chan *chan, dma_addr_t dst,
 
 	desc->rqcfg.src_inc = 1;
 	desc->rqcfg.dst_inc = 1;
+	desc->req.rqtype = MEMTOMEM;
 
 	/* Select max possible burst size */
 	burst = pi->pcfg.data_bus_width / 8;
@@ -707,24 +700,13 @@ pl330_prep_slave_sg(struct dma_chan *chan, struct scatterlist *sgl,
 {
 	struct dma_pl330_desc *first, *desc = NULL;
 	struct dma_pl330_chan *pch = to_pchan(chan);
-	struct dma_pl330_peri *peri = chan->private;
 	struct scatterlist *sg;
 	unsigned long flags;
 	int i;
 	dma_addr_t addr;
 
-	if (unlikely(!pch || !sgl || !sg_len || !peri))
-		return NULL;
-
-	/* Make sure the direction is consistent */
-	if ((direction == DMA_TO_DEVICE &&
-				peri->rqtype != MEMTODEV) ||
-			(direction == DMA_FROM_DEVICE &&
-				peri->rqtype != DEVTOMEM)) {
-		dev_err(pch->dmac->pif.dev, "%s:%d Invalid Direction\n",
-				__func__, __LINE__);
+	if (unlikely(!pch || !sgl || !sg_len))
 		return NULL;
-	}
 
 	addr = pch->fifo_addr;
 
@@ -765,11 +747,13 @@ pl330_prep_slave_sg(struct dma_chan *chan, struct scatterlist *sgl,
 		if (direction == DMA_TO_DEVICE) {
 			desc->rqcfg.src_inc = 1;
 			desc->rqcfg.dst_inc = 0;
+			desc->req.rqtype = MEMTODEV;
 			fill_px(&desc->px,
 				addr, sg_dma_address(sg), sg_dma_len(sg));
 		} else {
 			desc->rqcfg.src_inc = 0;
 			desc->rqcfg.dst_inc = 1;
+			desc->req.rqtype = DEVTOMEM;
 			fill_px(&desc->px,
 				sg_dma_address(sg), addr, sg_dma_len(sg));
 		}
@@ -876,28 +860,7 @@ pl330_probe(struct amba_device *adev, const struct amba_id *id)
 
 	for (i = 0; i < num_chan; i++) {
 		pch = &pdmac->peripherals[i];
-		if (pdat) {
-			struct dma_pl330_peri *peri = &pdat->peri[i];
-
-			switch (peri->rqtype) {
-			case MEMTOMEM:
-				dma_cap_set(DMA_MEMCPY, pd->cap_mask);
-				break;
-			case MEMTODEV:
-			case DEVTOMEM:
-				dma_cap_set(DMA_SLAVE, pd->cap_mask);
-				dma_cap_set(DMA_CYCLIC, pd->cap_mask);
-				break;
-			default:
-				dev_err(&adev->dev, "DEVTODEV Not Supported\n");
-				continue;
-			}
-			pch->chan.private = peri;
-		} else {
-			dma_cap_set(DMA_MEMCPY, pd->cap_mask);
-			pch->chan.private = NULL;
-		}
-
+		pch->chan.private = pdat ? &pdat->peri_id[i] : NULL;
 		INIT_LIST_HEAD(&pch->work_list);
 		spin_lock_init(&pch->lock);
 		pch->pl330_chid = NULL;
@@ -911,6 +874,10 @@ pl330_probe(struct amba_device *adev, const struct amba_id *id)
 	}
 
 	pd->dev = &adev->dev;
+	if (pdat)
+		pd->cap_mask = pdat->cap_mask;
+	else
+		dma_cap_set(DMA_MEMCPY, pd->cap_mask);
 
 	pd->device_alloc_chan_resources = pl330_alloc_chan_resources;
 	pd->device_free_chan_resources = pl330_free_chan_resources;
diff --git a/include/linux/amba/pl330.h b/include/linux/amba/pl330.h
index 6db72da..12e023c 100644
--- a/include/linux/amba/pl330.h
+++ b/include/linux/amba/pl330.h
@@ -15,15 +15,6 @@
 #include <linux/dmaengine.h>
 #include <asm/hardware/pl330.h>
 
-struct dma_pl330_peri {
-	/*
-	 * Peri_Req i/f of the DMAC that is
-	 * peripheral could be reached from.
-	 */
-	u8 peri_id; /* specific dma id */
-	enum pl330_reqtype rqtype;
-};
-
 struct dma_pl330_platdata {
 	/*
 	 * Number of valid peripherals connected to DMAC.
@@ -34,7 +25,9 @@ struct dma_pl330_platdata {
 	 */
 	u8 nr_valid_peri;
 	/* Array of valid peripherals */
-	struct dma_pl330_peri *peri;
+	u8 *peri_id;
+	/* Operational capabilities */
+	dma_cap_mask_t cap_mask;
 	/* Bytes to allocate for MC buffer */
 	unsigned mcbuf_sz;
 };
-- 
1.6.6.rc2

[PATCH v6 03/10] ARM: EXYNOS4: Modify platform data for pl330 driver

[Thomas Abraham]

With the 'struct dma_pl330_peri' removed, the platfrom data for dma
driver can be simplified to a simple list of peripheral request ids.

Cc: Jassi Brar <jassisinghbrar@gmail.com>
Cc: Boojin Kim <boojin.kim@samsung.com>
Signed-off-by: Thomas Abraham <thomas.abraham@linaro.org>
Acked-by: Kukjin Kim <kgene.kim@samsung.com>
Acked-by: Grant Likely <grant.likely@secretlab.ca>
---
 arch/arm/mach-exynos4/dma.c |  223 ++++++++++++-------------------------------
 1 files changed, 62 insertions(+), 161 deletions(-)

diff --git a/arch/arm/mach-exynos4/dma.c b/arch/arm/mach-exynos4/dma.c
index 9667c61..c3c0d17 100644
--- a/arch/arm/mach-exynos4/dma.c
+++ b/arch/arm/mach-exynos4/dma.c
@@ -35,95 +35,40 @@
 
 static u64 dma_dmamask = DMA_BIT_MASK(32);
 
-struct dma_pl330_peri pdma0_peri[28] = {
-	{
-		.peri_id = (u8)DMACH_PCM0_RX,
-		.rqtype = DEVTOMEM,
-	}, {
-		.peri_id = (u8)DMACH_PCM0_TX,
-		.rqtype = MEMTODEV,
-	}, {
-		.peri_id = (u8)DMACH_PCM2_RX,
-		.rqtype = DEVTOMEM,
-	}, {
-		.peri_id = (u8)DMACH_PCM2_TX,
-		.rqtype = MEMTODEV,
-	}, {
-		.peri_id = (u8)DMACH_MSM_REQ0,
-	}, {
-		.peri_id = (u8)DMACH_MSM_REQ2,
-	}, {
-		.peri_id = (u8)DMACH_SPI0_RX,
-		.rqtype = DEVTOMEM,
-	}, {
-		.peri_id = (u8)DMACH_SPI0_TX,
-		.rqtype = MEMTODEV,
-	}, {
-		.peri_id = (u8)DMACH_SPI2_RX,
-		.rqtype = DEVTOMEM,
-	}, {
-		.peri_id = (u8)DMACH_SPI2_TX,
-		.rqtype = MEMTODEV,
-	}, {
-		.peri_id = (u8)DMACH_I2S0S_TX,
-		.rqtype = MEMTODEV,
-	}, {
-		.peri_id = (u8)DMACH_I2S0_RX,
-		.rqtype = DEVTOMEM,
-	}, {
-		.peri_id = (u8)DMACH_I2S0_TX,
-		.rqtype = MEMTODEV,
-	}, {
-		.peri_id = (u8)DMACH_UART0_RX,
-		.rqtype = DEVTOMEM,
-	}, {
-		.peri_id = (u8)DMACH_UART0_TX,
-		.rqtype = MEMTODEV,
-	}, {
-		.peri_id = (u8)DMACH_UART2_RX,
-		.rqtype = DEVTOMEM,
-	}, {
-		.peri_id = (u8)DMACH_UART2_TX,
-		.rqtype = MEMTODEV,
-	}, {
-		.peri_id = (u8)DMACH_UART4_RX,
-		.rqtype = DEVTOMEM,
-	}, {
-		.peri_id = (u8)DMACH_UART4_TX,
-		.rqtype = MEMTODEV,
-	}, {
-		.peri_id = (u8)DMACH_SLIMBUS0_RX,
-		.rqtype = DEVTOMEM,
-	}, {
-		.peri_id = (u8)DMACH_SLIMBUS0_TX,
-		.rqtype = MEMTODEV,
-	}, {
-		.peri_id = (u8)DMACH_SLIMBUS2_RX,
-		.rqtype = DEVTOMEM,
-	}, {
-		.peri_id = (u8)DMACH_SLIMBUS2_TX,
-		.rqtype = MEMTODEV,
-	}, {
-		.peri_id = (u8)DMACH_SLIMBUS4_RX,
-		.rqtype = DEVTOMEM,
-	}, {
-		.peri_id = (u8)DMACH_SLIMBUS4_TX,
-		.rqtype = MEMTODEV,
-	}, {
-		.peri_id = (u8)DMACH_AC97_MICIN,
-		.rqtype = DEVTOMEM,
-	}, {
-		.peri_id = (u8)DMACH_AC97_PCMIN,
-		.rqtype = DEVTOMEM,
-	}, {
-		.peri_id = (u8)DMACH_AC97_PCMOUT,
-		.rqtype = MEMTODEV,
-	},
+u8 pdma0_peri[] = {
+	DMACH_PCM0_RX,
+	DMACH_PCM0_TX,
+	DMACH_PCM2_RX,
+	DMACH_PCM2_TX,
+	DMACH_MSM_REQ0,
+	DMACH_MSM_REQ2,
+	DMACH_SPI0_RX,
+	DMACH_SPI0_TX,
+	DMACH_SPI2_RX,
+	DMACH_SPI2_TX,
+	DMACH_I2S0S_TX,
+	DMACH_I2S0_RX,
+	DMACH_I2S0_TX,
+	DMACH_UART0_RX,
+	DMACH_UART0_TX,
+	DMACH_UART2_RX,
+	DMACH_UART2_TX,
+	DMACH_UART4_RX,
+	DMACH_UART4_TX,
+	DMACH_SLIMBUS0_RX,
+	DMACH_SLIMBUS0_TX,
+	DMACH_SLIMBUS2_RX,
+	DMACH_SLIMBUS2_TX,
+	DMACH_SLIMBUS4_RX,
+	DMACH_SLIMBUS4_TX,
+	DMACH_AC97_MICIN,
+	DMACH_AC97_PCMIN,
+	DMACH_AC97_PCMOUT,
 };
 
 struct dma_pl330_platdata exynos4_pdma0_pdata = {
 	.nr_valid_peri = ARRAY_SIZE(pdma0_peri),
-	.peri = pdma0_peri,
+	.peri_id = pdma0_peri,
 };
 
 struct amba_device exynos4_device_pdma0 = {
@@ -142,86 +87,37 @@ struct amba_device exynos4_device_pdma0 = {
 	.periphid = 0x00041330,
 };
 
-struct dma_pl330_peri pdma1_peri[25] = {
-	{
-		.peri_id = (u8)DMACH_PCM0_RX,
-		.rqtype = DEVTOMEM,
-	}, {
-		.peri_id = (u8)DMACH_PCM0_TX,
-		.rqtype = MEMTODEV,
-	}, {
-		.peri_id = (u8)DMACH_PCM1_RX,
-		.rqtype = DEVTOMEM,
-	}, {
-		.peri_id = (u8)DMACH_PCM1_TX,
-		.rqtype = MEMTODEV,
-	}, {
-		.peri_id = (u8)DMACH_MSM_REQ1,
-	}, {
-		.peri_id = (u8)DMACH_MSM_REQ3,
-	}, {
-		.peri_id = (u8)DMACH_SPI1_RX,
-		.rqtype = DEVTOMEM,
-	}, {
-		.peri_id = (u8)DMACH_SPI1_TX,
-		.rqtype = MEMTODEV,
-	}, {
-		.peri_id = (u8)DMACH_I2S0S_TX,
-		.rqtype = MEMTODEV,
-	}, {
-		.peri_id = (u8)DMACH_I2S0_RX,
-		.rqtype = DEVTOMEM,
-	}, {
-		.peri_id = (u8)DMACH_I2S0_TX,
-		.rqtype = MEMTODEV,
-	}, {
-		.peri_id = (u8)DMACH_I2S1_RX,
-		.rqtype = DEVTOMEM,
-	}, {
-		.peri_id = (u8)DMACH_I2S1_TX,
-		.rqtype = MEMTODEV,
-	}, {
-		.peri_id = (u8)DMACH_UART0_RX,
-		.rqtype = DEVTOMEM,
-	}, {
-		.peri_id = (u8)DMACH_UART0_TX,
-		.rqtype = MEMTODEV,
-	}, {
-		.peri_id = (u8)DMACH_UART1_RX,
-		.rqtype = DEVTOMEM,
-	}, {
-		.peri_id = (u8)DMACH_UART1_TX,
-		.rqtype = MEMTODEV,
-	}, {
-		.peri_id = (u8)DMACH_UART3_RX,
-		.rqtype = DEVTOMEM,
-	}, {
-		.peri_id = (u8)DMACH_UART3_TX,
-		.rqtype = MEMTODEV,
-	}, {
-		.peri_id = (u8)DMACH_SLIMBUS1_RX,
-		.rqtype = DEVTOMEM,
-	}, {
-		.peri_id = (u8)DMACH_SLIMBUS1_TX,
-		.rqtype = MEMTODEV,
-	}, {
-		.peri_id = (u8)DMACH_SLIMBUS3_RX,
-		.rqtype = DEVTOMEM,
-	}, {
-		.peri_id = (u8)DMACH_SLIMBUS3_TX,
-		.rqtype = MEMTODEV,
-	}, {
-		.peri_id = (u8)DMACH_SLIMBUS5_RX,
-		.rqtype = DEVTOMEM,
-	}, {
-		.peri_id = (u8)DMACH_SLIMBUS5_TX,
-		.rqtype = MEMTODEV,
-	},
+u8 pdma1_peri[] = {
+	DMACH_PCM0_RX,
+	DMACH_PCM0_TX,
+	DMACH_PCM1_RX,
+	DMACH_PCM1_TX,
+	DMACH_MSM_REQ1,
+	DMACH_MSM_REQ3,
+	DMACH_SPI1_RX,
+	DMACH_SPI1_TX,
+	DMACH_I2S0S_TX,
+	DMACH_I2S0_RX,
+	DMACH_I2S0_TX,
+	DMACH_I2S1_RX,
+	DMACH_I2S1_TX,
+	DMACH_UART0_RX,
+	DMACH_UART0_TX,
+	DMACH_UART1_RX,
+	DMACH_UART1_TX,
+	DMACH_UART3_RX,
+	DMACH_UART3_TX,
+	DMACH_SLIMBUS1_RX,
+	DMACH_SLIMBUS1_TX,
+	DMACH_SLIMBUS3_RX,
+	DMACH_SLIMBUS3_TX,
+	DMACH_SLIMBUS5_RX,
+	DMACH_SLIMBUS5_TX,
 };
 
 struct dma_pl330_platdata exynos4_pdma1_pdata = {
 	.nr_valid_peri = ARRAY_SIZE(pdma1_peri),
-	.peri = pdma1_peri,
+	.peri_id = pdma1_peri,
 };
 
 struct amba_device exynos4_device_pdma1 = {
@@ -242,7 +138,12 @@ struct amba_device exynos4_device_pdma1 = {
 
 static int __init exynos4_dma_init(void)
 {
+	dma_cap_set(DMA_SLAVE, exynos4_pdma0_pdata.cap_mask);
+	dma_cap_set(DMA_CYCLIC, exynos4_pdma0_pdata.cap_mask);
 	amba_device_register(&exynos4_device_pdma0, &iomem_resource);
+
+	dma_cap_set(DMA_SLAVE, exynos4_pdma1_pdata.cap_mask);
+	dma_cap_set(DMA_CYCLIC, exynos4_pdma1_pdata.cap_mask);
 	amba_device_register(&exynos4_device_pdma1, &iomem_resource);
 
 	return 0;
-- 
1.6.6.rc2

[PATCH v6 04/10] DMA: PL330: Add device tree support

[Thomas Abraham]

For PL330 dma controllers instantiated from device tree, the channel
lookup is based on phandle of the dma controller and dma request id
specified by the client node. During probe, the private data of each
channel of the controller is set to point to the device node of the
dma controller. The 'chan_id' of the each channel is used as the
dma request id.

Client driver requesting dma channels specify the phandle of the
dma controller and the request id. The pl330 filter function
converts the phandle to the device node pointer and matches that
with channel's private data. If a match is found, the request id
from the client node and the 'chan_id' of the channel is matched.
A channel is found if both the values match.

Cc: Jassi Brar <jassisinghbrar@gmail.com>
Cc: Boojin Kim <boojin.kim@samsung.com>
Signed-off-by: Thomas Abraham <thomas.abraham@linaro.org>
Reviewed-by: Rob Herring <rob.herring@calxeda.com>
Acked-by: Jassi Brar <jassisinghbrar@gmail.com>
Acked-by: Grant Likely <grant.likely@secretlab.ca>
---
 .../devicetree/bindings/dma/arm-pl330.txt          |   30 ++++++++++++++++++
 drivers/dma/pl330.c                                |   33 +++++++++++++++++--
 2 files changed, 59 insertions(+), 4 deletions(-)
 create mode 100644 Documentation/devicetree/bindings/dma/arm-pl330.txt

diff --git a/Documentation/devicetree/bindings/dma/arm-pl330.txt b/Documentation/devicetree/bindings/dma/arm-pl330.txt
new file mode 100644
index 0000000..a4cd273
--- /dev/null
+++ b/Documentation/devicetree/bindings/dma/arm-pl330.txt
@@ -0,0 +1,30 @@
+* ARM PrimeCell PL330 DMA Controller
+
+The ARM PrimeCell PL330 DMA controller can move blocks of memory contents
+between memory and peripherals or memory to memory.
+
+Required properties:
+  - compatible: should include both "arm,pl330" and "arm,primecell".
+  - reg: physical base address of the controller and length of memory mapped
+    region.
+  - interrupts: interrupt number to the cpu.
+
+Example:
+
+	pdma0: pdma at 12680000 {
+		compatible = "arm,pl330", "arm,primecell";
+		reg = <0x12680000 0x1000>;
+		interrupts = <99>;
+	};
+
+Client drivers (device nodes requiring dma transfers from dev-to-mem or
+mem-to-dev) should specify the DMA channel numbers using a two-value pair
+as shown below.
+
+  [property name]  = <[phandle of the dma controller] [dma request id]>;
+
+      where 'dma request id' is the dma request number which is connected
+      to the client controller. The 'property name' is recommended to be
+      of the form <name>-dma-channel.
+
+  Example:  tx-dma-channel = <&pdma0 12>;
diff --git a/drivers/dma/pl330.c b/drivers/dma/pl330.c
index 992bf82..7a4ebf1 100644
--- a/drivers/dma/pl330.c
+++ b/drivers/dma/pl330.c
@@ -19,6 +19,7 @@
 #include <linux/amba/pl330.h>
 #include <linux/pm_runtime.h>
 #include <linux/scatterlist.h>
+#include <linux/of.h>
 
 #define NR_DEFAULT_DESC	16
 
@@ -277,6 +278,20 @@ bool pl330_filter(struct dma_chan *chan, void *param)
 	if (chan->device->dev->driver != &pl330_driver.drv)
 		return false;
 
+#ifdef CONFIG_OF
+	if (chan->device->dev->of_node) {
+		const __be32 *prop_value;
+		phandle phandle;
+		struct device_node *node;
+
+		prop_value = ((struct property *)param)->value;
+		phandle = be32_to_cpup(prop_value++);
+		node = of_find_node_by_phandle(phandle);
+		return ((chan->private == node) &&
+				(chan->chan_id == be32_to_cpup(prop_value)));
+	}
+#endif
+
 	peri_id = chan->private;
 	return *peri_id == (unsigned)param;
 }
@@ -855,12 +870,17 @@ pl330_probe(struct amba_device *adev, const struct amba_id *id)
 	INIT_LIST_HEAD(&pd->channels);
 
 	/* Initialize channel parameters */
-	num_chan = max(pdat ? pdat->nr_valid_peri : 0, (u8)pi->pcfg.num_chan);
+	num_chan = max(pdat ? pdat->nr_valid_peri : (u8)pi->pcfg.num_peri,
+			(u8)pi->pcfg.num_chan);
 	pdmac->peripherals = kzalloc(num_chan * sizeof(*pch), GFP_KERNEL);
 
 	for (i = 0; i < num_chan; i++) {
 		pch = &pdmac->peripherals[i];
-		pch->chan.private = pdat ? &pdat->peri_id[i] : NULL;
+		if (!adev->dev.of_node)
+			pch->chan.private = pdat ? &pdat->peri_id[i] : NULL;
+		else
+			pch->chan.private = adev->dev.of_node;
+
 		INIT_LIST_HEAD(&pch->work_list);
 		spin_lock_init(&pch->lock);
 		pch->pl330_chid = NULL;
@@ -874,10 +894,15 @@ pl330_probe(struct amba_device *adev, const struct amba_id *id)
 	}
 
 	pd->dev = &adev->dev;
-	if (pdat)
+	if (pdat) {
 		pd->cap_mask = pdat->cap_mask;
-	else
+	} else {
 		dma_cap_set(DMA_MEMCPY, pd->cap_mask);
+		if (pi->pcfg.num_peri) {
+			dma_cap_set(DMA_SLAVE, pd->cap_mask);
+			dma_cap_set(DMA_CYCLIC, pd->cap_mask);
+		}
+	}
 
 	pd->device_alloc_chan_resources = pl330_alloc_chan_resources;
 	pd->device_free_chan_resources = pl330_free_chan_resources;
-- 
1.6.6.rc2

[PATCH v6 05/10] ARM: SAMSUNG: Add device tree support for pl330 dma engine wrappers

[Thomas Abraham]

A new dma request id 'DMACH_DT_PROP' is introduced for client drivers
requesting a dma channel. This request indicates that a device tree
node property represting the dma channel is available in
'struct samsung_dma_info'. The dma channel request wrapper uses the
node property value as the value for the filter parameter.

Signed-off-by: Thomas Abraham <thomas.abraham@linaro.org>
Acked-by: Kukjin Kim <kgene.kim@samsung.com>
Acked-by: Grant Likely <grant.likely@secretlab.ca>
---
 arch/arm/plat-samsung/dma-ops.c                |    9 ++++++++-
 arch/arm/plat-samsung/include/plat/dma-ops.h   |    1 +
 arch/arm/plat-samsung/include/plat/dma-pl330.h |    3 ++-
 3 files changed, 11 insertions(+), 2 deletions(-)

diff --git a/arch/arm/plat-samsung/dma-ops.c b/arch/arm/plat-samsung/dma-ops.c
index 8d18425..b1135dd 100644
--- a/arch/arm/plat-samsung/dma-ops.c
+++ b/arch/arm/plat-samsung/dma-ops.c
@@ -23,11 +23,18 @@ static unsigned samsung_dmadev_request(enum dma_ch dma_ch,
 	struct dma_chan *chan;
 	dma_cap_mask_t mask;
 	struct dma_slave_config slave_config;
+	void *filter_param;
 
 	dma_cap_zero(mask);
 	dma_cap_set(info->cap, mask);
 
-	chan = dma_request_channel(mask, pl330_filter, (void *)dma_ch);
+	/*
+	 * If a dma channel property of a device node from device tree is
+	 * specified, use that as the fliter parameter.
+	 */
+	filter_param = (dma_ch == DMACH_DT_PROP) ? (void *)info->dt_dmach_prop :
+				(void *)dma_ch;
+	chan = dma_request_channel(mask, pl330_filter, filter_param);
 
 	if (info->direction == DMA_FROM_DEVICE) {
 		memset(&slave_config, 0, sizeof(struct dma_slave_config));
diff --git a/arch/arm/plat-samsung/include/plat/dma-ops.h b/arch/arm/plat-samsung/include/plat/dma-ops.h
index 4c1a363..22eafc3 100644
--- a/arch/arm/plat-samsung/include/plat/dma-ops.h
+++ b/arch/arm/plat-samsung/include/plat/dma-ops.h
@@ -31,6 +31,7 @@ struct samsung_dma_info {
 	enum dma_slave_buswidth width;
 	dma_addr_t fifo;
 	struct s3c2410_dma_client *client;
+	struct property *dt_dmach_prop;
 };
 
 struct samsung_dma_ops {
diff --git a/arch/arm/plat-samsung/include/plat/dma-pl330.h b/arch/arm/plat-samsung/include/plat/dma-pl330.h
index 2e55e59..c5eaad5 100644
--- a/arch/arm/plat-samsung/include/plat/dma-pl330.h
+++ b/arch/arm/plat-samsung/include/plat/dma-pl330.h
@@ -21,7 +21,8 @@
  * use these just as IDs.
  */
 enum dma_ch {
-	DMACH_UART0_RX,
+	DMACH_DT_PROP = -1,
+	DMACH_UART0_RX = 0,
 	DMACH_UART0_TX,
 	DMACH_UART1_RX,
 	DMACH_UART1_TX,
-- 
1.6.6.rc2

[PATCH v6 06/10] ARM: EXYNOS4: Limit usage of pl330 device instance to non-dt build

[Thomas Abraham]

The pl330 device instances and associated platform data is required only
for non-device-tree builds. With device tree enabled, the data about the
platform is obtained from the device tree. For images that include both
dt and non-dt platforms, an addditional check is added to ensure that
static amba device registrations is applicable to only non-dt platforms.

Cc: Kukjin Kim <kgene.kim@samsung.com>
Cc: Kyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: Thomas Abraham <thomas.abraham@linaro.org>
Acked-by: Grant Likely <grant.likely@secretlab.ca>
---
 arch/arm/mach-exynos4/Kconfig  |   10 ++++++++++
 arch/arm/mach-exynos4/Makefile |    3 ++-
 arch/arm/mach-exynos4/dma.c    |    4 ++++
 3 files changed, 16 insertions(+), 1 deletions(-)

diff --git a/arch/arm/mach-exynos4/Kconfig b/arch/arm/mach-exynos4/Kconfig
index dd660eb..0c5888a 100644
--- a/arch/arm/mach-exynos4/Kconfig
+++ b/arch/arm/mach-exynos4/Kconfig
@@ -35,6 +35,11 @@ config EXYNOS4_MCT
 	help
 	  Use MCT (Multi Core Timer) as kernel timers
 
+config EXYNOS4_DEV_DMA
+	bool
+	help
+	  Compile in amba device definitions for DMA controller
+
 config EXYNOS4_DEV_AHCI
 	bool
 	help
@@ -158,6 +163,7 @@ config MACH_SMDKV310
 	select EXYNOS4_DEV_PD
 	select SAMSUNG_DEV_PWM
 	select EXYNOS4_DEV_SYSMMU
+	select EXYNOS4_DEV_DMA
 	select EXYNOS4_SETUP_FIMD0
 	select EXYNOS4_SETUP_I2C1
 	select EXYNOS4_SETUP_KEYPAD
@@ -176,6 +182,7 @@ config MACH_ARMLEX4210
 	select S3C_DEV_HSMMC3
 	select EXYNOS4_DEV_AHCI
 	select EXYNOS4_DEV_SYSMMU
+	select EXYNOS4_DEV_DMA
 	select EXYNOS4_SETUP_SDHCI
 	help
 	  Machine support for Samsung ARMLEX4210 based on EXYNOS4210
@@ -201,6 +208,7 @@ config MACH_UNIVERSAL_C210
 	select S5P_DEV_ONENAND
 	select S5P_DEV_TV
 	select EXYNOS4_DEV_PD
+	select EXYNOS4_DEV_DMA
 	select EXYNOS4_SETUP_FIMD0
 	select EXYNOS4_SETUP_I2C1
 	select EXYNOS4_SETUP_I2C3
@@ -227,6 +235,7 @@ config MACH_NURI
 	select S5P_DEV_MFC
 	select S5P_DEV_USB_EHCI
 	select EXYNOS4_DEV_PD
+	select EXYNOS4_DEV_DMA
 	select EXYNOS4_SETUP_FIMD0
 	select EXYNOS4_SETUP_I2C1
 	select EXYNOS4_SETUP_I2C3
@@ -253,6 +262,7 @@ config MACH_ORIGEN
 	select S5P_DEV_I2C_HDMIPHY
 	select S5P_DEV_TV
 	select S5P_DEV_USB_EHCI
+	select EXYNOS4_DEV_DMA
 	select EXYNOS4_DEV_PD
 	select SAMSUNG_DEV_BACKLIGHT
 	select SAMSUNG_DEV_PWM
diff --git a/arch/arm/mach-exynos4/Makefile b/arch/arm/mach-exynos4/Makefile
index c47aae3..8066538 100644
--- a/arch/arm/mach-exynos4/Makefile
+++ b/arch/arm/mach-exynos4/Makefile
@@ -13,7 +13,7 @@ obj-				:=
 # Core support for EXYNOS4 system
 
 obj-$(CONFIG_ARCH_EXYNOS4)	+= cpu.o init.o clock.o irq-combiner.o
-obj-$(CONFIG_ARCH_EXYNOS4)	+= setup-i2c0.o irq-eint.o dma.o pmu.o
+obj-$(CONFIG_ARCH_EXYNOS4)	+= setup-i2c0.o irq-eint.o pmu.o
 obj-$(CONFIG_CPU_EXYNOS4210)	+= clock-exynos4210.o
 obj-$(CONFIG_SOC_EXYNOS4212)	+= clock-exynos4212.o
 obj-$(CONFIG_PM)		+= pm.o
@@ -44,6 +44,7 @@ obj-$(CONFIG_EXYNOS4_DEV_AHCI)		+= dev-ahci.o
 obj-$(CONFIG_EXYNOS4_DEV_PD)		+= dev-pd.o
 obj-$(CONFIG_EXYNOS4_DEV_SYSMMU)	+= dev-sysmmu.o
 obj-$(CONFIG_EXYNOS4_DEV_DWMCI)	+= dev-dwmci.o
+obj-$(CONFIG_EXYNOS4_DEV_DMA)		+= dma.o
 
 obj-$(CONFIG_EXYNOS4_SETUP_FIMC)	+= setup-fimc.o
 obj-$(CONFIG_EXYNOS4_SETUP_FIMD0)	+= setup-fimd0.o
diff --git a/arch/arm/mach-exynos4/dma.c b/arch/arm/mach-exynos4/dma.c
index c3c0d17..921d31d 100644
--- a/arch/arm/mach-exynos4/dma.c
+++ b/arch/arm/mach-exynos4/dma.c
@@ -24,6 +24,7 @@
 #include <linux/dma-mapping.h>
 #include <linux/amba/bus.h>
 #include <linux/amba/pl330.h>
+#include <linux/of.h>
 
 #include <asm/irq.h>
 #include <plat/devs.h>
@@ -138,6 +139,9 @@ struct amba_device exynos4_device_pdma1 = {
 
 static int __init exynos4_dma_init(void)
 {
+	if (of_have_populated_dt())
+		return 0;
+
 	dma_cap_set(DMA_SLAVE, exynos4_pdma0_pdata.cap_mask);
 	dma_cap_set(DMA_CYCLIC, exynos4_pdma0_pdata.cap_mask);
 	amba_device_register(&exynos4_device_pdma0, &iomem_resource);
-- 
1.6.6.rc2

[PATCH v6 07/10] ARM: Exynos4: Add a alias for pdma clocks

[Thomas Abraham]

PDMA controllers when instantiated from device tree are registered using
amba_device_register(). The registration process enables clock to the
controllers to read the peripheral id of the PDMA amba device.

In case of Exynos4, the clocks to the PDMA controllers are named as 'dma'
but amba_device_register() looks up the clock using the name 'apb_pclk'.
Hence, alias clocks with name 'apb_pclk' clock are created for clocks
with name 'dma'.

Signed-off-by: Thomas Abraham <thomas.abraham@linaro.org>
---
 arch/arm/mach-exynos4/clock.c |   35 +++++++++++++++++++++++++----------
 1 files changed, 25 insertions(+), 10 deletions(-)

diff --git a/arch/arm/mach-exynos4/clock.c b/arch/arm/mach-exynos4/clock.c
index d589fe4..94fc337 100644
--- a/arch/arm/mach-exynos4/clock.c
+++ b/arch/arm/mach-exynos4/clock.c
@@ -558,16 +558,6 @@ static struct clk init_clocks_off[] = {
 		.enable		= exynos4_clk_ip_fsys_ctrl,
 		.ctrlbit	= (1 << 10),
 	}, {
-		.name		= "dma",
-		.devname	= "dma-pl330.0",
-		.enable		= exynos4_clk_ip_fsys_ctrl,
-		.ctrlbit	= (1 << 0),
-	}, {
-		.name		= "dma",
-		.devname	= "dma-pl330.1",
-		.enable		= exynos4_clk_ip_fsys_ctrl,
-		.ctrlbit	= (1 << 1),
-	}, {
 		.name		= "adc",
 		.enable		= exynos4_clk_ip_peril_ctrl,
 		.ctrlbit	= (1 << 15),
@@ -783,6 +773,20 @@ static struct clk init_clocks[] = {
 	}
 };
 
+static struct clk clk_pdma0 = {
+	.name		= "dma",
+	.devname	= "dma-pl330.0",
+	.enable		= exynos4_clk_ip_fsys_ctrl,
+	.ctrlbit	= (1 << 0),
+};
+
+static struct clk clk_pdma1 = {
+	.name		= "dma",
+	.devname	= "dma-pl330.1",
+	.enable		= exynos4_clk_ip_fsys_ctrl,
+	.ctrlbit	= (1 << 1),
+};
+
 struct clk *clkset_group_list[] = {
 	[0] = &clk_ext_xtal_mux,
 	[1] = &clk_xusbxti,
@@ -1292,6 +1296,11 @@ static struct clksrc_clk *sysclks[] = {
 	&clk_mout_mfc1,
 };
 
+static struct clk *clk_cdev[] = {
+	&clk_pdma0,
+	&clk_pdma1,
+};
+
 static struct clksrc_clk *clksrc_cdev[] = {
 	&clk_sclk_uart0,
 	&clk_sclk_uart1,
@@ -1312,6 +1321,8 @@ static struct clk_lookup exynos4_clk_lookup[] = {
 	CLKDEV_INIT("exynos4-sdhci.1", "mmc_busclk.2", &clk_sclk_mmc1.clk),
 	CLKDEV_INIT("exynos4-sdhci.2", "mmc_busclk.2", &clk_sclk_mmc2.clk),
 	CLKDEV_INIT("exynos4-sdhci.3", "mmc_busclk.2", &clk_sclk_mmc3.clk),
+	CLKDEV_INIT("dma-pl330.0", "apb_pclk", &clk_pdma0),
+	CLKDEV_INIT("dma-pl330.1", "apb_pclk", &clk_pdma1),
 };
 
 static int xtal_rate;
@@ -1527,6 +1538,10 @@ void __init exynos4_register_clocks(void)
 	s3c_register_clksrc(clksrcs, ARRAY_SIZE(clksrcs));
 	s3c_register_clocks(init_clocks, ARRAY_SIZE(init_clocks));
 
+	s3c24xx_register_clocks(clk_cdev, ARRAY_SIZE(clk_cdev));
+	for (ptr = 0; ptr < ARRAY_SIZE(clk_cdev); ptr++)
+		s3c_disable_clocks(clk_cdev[ptr], 1);
+
 	s3c_register_clocks(init_clocks_off, ARRAY_SIZE(init_clocks_off));
 	s3c_disable_clocks(init_clocks_off, ARRAY_SIZE(init_clocks_off));
 	clkdev_add_table(exynos4_clk_lookup, ARRAY_SIZE(exynos4_clk_lookup));
-- 
1.6.6.rc2

[PATCH v6 08/10] ARM: S5P64x0: Modify platform data for pl330 driver

[Thomas Abraham]

With the 'struct dma_pl330_peri' removed, the platfrom data for dma
driver can be simplified to a simple list of peripheral request ids.

Cc: Jassi Brar <jassisinghbrar@gmail.com>
Cc: Boojin Kim <boojin.kim@samsung.com>
Signed-off-by: Thomas Abraham <thomas.abraham@linaro.org>
---
 arch/arm/mach-s5p64x0/dma.c |  227 ++++++++++++------------------------------
 1 files changed, 65 insertions(+), 162 deletions(-)

diff --git a/arch/arm/mach-s5p64x0/dma.c b/arch/arm/mach-s5p64x0/dma.c
index 442dd4a..f820c07 100644
--- a/arch/arm/mach-s5p64x0/dma.c
+++ b/arch/arm/mach-s5p64x0/dma.c
@@ -38,176 +38,74 @@
 
 static u64 dma_dmamask = DMA_BIT_MASK(32);
 
-struct dma_pl330_peri s5p6440_pdma_peri[22] = {
-	{
-		.peri_id = (u8)DMACH_UART0_RX,
-		.rqtype = DEVTOMEM,
-	}, {
-		.peri_id = (u8)DMACH_UART0_TX,
-		.rqtype = MEMTODEV,
-	}, {
-		.peri_id = (u8)DMACH_UART1_RX,
-		.rqtype = DEVTOMEM,
-	}, {
-		.peri_id = (u8)DMACH_UART1_TX,
-		.rqtype = MEMTODEV,
-	}, {
-		.peri_id = (u8)DMACH_UART2_RX,
-		.rqtype = DEVTOMEM,
-	}, {
-		.peri_id = (u8)DMACH_UART2_TX,
-		.rqtype = MEMTODEV,
-	}, {
-		.peri_id = (u8)DMACH_UART3_RX,
-		.rqtype = DEVTOMEM,
-	}, {
-		.peri_id = (u8)DMACH_UART3_TX,
-		.rqtype = MEMTODEV,
-	}, {
-		.peri_id = DMACH_MAX,
-	}, {
-		.peri_id = DMACH_MAX,
-	}, {
-		.peri_id = (u8)DMACH_PCM0_TX,
-		.rqtype = MEMTODEV,
-	}, {
-		.peri_id = (u8)DMACH_PCM0_RX,
-		.rqtype = DEVTOMEM,
-	}, {
-		.peri_id = (u8)DMACH_I2S0_TX,
-		.rqtype = MEMTODEV,
-	}, {
-		.peri_id = (u8)DMACH_I2S0_RX,
-		.rqtype = DEVTOMEM,
-	}, {
-		.peri_id = (u8)DMACH_SPI0_TX,
-		.rqtype = MEMTODEV,
-	}, {
-		.peri_id = (u8)DMACH_SPI0_RX,
-		.rqtype = DEVTOMEM,
-	}, {
-		.peri_id = (u8)DMACH_MAX,
-	}, {
-		.peri_id = (u8)DMACH_MAX,
-	}, {
-		.peri_id = (u8)DMACH_MAX,
-	}, {
-		.peri_id = (u8)DMACH_MAX,
-	}, {
-		.peri_id = (u8)DMACH_SPI1_TX,
-		.rqtype = MEMTODEV,
-	}, {
-		.peri_id = (u8)DMACH_SPI1_RX,
-		.rqtype = DEVTOMEM,
-	},
+u8 s5p6440_pdma_peri[] = {
+	DMACH_UART0_RX,
+	DMACH_UART0_TX,
+	DMACH_UART1_RX,
+	DMACH_UART1_TX,
+	DMACH_UART2_RX,
+	DMACH_UART2_TX,
+	DMACH_UART3_RX,
+	DMACH_UART3_TX,
+	DMACH_MAX,
+	DMACH_MAX,
+	DMACH_PCM0_TX,
+	DMACH_PCM0_RX,
+	DMACH_I2S0_TX,
+	DMACH_I2S0_RX,
+	DMACH_SPI0_TX,
+	DMACH_SPI0_RX,
+	DMACH_MAX,
+	DMACH_MAX,
+	DMACH_MAX,
+	DMACH_MAX,
+	DMACH_SPI1_TX,
+	DMACH_SPI1_RX,
 };
 
 struct dma_pl330_platdata s5p6440_pdma_pdata = {
 	.nr_valid_peri = ARRAY_SIZE(s5p6440_pdma_peri),
-	.peri = s5p6440_pdma_peri,
+	.peri_id = s5p6440_pdma_peri,
 };
 
-struct dma_pl330_peri s5p6450_pdma_peri[32] = {
-	{
-		.peri_id = (u8)DMACH_UART0_RX,
-		.rqtype = DEVTOMEM,
-	}, {
-		.peri_id = (u8)DMACH_UART0_TX,
-		.rqtype = MEMTODEV,
-	}, {
-		.peri_id = (u8)DMACH_UART1_RX,
-		.rqtype = DEVTOMEM,
-	}, {
-		.peri_id = (u8)DMACH_UART1_TX,
-		.rqtype = MEMTODEV,
-	}, {
-		.peri_id = (u8)DMACH_UART2_RX,
-		.rqtype = DEVTOMEM,
-	}, {
-		.peri_id = (u8)DMACH_UART2_TX,
-		.rqtype = MEMTODEV,
-	}, {
-		.peri_id = (u8)DMACH_UART3_RX,
-		.rqtype = DEVTOMEM,
-	}, {
-		.peri_id = (u8)DMACH_UART3_TX,
-		.rqtype = MEMTODEV,
-	}, {
-		.peri_id = (u8)DMACH_UART4_RX,
-		.rqtype = DEVTOMEM,
-	}, {
-		.peri_id = (u8)DMACH_UART4_TX,
-		.rqtype = MEMTODEV,
-	}, {
-		.peri_id = (u8)DMACH_PCM0_TX,
-		.rqtype = MEMTODEV,
-	}, {
-		.peri_id = (u8)DMACH_PCM0_RX,
-		.rqtype = DEVTOMEM,
-	}, {
-		.peri_id = (u8)DMACH_I2S0_TX,
-		.rqtype = MEMTODEV,
-	}, {
-		.peri_id = (u8)DMACH_I2S0_RX,
-		.rqtype = DEVTOMEM,
-	}, {
-		.peri_id = (u8)DMACH_SPI0_TX,
-		.rqtype = MEMTODEV,
-	}, {
-		.peri_id = (u8)DMACH_SPI0_RX,
-		.rqtype = DEVTOMEM,
-	}, {
-		.peri_id = (u8)DMACH_PCM1_TX,
-		.rqtype = MEMTODEV,
-	}, {
-		.peri_id = (u8)DMACH_PCM1_RX,
-		.rqtype = DEVTOMEM,
-	}, {
-		.peri_id = (u8)DMACH_PCM2_TX,
-		.rqtype = MEMTODEV,
-	}, {
-		.peri_id = (u8)DMACH_PCM2_RX,
-		.rqtype = DEVTOMEM,
-	}, {
-		.peri_id = (u8)DMACH_SPI1_TX,
-		.rqtype = MEMTODEV,
-	}, {
-		.peri_id = (u8)DMACH_SPI1_RX,
-		.rqtype = DEVTOMEM,
-	}, {
-		.peri_id = (u8)DMACH_USI_TX,
-		.rqtype = MEMTODEV,
-	}, {
-		.peri_id = (u8)DMACH_USI_RX,
-		.rqtype = DEVTOMEM,
-	}, {
-		.peri_id = (u8)DMACH_MAX,
-	}, {
-		.peri_id = (u8)DMACH_I2S1_TX,
-		.rqtype = MEMTODEV,
-	}, {
-		.peri_id = (u8)DMACH_I2S1_RX,
-		.rqtype = DEVTOMEM,
-	}, {
-		.peri_id = (u8)DMACH_I2S2_TX,
-		.rqtype = MEMTODEV,
-	}, {
-		.peri_id = (u8)DMACH_I2S2_RX,
-		.rqtype = DEVTOMEM,
-	}, {
-		.peri_id = (u8)DMACH_PWM,
-	}, {
-		.peri_id = (u8)DMACH_UART5_RX,
-		.rqtype = DEVTOMEM,
-	}, {
-		.peri_id = (u8)DMACH_UART5_TX,
-		.rqtype = MEMTODEV,
-	},
+u8 s5p6450_pdma_peri[] = {
+	DMACH_UART0_RX,
+	DMACH_UART0_TX,
+	DMACH_UART1_RX,
+	DMACH_UART1_TX,
+	DMACH_UART2_RX,
+	DMACH_UART2_TX,
+	DMACH_UART3_RX,
+	DMACH_UART3_TX,
+	DMACH_UART4_RX,
+	DMACH_UART4_TX,
+	DMACH_PCM0_TX,
+	DMACH_PCM0_RX,
+	DMACH_I2S0_TX,
+	DMACH_I2S0_RX,
+	DMACH_SPI0_TX,
+	DMACH_SPI0_RX,
+	DMACH_PCM1_TX,
+	DMACH_PCM1_RX,
+	DMACH_PCM2_TX,
+	DMACH_PCM2_RX,
+	DMACH_SPI1_TX,
+	DMACH_SPI1_RX,
+	DMACH_USI_TX,
+	DMACH_USI_RX,
+	DMACH_MAX,
+	DMACH_I2S1_TX,
+	DMACH_I2S1_RX,
+	DMACH_I2S2_TX,
+	DMACH_I2S2_RX,
+	DMACH_PWM,
+	DMACH_UART5_RX,
+	DMACH_UART5_TX,
 };
 
 struct dma_pl330_platdata s5p6450_pdma_pdata = {
 	.nr_valid_peri = ARRAY_SIZE(s5p6450_pdma_peri),
-	.peri = s5p6450_pdma_peri,
+	.peri_id = s5p6450_pdma_peri,
 };
 
 struct amba_device s5p64x0_device_pdma = {
@@ -227,10 +125,15 @@ struct amba_device s5p64x0_device_pdma = {
 
 static int __init s5p64x0_dma_init(void)
 {
-	if (soc_is_s5p6450())
+	if (soc_is_s5p6450()) {
+		dma_cap_set(DMA_SLAVE, s5p6450_pdma_pdata.cap_mask);
+		dma_cap_set(DMA_CYCLIC, s5p6450_pdma_pdata.cap_mask);
 		s5p64x0_device_pdma.dev.platform_data = &s5p6450_pdma_pdata;
-	else
+	} else {
+		dma_cap_set(DMA_SLAVE, s5p6440_pdma_pdata.cap_mask);
+		dma_cap_set(DMA_CYCLIC, s5p6440_pdma_pdata.cap_mask);
 		s5p64x0_device_pdma.dev.platform_data = &s5p6440_pdma_pdata;
+	}
 
 	amba_device_register(&s5p64x0_device_pdma, &iomem_resource);
 
-- 
1.6.6.rc2

[PATCH v6 09/10] ARM: S5PC100: Modify platform data for pl330 driver

[Thomas Abraham]

With the 'struct dma_pl330_peri' removed, the platfrom data for dma
driver can be simplified to a simple list of peripheral request ids.

Cc: Jassi Brar <jassisinghbrar@gmail.com>
Cc: Boojin Kim <boojin.kim@samsung.com>
Signed-off-by: Thomas Abraham <thomas.abraham@linaro.org>
---
 arch/arm/mach-s5pc100/dma.c |  247 ++++++++++++-------------------------------
 1 files changed, 69 insertions(+), 178 deletions(-)

diff --git a/arch/arm/mach-s5pc100/dma.c b/arch/arm/mach-s5pc100/dma.c
index 065a087..8dfdc76 100644
--- a/arch/arm/mach-s5pc100/dma.c
+++ b/arch/arm/mach-s5pc100/dma.c
@@ -35,100 +35,42 @@
 
 static u64 dma_dmamask = DMA_BIT_MASK(32);
 
-struct dma_pl330_peri pdma0_peri[30] = {
-	{
-		.peri_id = (u8)DMACH_UART0_RX,
-		.rqtype = DEVTOMEM,
-	}, {
-		.peri_id = (u8)DMACH_UART0_TX,
-		.rqtype = MEMTODEV,
-	}, {
-		.peri_id = (u8)DMACH_UART1_RX,
-		.rqtype = DEVTOMEM,
-	}, {
-		.peri_id = (u8)DMACH_UART1_TX,
-		.rqtype = MEMTODEV,
-	}, {
-		.peri_id = (u8)DMACH_UART2_RX,
-		.rqtype = DEVTOMEM,
-	}, {
-		.peri_id = (u8)DMACH_UART2_TX,
-		.rqtype = MEMTODEV,
-	}, {
-		.peri_id = (u8)DMACH_UART3_RX,
-		.rqtype = DEVTOMEM,
-	}, {
-		.peri_id = (u8)DMACH_UART3_TX,
-		.rqtype = MEMTODEV,
-	}, {
-		.peri_id = DMACH_IRDA,
-	}, {
-		.peri_id = (u8)DMACH_I2S0_RX,
-		.rqtype = DEVTOMEM,
-	}, {
-		.peri_id = (u8)DMACH_I2S0_TX,
-		.rqtype = MEMTODEV,
-	}, {
-		.peri_id = (u8)DMACH_I2S0S_TX,
-		.rqtype = MEMTODEV,
-	}, {
-		.peri_id = (u8)DMACH_I2S1_RX,
-		.rqtype = DEVTOMEM,
-	}, {
-		.peri_id = (u8)DMACH_I2S1_TX,
-		.rqtype = MEMTODEV,
-	}, {
-		.peri_id = (u8)DMACH_I2S2_RX,
-		.rqtype = DEVTOMEM,
-	}, {
-		.peri_id = (u8)DMACH_I2S2_TX,
-		.rqtype = MEMTODEV,
-	}, {
-		.peri_id = (u8)DMACH_SPI0_RX,
-		.rqtype = DEVTOMEM,
-	}, {
-		.peri_id = (u8)DMACH_SPI0_TX,
-		.rqtype = MEMTODEV,
-	}, {
-		.peri_id = (u8)DMACH_SPI1_RX,
-		.rqtype = DEVTOMEM,
-	}, {
-		.peri_id = (u8)DMACH_SPI1_TX,
-		.rqtype = MEMTODEV,
-	}, {
-		.peri_id = (u8)DMACH_SPI2_RX,
-		.rqtype = DEVTOMEM,
-	}, {
-		.peri_id = (u8)DMACH_SPI2_TX,
-		.rqtype = MEMTODEV,
-	}, {
-		.peri_id = (u8)DMACH_AC97_MICIN,
-		.rqtype = DEVTOMEM,
-	}, {
-		.peri_id = (u8)DMACH_AC97_PCMIN,
-		.rqtype = DEVTOMEM,
-	}, {
-		.peri_id = (u8)DMACH_AC97_PCMOUT,
-		.rqtype = MEMTODEV,
-	}, {
-		.peri_id = (u8)DMACH_EXTERNAL,
-	}, {
-		.peri_id = (u8)DMACH_PWM,
-	}, {
-		.peri_id = (u8)DMACH_SPDIF,
-		.rqtype = MEMTODEV,
-	}, {
-		.peri_id = (u8)DMACH_HSI_RX,
-		.rqtype = DEVTOMEM,
-	}, {
-		.peri_id = (u8)DMACH_HSI_TX,
-		.rqtype = MEMTODEV,
-	},
+u8 pdma0_peri[] = {
+	DMACH_UART0_RX,
+	DMACH_UART0_TX,
+	DMACH_UART1_RX,
+	DMACH_UART1_TX,
+	DMACH_UART2_RX,
+	DMACH_UART2_TX,
+	DMACH_UART3_RX,
+	DMACH_UART3_TX,
+	DMACH_IRDA,
+	DMACH_I2S0_RX,
+	DMACH_I2S0_TX,
+	DMACH_I2S0S_TX,
+	DMACH_I2S1_RX,
+	DMACH_I2S1_TX,
+	DMACH_I2S2_RX,
+	DMACH_I2S2_TX,
+	DMACH_SPI0_RX,
+	DMACH_SPI0_TX,
+	DMACH_SPI1_RX,
+	DMACH_SPI1_TX,
+	DMACH_SPI2_RX,
+	DMACH_SPI2_TX,
+	DMACH_AC97_MICIN,
+	DMACH_AC97_PCMIN,
+	DMACH_AC97_PCMOUT,
+	DMACH_EXTERNAL,
+	DMACH_PWM,
+	DMACH_SPDIF,
+	DMACH_HSI_RX,
+	DMACH_HSI_TX,
 };
 
 struct dma_pl330_platdata s5pc100_pdma0_pdata = {
 	.nr_valid_peri = ARRAY_SIZE(pdma0_peri),
-	.peri = pdma0_peri,
+	.peri_id = pdma0_peri,
 };
 
 struct amba_device s5pc100_device_pdma0 = {
@@ -147,98 +89,42 @@ struct amba_device s5pc100_device_pdma0 = {
 	.periphid = 0x00041330,
 };
 
-struct dma_pl330_peri pdma1_peri[30] = {
-	{
-		.peri_id = (u8)DMACH_UART0_RX,
-		.rqtype = DEVTOMEM,
-	}, {
-		.peri_id = (u8)DMACH_UART0_TX,
-		.rqtype = MEMTODEV,
-	}, {
-		.peri_id = (u8)DMACH_UART1_RX,
-		.rqtype = DEVTOMEM,
-	}, {
-		.peri_id = (u8)DMACH_UART1_TX,
-		.rqtype = MEMTODEV,
-	}, {
-		.peri_id = (u8)DMACH_UART2_RX,
-		.rqtype = DEVTOMEM,
-	}, {
-		.peri_id = (u8)DMACH_UART2_TX,
-		.rqtype = MEMTODEV,
-	}, {
-		.peri_id = (u8)DMACH_UART3_RX,
-		.rqtype = DEVTOMEM,
-	}, {
-		.peri_id = (u8)DMACH_UART3_TX,
-		.rqtype = MEMTODEV,
-	}, {
-		.peri_id = DMACH_IRDA,
-	}, {
-		.peri_id = (u8)DMACH_I2S0_RX,
-		.rqtype = DEVTOMEM,
-	}, {
-		.peri_id = (u8)DMACH_I2S0_TX,
-		.rqtype = MEMTODEV,
-	}, {
-		.peri_id = (u8)DMACH_I2S0S_TX,
-		.rqtype = MEMTODEV,
-	}, {
-		.peri_id = (u8)DMACH_I2S1_RX,
-		.rqtype = DEVTOMEM,
-	}, {
-		.peri_id = (u8)DMACH_I2S1_TX,
-		.rqtype = MEMTODEV,
-	}, {
-		.peri_id = (u8)DMACH_I2S2_RX,
-		.rqtype = DEVTOMEM,
-	}, {
-		.peri_id = (u8)DMACH_I2S2_TX,
-		.rqtype = MEMTODEV,
-	}, {
-		.peri_id = (u8)DMACH_SPI0_RX,
-		.rqtype = DEVTOMEM,
-	}, {
-		.peri_id = (u8)DMACH_SPI0_TX,
-		.rqtype = MEMTODEV,
-	}, {
-		.peri_id = (u8)DMACH_SPI1_RX,
-		.rqtype = DEVTOMEM,
-	}, {
-		.peri_id = (u8)DMACH_SPI1_TX,
-		.rqtype = MEMTODEV,
-	}, {
-		.peri_id = (u8)DMACH_SPI2_RX,
-		.rqtype = DEVTOMEM,
-	}, {
-		.peri_id = (u8)DMACH_SPI2_TX,
-		.rqtype = MEMTODEV,
-	}, {
-		.peri_id = (u8)DMACH_PCM0_RX,
-		.rqtype = DEVTOMEM,
-	}, {
-		.peri_id = (u8)DMACH_PCM1_TX,
-		.rqtype = MEMTODEV,
-	}, {
-		.peri_id = (u8)DMACH_PCM1_RX,
-		.rqtype = DEVTOMEM,
-	}, {
-		.peri_id = (u8)DMACH_PCM1_TX,
-		.rqtype = MEMTODEV,
-	}, {
-		.peri_id = (u8)DMACH_MSM_REQ0,
-	}, {
-		.peri_id = (u8)DMACH_MSM_REQ1,
-	}, {
-		.peri_id = (u8)DMACH_MSM_REQ2,
-	}, {
-		.peri_id = (u8)DMACH_MSM_REQ3,
-	},
+u8 pdma1_peri[] = {
+	DMACH_UART0_RX,
+	DMACH_UART0_TX,
+	DMACH_UART1_RX,
+	DMACH_UART1_TX,
+	DMACH_UART2_RX,
+	DMACH_UART2_TX,
+	DMACH_UART3_RX,
+	DMACH_UART3_TX,
+	DMACH_IRDA,
+	DMACH_I2S0_RX,
+	DMACH_I2S0_TX,
+	DMACH_I2S0S_TX,
+	DMACH_I2S1_RX,
+	DMACH_I2S1_TX,
+	DMACH_I2S2_RX,
+	DMACH_I2S2_TX,
+	DMACH_SPI0_RX,
+	DMACH_SPI0_TX,
+	DMACH_SPI1_RX,
+	DMACH_SPI1_TX,
+	DMACH_SPI2_RX,
+	DMACH_SPI2_TX,
+	DMACH_PCM0_RX,
+	DMACH_PCM1_TX,
+	DMACH_PCM1_RX,
+	DMACH_PCM1_TX,
+	DMACH_MSM_REQ0,
+	DMACH_MSM_REQ1,
+	DMACH_MSM_REQ2,
+	DMACH_MSM_REQ3,
 };
 
 struct dma_pl330_platdata s5pc100_pdma1_pdata = {
 	.nr_valid_peri = ARRAY_SIZE(pdma1_peri),
-	.peri = pdma1_peri,
+	.peri_id = pdma1_peri,
 };
 
 struct amba_device s5pc100_device_pdma1 = {
@@ -259,7 +145,12 @@ struct amba_device s5pc100_device_pdma1 = {
 
 static int __init s5pc100_dma_init(void)
 {
+	dma_cap_set(DMA_SLAVE, s5pc100_pdma0_pdata.cap_mask);
+	dma_cap_set(DMA_CYCLIC, s5pc100_pdma0_pdata.cap_mask);
 	amba_device_register(&s5pc100_device_pdma0, &iomem_resource);
+
+	dma_cap_set(DMA_SLAVE, s5pc100_pdma1_pdata.cap_mask);
+	dma_cap_set(DMA_CYCLIC, s5pc100_pdma1_pdata.cap_mask);
 	amba_device_register(&s5pc100_device_pdma1, &iomem_resource);
 
 	return 0;
-- 
1.6.6.rc2

[PATCH v6 10/10] ARM: S5PV210: Modify platform data for pl330 driver

[Thomas Abraham]

With the 'struct dma_pl330_peri' removed, the platfrom data for dma
driver can be simplified to a simple list of peripheral request ids.

Cc: Jassi Brar <jassisinghbrar@gmail.com>
Cc: Boojin Kim <boojin.kim@samsung.com>
Signed-off-by: Thomas Abraham <thomas.abraham@linaro.org>
---
 arch/arm/mach-s5pv210/dma.c |  241 ++++++++++++------------------------------
 1 files changed, 69 insertions(+), 172 deletions(-)

diff --git a/arch/arm/mach-s5pv210/dma.c b/arch/arm/mach-s5pv210/dma.c
index 86b749c..a6113e0 100644
--- a/arch/arm/mach-s5pv210/dma.c
+++ b/arch/arm/mach-s5pv210/dma.c
@@ -35,90 +35,40 @@
 
 static u64 dma_dmamask = DMA_BIT_MASK(32);
 
-struct dma_pl330_peri pdma0_peri[28] = {
-	{
-		.peri_id = (u8)DMACH_UART0_RX,
-		.rqtype = DEVTOMEM,
-	}, {
-		.peri_id = (u8)DMACH_UART0_TX,
-		.rqtype = MEMTODEV,
-	}, {
-		.peri_id = (u8)DMACH_UART1_RX,
-		.rqtype = DEVTOMEM,
-	}, {
-		.peri_id = (u8)DMACH_UART1_TX,
-		.rqtype = MEMTODEV,
-	}, {
-		.peri_id = (u8)DMACH_UART2_RX,
-		.rqtype = DEVTOMEM,
-	}, {
-		.peri_id = (u8)DMACH_UART2_TX,
-		.rqtype = MEMTODEV,
-	}, {
-		.peri_id = (u8)DMACH_UART3_RX,
-		.rqtype = DEVTOMEM,
-	}, {
-		.peri_id = (u8)DMACH_UART3_TX,
-		.rqtype = MEMTODEV,
-	}, {
-		.peri_id = DMACH_MAX,
-	}, {
-		.peri_id = (u8)DMACH_I2S0_RX,
-		.rqtype = DEVTOMEM,
-	}, {
-		.peri_id = (u8)DMACH_I2S0_TX,
-		.rqtype = MEMTODEV,
-	}, {
-		.peri_id = (u8)DMACH_I2S0S_TX,
-		.rqtype = MEMTODEV,
-	}, {
-		.peri_id = (u8)DMACH_I2S1_RX,
-		.rqtype = DEVTOMEM,
-	}, {
-		.peri_id = (u8)DMACH_I2S1_TX,
-		.rqtype = MEMTODEV,
-	}, {
-		.peri_id = (u8)DMACH_MAX,
-	}, {
-		.peri_id = (u8)DMACH_MAX,
-	}, {
-		.peri_id = (u8)DMACH_SPI0_RX,
-		.rqtype = DEVTOMEM,
-	}, {
-		.peri_id = (u8)DMACH_SPI0_TX,
-		.rqtype = MEMTODEV,
-	}, {
-		.peri_id = (u8)DMACH_SPI1_RX,
-		.rqtype = DEVTOMEM,
-	}, {
-		.peri_id = (u8)DMACH_SPI1_TX,
-		.rqtype = MEMTODEV,
-	}, {
-		.peri_id = (u8)DMACH_MAX,
-	}, {
-		.peri_id = (u8)DMACH_MAX,
-	}, {
-		.peri_id = (u8)DMACH_AC97_MICIN,
-		.rqtype = DEVTOMEM,
-	}, {
-		.peri_id = (u8)DMACH_AC97_PCMIN,
-		.rqtype = DEVTOMEM,
-	}, {
-		.peri_id = (u8)DMACH_AC97_PCMOUT,
-		.rqtype = MEMTODEV,
-	}, {
-		.peri_id = (u8)DMACH_MAX,
-	}, {
-		.peri_id = (u8)DMACH_PWM,
-	}, {
-		.peri_id = (u8)DMACH_SPDIF,
-		.rqtype = MEMTODEV,
-	},
+u8 pdma0_peri[] = {
+	DMACH_UART0_RX,
+	DMACH_UART0_TX,
+	DMACH_UART1_RX,
+	DMACH_UART1_TX,
+	DMACH_UART2_RX,
+	DMACH_UART2_TX,
+	DMACH_UART3_RX,
+	DMACH_UART3_TX,
+	DMACH_MAX,
+	DMACH_I2S0_RX,
+	DMACH_I2S0_TX,
+	DMACH_I2S0S_TX,
+	DMACH_I2S1_RX,
+	DMACH_I2S1_TX,
+	DMACH_MAX,
+	DMACH_MAX,
+	DMACH_SPI0_RX,
+	DMACH_SPI0_TX,
+	DMACH_SPI1_RX,
+	DMACH_SPI1_TX,
+	DMACH_MAX,
+	DMACH_MAX,
+	DMACH_AC97_MICIN,
+	DMACH_AC97_PCMIN,
+	DMACH_AC97_PCMOUT,
+	DMACH_MAX,
+	DMACH_PWM,
+	DMACH_SPDIF,
 };
 
 struct dma_pl330_platdata s5pv210_pdma0_pdata = {
 	.nr_valid_peri = ARRAY_SIZE(pdma0_peri),
-	.peri = pdma0_peri,
+	.peri_id = pdma0_peri,
 };
 
 struct amba_device s5pv210_device_pdma0 = {
@@ -137,102 +87,44 @@ struct amba_device s5pv210_device_pdma0 = {
 	.periphid = 0x00041330,
 };
 
-struct dma_pl330_peri pdma1_peri[32] = {
-	{
-		.peri_id = (u8)DMACH_UART0_RX,
-		.rqtype = DEVTOMEM,
-	}, {
-		.peri_id = (u8)DMACH_UART0_TX,
-		.rqtype = MEMTODEV,
-	}, {
-		.peri_id = (u8)DMACH_UART1_RX,
-		.rqtype = DEVTOMEM,
-	}, {
-		.peri_id = (u8)DMACH_UART1_TX,
-		.rqtype = MEMTODEV,
-	}, {
-		.peri_id = (u8)DMACH_UART2_RX,
-		.rqtype = DEVTOMEM,
-	}, {
-		.peri_id = (u8)DMACH_UART2_TX,
-		.rqtype = MEMTODEV,
-	}, {
-		.peri_id = (u8)DMACH_UART3_RX,
-		.rqtype = DEVTOMEM,
-	}, {
-		.peri_id = (u8)DMACH_UART3_TX,
-		.rqtype = MEMTODEV,
-	}, {
-		.peri_id = DMACH_MAX,
-	}, {
-		.peri_id = (u8)DMACH_I2S0_RX,
-		.rqtype = DEVTOMEM,
-	}, {
-		.peri_id = (u8)DMACH_I2S0_TX,
-		.rqtype = MEMTODEV,
-	}, {
-		.peri_id = (u8)DMACH_I2S0S_TX,
-		.rqtype = MEMTODEV,
-	}, {
-		.peri_id = (u8)DMACH_I2S1_RX,
-		.rqtype = DEVTOMEM,
-	}, {
-		.peri_id = (u8)DMACH_I2S1_TX,
-		.rqtype = MEMTODEV,
-	}, {
-		.peri_id = (u8)DMACH_I2S2_RX,
-		.rqtype = DEVTOMEM,
-	}, {
-		.peri_id = (u8)DMACH_I2S2_TX,
-		.rqtype = MEMTODEV,
-	}, {
-		.peri_id = (u8)DMACH_SPI0_RX,
-		.rqtype = DEVTOMEM,
-	}, {
-		.peri_id = (u8)DMACH_SPI0_TX,
-		.rqtype = MEMTODEV,
-	}, {
-		.peri_id = (u8)DMACH_SPI1_RX,
-		.rqtype = DEVTOMEM,
-	}, {
-		.peri_id = (u8)DMACH_SPI1_TX,
-		.rqtype = MEMTODEV,
-	}, {
-		.peri_id = (u8)DMACH_MAX,
-	}, {
-		.peri_id = (u8)DMACH_MAX,
-	}, {
-		.peri_id = (u8)DMACH_PCM0_RX,
-		.rqtype = DEVTOMEM,
-	}, {
-		.peri_id = (u8)DMACH_PCM0_TX,
-		.rqtype = MEMTODEV,
-	}, {
-		.peri_id = (u8)DMACH_PCM1_RX,
-		.rqtype = DEVTOMEM,
-	}, {
-		.peri_id = (u8)DMACH_PCM1_TX,
-		.rqtype = MEMTODEV,
-	}, {
-		.peri_id = (u8)DMACH_MSM_REQ0,
-	}, {
-		.peri_id = (u8)DMACH_MSM_REQ1,
-	}, {
-		.peri_id = (u8)DMACH_MSM_REQ2,
-	}, {
-		.peri_id = (u8)DMACH_MSM_REQ3,
-	}, {
-		.peri_id = (u8)DMACH_PCM2_RX,
-		.rqtype = DEVTOMEM,
-	}, {
-		.peri_id = (u8)DMACH_PCM2_TX,
-		.rqtype = MEMTODEV,
-	},
+u8 pdma1_peri[] = {
+	DMACH_UART0_RX,
+	DMACH_UART0_TX,
+	DMACH_UART1_RX,
+	DMACH_UART1_TX,
+	DMACH_UART2_RX,
+	DMACH_UART2_TX,
+	DMACH_UART3_RX,
+	DMACH_UART3_TX,
+	DMACH_MAX,
+	DMACH_I2S0_RX,
+	DMACH_I2S0_TX,
+	DMACH_I2S0S_TX,
+	DMACH_I2S1_RX,
+	DMACH_I2S1_TX,
+	DMACH_I2S2_RX,
+	DMACH_I2S2_TX,
+	DMACH_SPI0_RX,
+	DMACH_SPI0_TX,
+	DMACH_SPI1_RX,
+	DMACH_SPI1_TX,
+	DMACH_MAX,
+	DMACH_MAX,
+	DMACH_PCM0_RX,
+	DMACH_PCM0_TX,
+	DMACH_PCM1_RX,
+	DMACH_PCM1_TX,
+	DMACH_MSM_REQ0,
+	DMACH_MSM_REQ1,
+	DMACH_MSM_REQ2,
+	DMACH_MSM_REQ3,
+	DMACH_PCM2_RX,
+	DMACH_PCM2_TX,
 };
 
 struct dma_pl330_platdata s5pv210_pdma1_pdata = {
 	.nr_valid_peri = ARRAY_SIZE(pdma1_peri),
-	.peri = pdma1_peri,
+	.peri_id = pdma1_peri,
 };
 
 struct amba_device s5pv210_device_pdma1 = {
@@ -253,7 +145,12 @@ struct amba_device s5pv210_device_pdma1 = {
 
 static int __init s5pv210_dma_init(void)
 {
+	dma_cap_set(DMA_SLAVE, s5pv210_pdma0_pdata.cap_mask);
+	dma_cap_set(DMA_CYCLIC, s5pv210_pdma0_pdata.cap_mask);
 	amba_device_register(&s5pv210_device_pdma0, &iomem_resource);
+
+	dma_cap_set(DMA_SLAVE, s5pv210_pdma1_pdata.cap_mask);
+	dma_cap_set(DMA_CYCLIC, s5pv210_pdma1_pdata.cap_mask);
 	amba_device_register(&s5pv210_device_pdma1, &iomem_resource);
 
 	return 0;
-- 
1.6.6.rc2

[PATCH v6 00/10] Add device tree support for PL330 dma controller driver

[Kukjin Kim]

Thomas Abraham wrote:
> 
> Changes since v5:
> - Added alias clocks for pdma clocks on Exynos4.
> - Modified platform data for s5p64x0, s5pc100 and s5pv210.
> - Rebased on the tip of for-next branch of linux-samsung kernel and
tested.
> 
> Changes since v4:
> - Rebased with Samsung maintainer's for-next branch which is at
linux-3.1-rc7
>   - Modified Patch 6/6 to apply cleanly.
> 
> Changes since v3:
> - In Patch 4/6, a recommendation is added in the pl330 binding
documentation
>   for the name of the property which specifies the dma channel in the
client
>   device node.
> - In Patch 6/6, dropped #ifdef around of_have_populated_dt.
> 
> Changes since v2:
> - Only the sixth patch is changed, to make dma platform data conditionally
>   selectable.
> - Tested with v8 version of pl330 dma driver update patches from Boojin
Kim.
> 
> Changes since v1:
> - Removed "arm,pl330-pdma" and "arm,pl330-mdma" compatible values.
> - Removed "arm,primecell-periphid" and "arm,pl330-peri-reqs"
>   property requirements.
> 
> This patchset adds device tree support for PL330 driver and uses it to add
> device tree support for Samsung platforms, specifically Exynos4.
> 
> Patch 1 moves the pl330_filter function from Samsung specific wrappers to
pl330
> dma driver and also adds a check to ensure that the filter function
proceeds
> only if it the dma channel being investigated belongs to pl330 dma
controller
> instance.
> 
> Patch 2 adds support to infer the direction of the dma transfer using the
> direction specified with the transfer request instead of including this
> information in the platform data. This simlifies the addition of device
tree
> support. Patch 3 simplifies the platform data for Exynos4 pl330 dma
controllers.
> 
> Patch 4 adds device tree support for pl330 dma controller driver. A dma
channel
> is represented using a phandle of the dma controller node and the channel
id
> within that controller. Client driver request a dma channel using the
phandle
> and channel id pair. Correspondingly, the pl330 filter function has been
> modified to lookup a channel based on this value.
> 
> Patch 5 adds device tree support for Samsung's DMA engine wrappers. Client
> drivers retrive the channel property from their device node and pass it to
the
> wrappers. The wrapper functions use the property value as the filter
function
> parameter. Patch 6 restricts the usage of pl330 device and platform data
> instances to non-dt platforms.
> 
> Patch 7 adds clock alias for both the pdma clocks. When pdma controllers
are
> instantiated from device tree, the amba device registration process
enables
> clock to the controllers to read the peripheral id of the PDMA amba
device. In
> case of Exynos4, the clocks to the PDMA controllers are named as 'dma' but
> amba_device_register() looks up the clock using the name 'apb_pclk'.
Hence,
> alias clocks with name 'apb_pclk' clock are created for clocks with name
'dma'.
> 
> Patch 8 to 10 simplifies the pdma platform data for s5p64x0, s5pc100 and
> s5pv210.
> 
> This patchset is based on the following tree:
> https://github.com/kgene/linux-samsung.git   branch: for-next
> 
> and tested tested for both device-tree and non-device-tree kernel on
smdkv310.
> 
> This patchset has dependency on the following patchset.
> [PATCH V2 0/2] Add a common macro for creating struct clk_lookup entries.
> 
> 
> Thomas Abraham (10):
>   DMA: PL330: move filter function into driver
>   DMA: PL330: Infer transfer direction from transfer request instead of
platform
> data
>   ARM: EXYNOS4: Modify platform data for pl330 driver
>   DMA: PL330: Add device tree support
>   ARM: SAMSUNG: Add device tree support for pl330 dma engine wrappers
>   ARM: EXYNOS4: Limit usage of pl330 device instance to non-dt build
>   ARM: Exynos4: Add a alias for pdma clocks
>   ARM: S5P64x0: Modify platform data for pl330 driver
>   ARM: S5PC100: Modify platform data for pl330 driver
>   ARM: S5PV210: Modify platform data for pl330 driver
> 
>  .../devicetree/bindings/dma/arm-pl330.txt          |   30 +++
>  arch/arm/mach-exynos4/Kconfig                      |   10 +
>  arch/arm/mach-exynos4/Makefile                     |    3 +-
>  arch/arm/mach-exynos4/clock.c                      |   35 ++-
>  arch/arm/mach-exynos4/dma.c                        |  227
++++++-----------
> --
>  arch/arm/mach-s5p64x0/dma.c                        |  227
+++++-------------
>  arch/arm/mach-s5pc100/dma.c                        |  247
++++++-----------
> ---
>  arch/arm/mach-s5pv210/dma.c                        |  241
++++++-----------
> ---
>  arch/arm/plat-samsung/dma-ops.c                    |   15 +-
>  arch/arm/plat-samsung/include/plat/dma-ops.h       |    1 +
>  arch/arm/plat-samsung/include/plat/dma-pl330.h     |    3 +-
>  drivers/dma/pl330.c                                |   99 +++++----
>  include/linux/amba/pl330.h                         |   15 +-
>  13 files changed, 405 insertions(+), 748 deletions(-)
>  create mode 100644 Documentation/devicetree/bindings/dma/arm-pl330.txt

Hi,

Looks ok to me and if required,
Acked-by: Kukjin Kim <kgene.kim@samsung.com>

And I hope since this includes many changes of arch/arm/Samsung stuff, this
would be sent to upstream via Samsung tree after ack from Vinod for dma
stuff.

Thanks.

Best regards,
Kgene.
--
Kukjin Kim <kgene.kim@samsung.com>, Senior Engineer,
SW Solution Development Team, Samsung Electronics Co., Ltd.

[PATCH v6 00/10] Add device tree support for PL330 dma controller driver

[Thomas Abraham]

Hi Vinod,

On 11 October 2011 17:36, Kukjin Kim <kgene.kim@samsung.com> wrote:
> Thomas Abraham wrote:
>>
>> Changes since v5:
>> - Added alias clocks for pdma clocks on Exynos4.
>> - Modified platform data for s5p64x0, s5pc100 and s5pv210.
>> - Rebased on the tip of for-next branch of linux-samsung kernel and
> tested.
>>
>> Changes since v4:
>> - Rebased with Samsung maintainer's for-next branch which is at
> linux-3.1-rc7
>> ? - Modified Patch 6/6 to apply cleanly.
>>
>> Changes since v3:
>> - In Patch 4/6, a recommendation is added in the pl330 binding
> documentation
>> ? for the name of the property which specifies the dma channel in the
> client
>> ? device node.
>> - In Patch 6/6, dropped #ifdef around of_have_populated_dt.
>>
>> Changes since v2:
>> - Only the sixth patch is changed, to make dma platform data conditionally
>> ? selectable.
>> - Tested with v8 version of pl330 dma driver update patches from Boojin
> Kim.
>>
>> Changes since v1:
>> - Removed "arm,pl330-pdma" and "arm,pl330-mdma" compatible values.
>> - Removed "arm,primecell-periphid" and "arm,pl330-peri-reqs"
>> ? property requirements.
>>
>> This patchset adds device tree support for PL330 driver and uses it to add
>> device tree support for Samsung platforms, specifically Exynos4.
>>
>> Patch 1 moves the pl330_filter function from Samsung specific wrappers to
> pl330
>> dma driver and also adds a check to ensure that the filter function
> proceeds
>> only if it the dma channel being investigated belongs to pl330 dma
> controller
>> instance.
>>
>> Patch 2 adds support to infer the direction of the dma transfer using the
>> direction specified with the transfer request instead of including this
>> information in the platform data. This simlifies the addition of device
> tree
>> support. Patch 3 simplifies the platform data for Exynos4 pl330 dma
> controllers.
>>
>> Patch 4 adds device tree support for pl330 dma controller driver. A dma
> channel
>> is represented using a phandle of the dma controller node and the channel
> id
>> within that controller. Client driver request a dma channel using the
> phandle
>> and channel id pair. Correspondingly, the pl330 filter function has been
>> modified to lookup a channel based on this value.
>>
>> Patch 5 adds device tree support for Samsung's DMA engine wrappers. Client
>> drivers retrive the channel property from their device node and pass it to
> the
>> wrappers. The wrapper functions use the property value as the filter
> function
>> parameter. Patch 6 restricts the usage of pl330 device and platform data
>> instances to non-dt platforms.
>>
>> Patch 7 adds clock alias for both the pdma clocks. When pdma controllers
> are
>> instantiated from device tree, the amba device registration process
> enables
>> clock to the controllers to read the peripheral id of the PDMA amba
> device. In
>> case of Exynos4, the clocks to the PDMA controllers are named as 'dma' but
>> amba_device_register() looks up the clock using the name 'apb_pclk'.
> Hence,
>> alias clocks with name 'apb_pclk' clock are created for clocks with name
> 'dma'.
>>
>> Patch 8 to 10 simplifies the pdma platform data for s5p64x0, s5pc100 and
>> s5pv210.
>>
>> This patchset is based on the following tree:
>> https://github.com/kgene/linux-samsung.git ? branch: for-next
>>
>> and tested tested for both device-tree and non-device-tree kernel on
> smdkv310.
>>
>> This patchset has dependency on the following patchset.
>> [PATCH V2 0/2] Add a common macro for creating struct clk_lookup entries.
>>
>>
>> Thomas Abraham (10):
>> ? DMA: PL330: move filter function into driver
>> ? DMA: PL330: Infer transfer direction from transfer request instead of
> platform
>> data
>> ? ARM: EXYNOS4: Modify platform data for pl330 driver
>> ? DMA: PL330: Add device tree support
>> ? ARM: SAMSUNG: Add device tree support for pl330 dma engine wrappers
>> ? ARM: EXYNOS4: Limit usage of pl330 device instance to non-dt build
>> ? ARM: Exynos4: Add a alias for pdma clocks
>> ? ARM: S5P64x0: Modify platform data for pl330 driver
>> ? ARM: S5PC100: Modify platform data for pl330 driver
>> ? ARM: S5PV210: Modify platform data for pl330 driver
>>
>> ?.../devicetree/bindings/dma/arm-pl330.txt ? ? ? ? ?| ? 30 +++
>> ?arch/arm/mach-exynos4/Kconfig ? ? ? ? ? ? ? ? ? ? ?| ? 10 +
>> ?arch/arm/mach-exynos4/Makefile ? ? ? ? ? ? ? ? ? ? | ? ?3 +-
>> ?arch/arm/mach-exynos4/clock.c ? ? ? ? ? ? ? ? ? ? ?| ? 35 ++-
>> ?arch/arm/mach-exynos4/dma.c ? ? ? ? ? ? ? ? ? ? ? ?| ?227
> ++++++-----------
>> --
>> ?arch/arm/mach-s5p64x0/dma.c ? ? ? ? ? ? ? ? ? ? ? ?| ?227
> +++++-------------
>> ?arch/arm/mach-s5pc100/dma.c ? ? ? ? ? ? ? ? ? ? ? ?| ?247
> ++++++-----------
>> ---
>> ?arch/arm/mach-s5pv210/dma.c ? ? ? ? ? ? ? ? ? ? ? ?| ?241
> ++++++-----------
>> ---
>> ?arch/arm/plat-samsung/dma-ops.c ? ? ? ? ? ? ? ? ? ?| ? 15 +-
>> ?arch/arm/plat-samsung/include/plat/dma-ops.h ? ? ? | ? ?1 +
>> ?arch/arm/plat-samsung/include/plat/dma-pl330.h ? ? | ? ?3 +-
>> ?drivers/dma/pl330.c ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ?| ? 99 +++++----
>> ?include/linux/amba/pl330.h ? ? ? ? ? ? ? ? ? ? ? ? | ? 15 +-
>> ?13 files changed, 405 insertions(+), 748 deletions(-)
>> ?create mode 100644 Documentation/devicetree/bindings/dma/arm-pl330.txt
>
> Hi,
>
> Looks ok to me and if required,
> Acked-by: Kukjin Kim <kgene.kim@samsung.com>
>
> And I hope since this includes many changes of arch/arm/Samsung stuff, this
> would be sent to upstream via Samsung tree after ack from Vinod for dma
> stuff.

All the comments for this patchset that adds device tree support for
pl330 dma controller driver have been addressed. This patchset is
based on the linux-samsung kernel since there are many changes in the
samsung platform code included in this patchset.

If there are no other changes required, can this patchset be
considered for merge in 3.2 ?

Thanks,
Thomas.


>
> Thanks.
>
> Best regards,
> Kgene.
> --
> Kukjin Kim <kgene.kim@samsung.com>, Senior Engineer,
> SW Solution Development Team, Samsung Electronics Co., Ltd.
>
> --
> To unsubscribe from this list: send the line "unsubscribe linux-samsung-soc" in
> the body of a message to majordomo at vger.kernel.org
> More majordomo info at ?http://vger.kernel.org/majordomo-info.html
>

[PATCH v6 00/10] Add device tree support for PL330 dma controller driver

[Vinod Koul]

On Tue, 2011-10-11 at 21:06 +0900, Kukjin Kim wrote:
> Thomas Abraham wrote:
> 
> Hi,
> 
> Looks ok to me and if required,
> Acked-by: Kukjin Kim <kgene.kim@samsung.com>
> 
> And I hope since this includes many changes of arch/arm/Samsung stuff, this
> would be sent to upstream via Samsung tree after ack from Vinod for dma
> stuff.
Sure, looks fine to me
Acked-by: Vinod Koul <vinod.koul@intel.com>

-- 
~Vinod

[PATCH v6 09/10] ARM: S5PC100: Modify platform data for pl330 driver

[Boojin Kim]

Thomas Abraham wrote:
> Sent: Tuesday, October 11, 2011 3:16 AM
> To: linux-arm-kernel at lists.infradead.org
> Cc: linux-samsung-soc at vger.kernel.org; kgene.kim at samsung.com;
> vinod.koul at intel.com; Jassi Brar; Boojin Kim
> Subject: [PATCH v6 09/10] ARM: S5PC100: Modify platform data for pl330
> driver
>
> With the 'struct dma_pl330_peri' removed, the platfrom data for dma
> driver can be simplified to a simple list of peripheral request ids.
>
> Cc: Jassi Brar <jassisinghbrar@gmail.com>
> Cc: Boojin Kim <boojin.kim@samsung.com>
> Signed-off-by: Thomas Abraham <thomas.abraham@linaro.org>
> ---
>  arch/arm/mach-s5pc100/dma.c |  247 ++++++++++++-----------------------
> --------
>  1 files changed, 69 insertions(+), 178 deletions(-)
>

Looks good to me.
Acked-by: Boojin Kim <boojin.kim@samsung.com>

> diff --git a/arch/arm/mach-s5pc100/dma.c b/arch/arm/mach-s5pc100/dma.c
> index 065a087..8dfdc76 100644
> --- a/arch/arm/mach-s5pc100/dma.c
> +++ b/arch/arm/mach-s5pc100/dma.c
> @@ -35,100 +35,42 @@
>
>  static u64 dma_dmamask = DMA_BIT_MASK(32);
>

[PATCH v6 10/10] ARM: S5PV210: Modify platform data for pl330 driver

[Boojin Kim]

Thomas Abraham wrote:

> Sent: Tuesday, October 11, 2011 3:16 AM
> To: linux-arm-kernel at lists.infradead.org
> Cc: linux-samsung-soc at vger.kernel.org; kgene.kim at samsung.com;
> vinod.koul at intel.com; Jassi Brar; Boojin Kim
> Subject: [PATCH v6 10/10] ARM: S5PV210: Modify platform data for pl330
> driver
>
> With the 'struct dma_pl330_peri' removed, the platfrom data for dma
> driver can be simplified to a simple list of peripheral request ids.
>
> Cc: Jassi Brar <jassisinghbrar@gmail.com>
> Cc: Boojin Kim <boojin.kim@samsung.com>
> Signed-off-by: Thomas Abraham <thomas.abraham@linaro.org>
> ---
>  arch/arm/mach-s5pv210/dma.c |  241 ++++++++++++-----------------------
> -------
>  1 files changed, 69 insertions(+), 172 deletions(-)
>
Looks good to me.
Acked-by: Boojin Kim <boojin.kim@samsung.com>

[PATCH v6 02/10] DMA: PL330: Infer transfer direction from transfer request instead of platform data

[Boojin Kim]

Thomas Abraham wrote:

> Sent: Tuesday, October 11, 2011 3:16 AM
> To: linux-arm-kernel at lists.infradead.org
> Cc: linux-samsung-soc at vger.kernel.org; kgene.kim at samsung.com;
> vinod.koul at intel.com; Jassi Brar; Boojin Kim
> Subject: [PATCH v6 02/10] DMA: PL330: Infer transfer direction from
> transfer request instead of platform data
>
> The transfer direction for a channel can be inferred from the transfer
> request and the need for specifying transfer direction in platfrom
> data
> can be eliminated. So the structure definition 'struct dma_pl330_peri'
> is no longer required.
>
> The channel's private data is set to point to a channel id specified
> in
> the platform data (instead of an instance of type 'struct
> dma_pl330_peri').
> The filter function is correspondingly modified to match the channel
> id.
>
> With the 'struct dma_pl330_peri' removed from platform data, the dma
> controller transfer capabilities cannot be inferred any more. Hence,
> the dma controller capabilities is specified using platform data.
>
> Cc: Jassi Brar <jassisinghbrar@gmail.com>
> Cc: Boojin Kim <boojin.kim@samsung.com>
> Signed-off-by: Thomas Abraham <thomas.abraham@linaro.org>
> Acked-by: Jassi Brar <jassisinghbrar@gmail.com>
> Acked-by: Grant Likely <grant.likely@secretlab.ca>
> ---
>  drivers/dma/pl330.c        |   65 +++++++++++---------------------------
> ------
>  include/linux/amba/pl330.h |   13 ++-------
>  2 files changed, 19 insertions(+), 59 deletions(-)
>

Looks good to me.
Acked-by: Boojin Kim <boojin.kim@samsung.com>

[PATCH v6 04/10] DMA: PL330: Add device tree support

[Boojin Kim]

Thomas Abraham wrote:

> Sent: Tuesday, October 11, 2011 3:16 AM
> To: linux-arm-kernel at lists.infradead.org
> Cc: linux-samsung-soc at vger.kernel.org; kgene.kim at samsung.com;
> vinod.koul at intel.com; Jassi Brar; Boojin Kim
> Subject: [PATCH v6 04/10] DMA: PL330: Add device tree support
>
> For PL330 dma controllers instantiated from device tree, the channel
> lookup is based on phandle of the dma controller and dma request id
> specified by the client node. During probe, the private data of each
> channel of the controller is set to point to the device node of the
> dma controller. The 'chan_id' of the each channel is used as the
> dma request id.
>
> Client driver requesting dma channels specify the phandle of the
> dma controller and the request id. The pl330 filter function
> converts the phandle to the device node pointer and matches that
> with channel's private data. If a match is found, the request id
> from the client node and the 'chan_id' of the channel is matched.
> A channel is found if both the values match.
>
> Cc: Jassi Brar <jassisinghbrar@gmail.com>
> Cc: Boojin Kim <boojin.kim@samsung.com>
> Signed-off-by: Thomas Abraham <thomas.abraham@linaro.org>
> Reviewed-by: Rob Herring <rob.herring@calxeda.com>
> Acked-by: Jassi Brar <jassisinghbrar@gmail.com>
> Acked-by: Grant Likely <grant.likely@secretlab.ca>
> ---

Looks good to me.
Acked-by: Boojin Kim <boojin.kim@samsung.com>

[PATCH v6 09/10] ARM: S5PC100: Modify platform data for pl330 driver

[Anca Emanuel]

On Mon, Oct 10, 2011 at 9:15 PM, Thomas Abraham
<thomas.abraham@linaro.org> wrote:
<spnip>

> +u8 pdma1_peri[] = {
> + ? ? ? DMACH_UART0_RX,
> + ? ? ? DMACH_UART0_TX,
> + ? ? ? DMACH_UART1_RX,
> + ? ? ? DMACH_UART1_TX,
> + ? ? ? DMACH_UART2_RX,
> + ? ? ? DMACH_UART2_TX,
> + ? ? ? DMACH_UART3_RX,
> + ? ? ? DMACH_UART3_TX,
> + ? ? ? DMACH_IRDA,
> + ? ? ? DMACH_I2S0_RX,
> + ? ? ? DMACH_I2S0_TX,
> + ? ? ? DMACH_I2S0S_TX,
> + ? ? ? DMACH_I2S1_RX,
> + ? ? ? DMACH_I2S1_TX,
> + ? ? ? DMACH_I2S2_RX,
> + ? ? ? DMACH_I2S2_TX,
> + ? ? ? DMACH_SPI0_RX,
> + ? ? ? DMACH_SPI0_TX,
> + ? ? ? DMACH_SPI1_RX,
> + ? ? ? DMACH_SPI1_TX,
> + ? ? ? DMACH_SPI2_RX,
> + ? ? ? DMACH_SPI2_TX,
> + ? ? ? DMACH_PCM0_RX,
> + ? ? ? DMACH_PCM1_TX,

typo ?  DMACH_PCM0_TX

> + ? ? ? DMACH_PCM1_RX,
> + ? ? ? DMACH_PCM1_TX,
> + ? ? ? DMACH_MSM_REQ0,
> + ? ? ? DMACH_MSM_REQ1,
> + ? ? ? DMACH_MSM_REQ2,
> + ? ? ? DMACH_MSM_REQ3,
> ?};

[PATCH v6 09/10] ARM: S5PC100: Modify platform data for pl330 driver

[Thomas Abraham]

Hi Anca,

On 12 October 2011 09:41, Anca Emanuel <anca.emanuel@gmail.com> wrote:
> On Mon, Oct 10, 2011 at 9:15 PM, Thomas Abraham
> <thomas.abraham@linaro.org> wrote:
> <spnip>
>
>> +u8 pdma1_peri[] = {
>> + ? ? ? DMACH_UART0_RX,
>> + ? ? ? DMACH_UART0_TX,
>> + ? ? ? DMACH_UART1_RX,
>> + ? ? ? DMACH_UART1_TX,
>> + ? ? ? DMACH_UART2_RX,
>> + ? ? ? DMACH_UART2_TX,
>> + ? ? ? DMACH_UART3_RX,
>> + ? ? ? DMACH_UART3_TX,
>> + ? ? ? DMACH_IRDA,
>> + ? ? ? DMACH_I2S0_RX,
>> + ? ? ? DMACH_I2S0_TX,
>> + ? ? ? DMACH_I2S0S_TX,
>> + ? ? ? DMACH_I2S1_RX,
>> + ? ? ? DMACH_I2S1_TX,
>> + ? ? ? DMACH_I2S2_RX,
>> + ? ? ? DMACH_I2S2_TX,
>> + ? ? ? DMACH_SPI0_RX,
>> + ? ? ? DMACH_SPI0_TX,
>> + ? ? ? DMACH_SPI1_RX,
>> + ? ? ? DMACH_SPI1_TX,
>> + ? ? ? DMACH_SPI2_RX,
>> + ? ? ? DMACH_SPI2_TX,
>> + ? ? ? DMACH_PCM0_RX,
>> + ? ? ? DMACH_PCM1_TX,
>
> typo ? ?DMACH_PCM0_TX

Yes. That is a mistake. I cross-checked others with the user manual
and they are fine.

Thanks for pointing this out.

Regards,
Thomas.

>
>> + ? ? ? DMACH_PCM1_RX,
>> + ? ? ? DMACH_PCM1_TX,
>> + ? ? ? DMACH_MSM_REQ0,
>> + ? ? ? DMACH_MSM_REQ1,
>> + ? ? ? DMACH_MSM_REQ2,
>> + ? ? ? DMACH_MSM_REQ3,
>> ?};
>

[PATCH v6 09/10] ARM: S5PC100: Modify platform data for pl330 driver

[Kukjin Kim]

Thomas Abraham wrote:
> 
> Hi Anca,
> 
> On 12 October 2011 09:41, Anca Emanuel <anca.emanuel@gmail.com> wrote:
> > On Mon, Oct 10, 2011 at 9:15 PM, Thomas Abraham
> > <thomas.abraham@linaro.org> wrote:
> > <spnip>
> >
> >> +u8 pdma1_peri[] = {
> >> + ? ? ? DMACH_UART0_RX,
> >> + ? ? ? DMACH_UART0_TX,
> >> + ? ? ? DMACH_UART1_RX,
> >> + ? ? ? DMACH_UART1_TX,
> >> + ? ? ? DMACH_UART2_RX,
> >> + ? ? ? DMACH_UART2_TX,
> >> + ? ? ? DMACH_UART3_RX,
> >> + ? ? ? DMACH_UART3_TX,
> >> + ? ? ? DMACH_IRDA,
> >> + ? ? ? DMACH_I2S0_RX,
> >> + ? ? ? DMACH_I2S0_TX,
> >> + ? ? ? DMACH_I2S0S_TX,
> >> + ? ? ? DMACH_I2S1_RX,
> >> + ? ? ? DMACH_I2S1_TX,
> >> + ? ? ? DMACH_I2S2_RX,
> >> + ? ? ? DMACH_I2S2_TX,
> >> + ? ? ? DMACH_SPI0_RX,
> >> + ? ? ? DMACH_SPI0_TX,
> >> + ? ? ? DMACH_SPI1_RX,
> >> + ? ? ? DMACH_SPI1_TX,
> >> + ? ? ? DMACH_SPI2_RX,
> >> + ? ? ? DMACH_SPI2_TX,
> >> + ? ? ? DMACH_PCM0_RX,
> >> + ? ? ? DMACH_PCM1_TX,
> >
> > typo ? ?DMACH_PCM0_TX
> 
> Yes. That is a mistake. I cross-checked others with the user manual
> and they are fine.
> 

OK, I think you don't need to re-send because I can fix it when I apply.
It would be helpful to me if you could check your patches again :)

If any problems, please let me know.

Thanks.

Best regards,
Kgene.
--
Kukjin Kim <kgene.kim@samsung.com>, Senior Engineer,
SW Solution Development Team, Samsung Electronics Co., Ltd.


> Thanks for pointing this out.
> 
> >
> >> + ? ? ? DMACH_PCM1_RX,
> >> + ? ? ? DMACH_PCM1_TX,
> >> + ? ? ? DMACH_MSM_REQ0,
> >> + ? ? ? DMACH_MSM_REQ1,
> >> + ? ? ? DMACH_MSM_REQ2,
> >> + ? ? ? DMACH_MSM_REQ3,
> >> ?};
> >

[PATCH v6 00/10] Add device tree support for PL330 dma controller driver

[Kukjin Kim]

Vinod Koul wrote:
> 
> On Tue, 2011-10-11 at 21:06 +0900, Kukjin Kim wrote:
> > Thomas Abraham wrote:
> >
> > Hi,
> >
> > Looks ok to me and if required,
> > Acked-by: Kukjin Kim <kgene.kim@samsung.com>
> >
> > And I hope since this includes many changes of arch/arm/Samsung stuff, this
> > would be sent to upstream via Samsung tree after ack from Vinod for dma
> > stuff.
> Sure, looks fine to me
> Acked-by: Vinod Koul <vinod.koul@intel.com>
> 
Hi Vinod,

OK, I will apply this series to send to upstream via Samsung tree. If you need branch to apply in your tree, please let me know.

As a note, Boojin Kim will test this series based on boards with -next of Samsung tree before sending to upstream even though I know Thomas tested and it works fine :)

Thanks.

Best regards,
Kgene.
--
Kukjin Kim <kgene.kim@samsung.com>, Senior Engineer,
SW Solution Development Team, Samsung Electronics Co., Ltd.

[PATCH v6 00/10] Add device tree support for PL330 dma controller driver

[Vinod Koul]

On Wed, 2011-10-12 at 14:03 +0900, Kukjin Kim wrote:
> Vinod Koul wrote:
> > 
> > On Tue, 2011-10-11 at 21:06 +0900, Kukjin Kim wrote:
> > > Thomas Abraham wrote:
> > >
> > > Hi,
> > >
> > > Looks ok to me and if required,
> > > Acked-by: Kukjin Kim <kgene.kim@samsung.com>
> > >
> > > And I hope since this includes many changes of arch/arm/Samsung stuff, this
> > > would be sent to upstream via Samsung tree after ack from Vinod for dma
> > > stuff.
> > Sure, looks fine to me
> > Acked-by: Vinod Koul <vinod.koul@intel.com>
> > 
> Hi Vinod,
> 
> OK, I will apply this series to send to upstream via Samsung tree. If
> you need branch to apply in your tree, please let me know.
If you send to linus and there are no dependencies then I don't need to
do anything...

-- 
~Vinod

[PATCH v6 03/10] ARM: EXYNOS4: Modify platform data for pl330 driver

[Thomas Abraham]

Dear Mr. Kim,

On 10 October 2011 23:45, Thomas Abraham <thomas.abraham@linaro.org> wrote:
> With the 'struct dma_pl330_peri' removed, the platfrom data for dma
> driver can be simplified to a simple list of peripheral request ids.
>
> Cc: Jassi Brar <jassisinghbrar@gmail.com>
> Cc: Boojin Kim <boojin.kim@samsung.com>
> Signed-off-by: Thomas Abraham <thomas.abraham@linaro.org>
> Acked-by: Kukjin Kim <kgene.kim@samsung.com>
> Acked-by: Grant Likely <grant.likely@secretlab.ca>
> ---
> ?arch/arm/mach-exynos4/dma.c | ?223 ++++++++++++-------------------------------
> ?1 files changed, 62 insertions(+), 161 deletions(-)
>
> diff --git a/arch/arm/mach-exynos4/dma.c b/arch/arm/mach-exynos4/dma.c
> index 9667c61..c3c0d17 100644
> --- a/arch/arm/mach-exynos4/dma.c
> +++ b/arch/arm/mach-exynos4/dma.c
> @@ -35,95 +35,40 @@
>
> ?static u64 dma_dmamask = DMA_BIT_MASK(32);
>
> -struct dma_pl330_peri pdma0_peri[28] = {
> - ? ? ? {
> - ? ? ? ? ? ? ? .peri_id = (u8)DMACH_PCM0_RX,
> - ? ? ? ? ? ? ? .rqtype = DEVTOMEM,
> - ? ? ? }, {
> - ? ? ? ? ? ? ? .peri_id = (u8)DMACH_PCM0_TX,
> - ? ? ? ? ? ? ? .rqtype = MEMTODEV,
> - ? ? ? }, {
> - ? ? ? ? ? ? ? .peri_id = (u8)DMACH_PCM2_RX,
> - ? ? ? ? ? ? ? .rqtype = DEVTOMEM,
> - ? ? ? }, {
> - ? ? ? ? ? ? ? .peri_id = (u8)DMACH_PCM2_TX,
> - ? ? ? ? ? ? ? .rqtype = MEMTODEV,
> - ? ? ? }, {
> - ? ? ? ? ? ? ? .peri_id = (u8)DMACH_MSM_REQ0,
> - ? ? ? }, {
> - ? ? ? ? ? ? ? .peri_id = (u8)DMACH_MSM_REQ2,
> - ? ? ? }, {
> - ? ? ? ? ? ? ? .peri_id = (u8)DMACH_SPI0_RX,
> - ? ? ? ? ? ? ? .rqtype = DEVTOMEM,
> - ? ? ? }, {
> - ? ? ? ? ? ? ? .peri_id = (u8)DMACH_SPI0_TX,
> - ? ? ? ? ? ? ? .rqtype = MEMTODEV,
> - ? ? ? }, {
> - ? ? ? ? ? ? ? .peri_id = (u8)DMACH_SPI2_RX,
> - ? ? ? ? ? ? ? .rqtype = DEVTOMEM,
> - ? ? ? }, {
> - ? ? ? ? ? ? ? .peri_id = (u8)DMACH_SPI2_TX,
> - ? ? ? ? ? ? ? .rqtype = MEMTODEV,
> - ? ? ? }, {
> - ? ? ? ? ? ? ? .peri_id = (u8)DMACH_I2S0S_TX,
> - ? ? ? ? ? ? ? .rqtype = MEMTODEV,
> - ? ? ? }, {
> - ? ? ? ? ? ? ? .peri_id = (u8)DMACH_I2S0_RX,
> - ? ? ? ? ? ? ? .rqtype = DEVTOMEM,
> - ? ? ? }, {
> - ? ? ? ? ? ? ? .peri_id = (u8)DMACH_I2S0_TX,
> - ? ? ? ? ? ? ? .rqtype = MEMTODEV,
> - ? ? ? }, {
> - ? ? ? ? ? ? ? .peri_id = (u8)DMACH_UART0_RX,
> - ? ? ? ? ? ? ? .rqtype = DEVTOMEM,
> - ? ? ? }, {
> - ? ? ? ? ? ? ? .peri_id = (u8)DMACH_UART0_TX,
> - ? ? ? ? ? ? ? .rqtype = MEMTODEV,
> - ? ? ? }, {
> - ? ? ? ? ? ? ? .peri_id = (u8)DMACH_UART2_RX,
> - ? ? ? ? ? ? ? .rqtype = DEVTOMEM,
> - ? ? ? }, {
> - ? ? ? ? ? ? ? .peri_id = (u8)DMACH_UART2_TX,
> - ? ? ? ? ? ? ? .rqtype = MEMTODEV,
> - ? ? ? }, {
> - ? ? ? ? ? ? ? .peri_id = (u8)DMACH_UART4_RX,
> - ? ? ? ? ? ? ? .rqtype = DEVTOMEM,
> - ? ? ? }, {
> - ? ? ? ? ? ? ? .peri_id = (u8)DMACH_UART4_TX,
> - ? ? ? ? ? ? ? .rqtype = MEMTODEV,
> - ? ? ? }, {
> - ? ? ? ? ? ? ? .peri_id = (u8)DMACH_SLIMBUS0_RX,
> - ? ? ? ? ? ? ? .rqtype = DEVTOMEM,
> - ? ? ? }, {
> - ? ? ? ? ? ? ? .peri_id = (u8)DMACH_SLIMBUS0_TX,
> - ? ? ? ? ? ? ? .rqtype = MEMTODEV,
> - ? ? ? }, {
> - ? ? ? ? ? ? ? .peri_id = (u8)DMACH_SLIMBUS2_RX,
> - ? ? ? ? ? ? ? .rqtype = DEVTOMEM,
> - ? ? ? }, {
> - ? ? ? ? ? ? ? .peri_id = (u8)DMACH_SLIMBUS2_TX,
> - ? ? ? ? ? ? ? .rqtype = MEMTODEV,
> - ? ? ? }, {
> - ? ? ? ? ? ? ? .peri_id = (u8)DMACH_SLIMBUS4_RX,
> - ? ? ? ? ? ? ? .rqtype = DEVTOMEM,
> - ? ? ? }, {
> - ? ? ? ? ? ? ? .peri_id = (u8)DMACH_SLIMBUS4_TX,
> - ? ? ? ? ? ? ? .rqtype = MEMTODEV,
> - ? ? ? }, {
> - ? ? ? ? ? ? ? .peri_id = (u8)DMACH_AC97_MICIN,
> - ? ? ? ? ? ? ? .rqtype = DEVTOMEM,
> - ? ? ? }, {
> - ? ? ? ? ? ? ? .peri_id = (u8)DMACH_AC97_PCMIN,
> - ? ? ? ? ? ? ? .rqtype = DEVTOMEM,
> - ? ? ? }, {
> - ? ? ? ? ? ? ? .peri_id = (u8)DMACH_AC97_PCMOUT,
> - ? ? ? ? ? ? ? .rqtype = MEMTODEV,
> - ? ? ? },
> +u8 pdma0_peri[] = {
> + ? ? ? DMACH_PCM0_RX,
> + ? ? ? DMACH_PCM0_TX,
> + ? ? ? DMACH_PCM2_RX,
> + ? ? ? DMACH_PCM2_TX,
> + ? ? ? DMACH_MSM_REQ0,
> + ? ? ? DMACH_MSM_REQ2,
> + ? ? ? DMACH_SPI0_RX,
> + ? ? ? DMACH_SPI0_TX,
> + ? ? ? DMACH_SPI2_RX,
> + ? ? ? DMACH_SPI2_TX,
> + ? ? ? DMACH_I2S0S_TX,
> + ? ? ? DMACH_I2S0_RX,
> + ? ? ? DMACH_I2S0_TX,

As you have suggested, I have rechecked the platform data for all s5p
platforms in this patchset. Here, DMACH_I2S2_RX (event id 13) and
DMACH_I2S2_TX (event id 14) of DMAC[0] are missing as per the
exynos4210 user manual. But these where missing in the original code
as well which this patch modified. If possible, could you please let
me know if DMACH_I2S2_RX and DMACH_I2S2_TX are indeed event id 13 and
14 in DMAC[0].

I have rechecked the other s5p platform data for dmac (s5p64x0,
s5pc100, s5pv210). Apart from the typo pointed out by Anca for
s5pc100, there are no other issues.

Thanks,
Thomas.

> + ? ? ? DMACH_UART0_RX,
> + ? ? ? DMACH_UART0_TX,
> + ? ? ? DMACH_UART2_RX,
> + ? ? ? DMACH_UART2_TX,
> + ? ? ? DMACH_UART4_RX,
> + ? ? ? DMACH_UART4_TX,
> + ? ? ? DMACH_SLIMBUS0_RX,
> + ? ? ? DMACH_SLIMBUS0_TX,
> + ? ? ? DMACH_SLIMBUS2_RX,
> + ? ? ? DMACH_SLIMBUS2_TX,
> + ? ? ? DMACH_SLIMBUS4_RX,
> + ? ? ? DMACH_SLIMBUS4_TX,
> + ? ? ? DMACH_AC97_MICIN,
> + ? ? ? DMACH_AC97_PCMIN,
> + ? ? ? DMACH_AC97_PCMOUT,
> ?};
>
> ?struct dma_pl330_platdata exynos4_pdma0_pdata = {
> ? ? ? ?.nr_valid_peri = ARRAY_SIZE(pdma0_peri),
> - ? ? ? .peri = pdma0_peri,
> + ? ? ? .peri_id = pdma0_peri,
> ?};
>

[...]

[PATCH v6 03/10] ARM: EXYNOS4: Modify platform data for pl330 driver

[Boojin Kim]

Thomas Abraham wrote:
>
> Dear Mr. Kim,
>
> On 10 October 2011 23:45, Thomas Abraham <thomas.abraham@linaro.org>
> wrote:
> > With the 'struct dma_pl330_peri' removed, the platfrom data for dma
> > driver can be simplified to a simple list of peripheral request ids.
> >
> > Cc: Jassi Brar <jassisinghbrar@gmail.com>
> > Cc: Boojin Kim <boojin.kim@samsung.com>
> > Signed-off-by: Thomas Abraham <thomas.abraham@linaro.org>
> > Acked-by: Kukjin Kim <kgene.kim@samsung.com>
> > Acked-by: Grant Likely <grant.likely@secretlab.ca>
> > ---
> > ?arch/arm/mach-exynos4/dma.c | ?223 ++++++++++++---------------------
> ----------
> > ?1 files changed, 62 insertions(+), 161 deletions(-)
> >
> > diff --git a/arch/arm/mach-exynos4/dma.c b/arch/arm/mach-
> exynos4/dma.c
> > index 9667c61..c3c0d17 100644
> > --- a/arch/arm/mach-exynos4/dma.c
> > +++ b/arch/arm/mach-exynos4/dma.c
> > @@ -35,95 +35,40 @@
> >
> > ?static u64 dma_dmamask = DMA_BIT_MASK(32);
> >
> > -struct dma_pl330_peri pdma0_peri[28] = {
> > - ? ? ? {
> > - ? ? ? ? ? ? ? .peri_id = (u8)DMACH_PCM0_RX,
> > - ? ? ? ? ? ? ? .rqtype = DEVTOMEM,
> > - ? ? ? }, {
> > - ? ? ? ? ? ? ? .peri_id = (u8)DMACH_PCM0_TX,
> > - ? ? ? ? ? ? ? .rqtype = MEMTODEV,
> > - ? ? ? }, {
> > - ? ? ? ? ? ? ? .peri_id = (u8)DMACH_PCM2_RX,
> > - ? ? ? ? ? ? ? .rqtype = DEVTOMEM,
> > - ? ? ? }, {
> > - ? ? ? ? ? ? ? .peri_id = (u8)DMACH_PCM2_TX,
> > - ? ? ? ? ? ? ? .rqtype = MEMTODEV,
> > - ? ? ? }, {
> > - ? ? ? ? ? ? ? .peri_id = (u8)DMACH_MSM_REQ0,
> > - ? ? ? }, {
> > - ? ? ? ? ? ? ? .peri_id = (u8)DMACH_MSM_REQ2,
> > - ? ? ? }, {
> > - ? ? ? ? ? ? ? .peri_id = (u8)DMACH_SPI0_RX,
> > - ? ? ? ? ? ? ? .rqtype = DEVTOMEM,
> > - ? ? ? }, {
> > - ? ? ? ? ? ? ? .peri_id = (u8)DMACH_SPI0_TX,
> > - ? ? ? ? ? ? ? .rqtype = MEMTODEV,
> > - ? ? ? }, {
> > - ? ? ? ? ? ? ? .peri_id = (u8)DMACH_SPI2_RX,
> > - ? ? ? ? ? ? ? .rqtype = DEVTOMEM,
> > - ? ? ? }, {
> > - ? ? ? ? ? ? ? .peri_id = (u8)DMACH_SPI2_TX,
> > - ? ? ? ? ? ? ? .rqtype = MEMTODEV,
> > - ? ? ? }, {
> > - ? ? ? ? ? ? ? .peri_id = (u8)DMACH_I2S0S_TX,
> > - ? ? ? ? ? ? ? .rqtype = MEMTODEV,
> > - ? ? ? }, {
> > - ? ? ? ? ? ? ? .peri_id = (u8)DMACH_I2S0_RX,
> > - ? ? ? ? ? ? ? .rqtype = DEVTOMEM,
> > - ? ? ? }, {
> > - ? ? ? ? ? ? ? .peri_id = (u8)DMACH_I2S0_TX,
> > - ? ? ? ? ? ? ? .rqtype = MEMTODEV,
> > - ? ? ? }, {
> > - ? ? ? ? ? ? ? .peri_id = (u8)DMACH_UART0_RX,
> > - ? ? ? ? ? ? ? .rqtype = DEVTOMEM,
> > - ? ? ? }, {
> > - ? ? ? ? ? ? ? .peri_id = (u8)DMACH_UART0_TX,
> > - ? ? ? ? ? ? ? .rqtype = MEMTODEV,
> > - ? ? ? }, {
> > - ? ? ? ? ? ? ? .peri_id = (u8)DMACH_UART2_RX,
> > - ? ? ? ? ? ? ? .rqtype = DEVTOMEM,
> > - ? ? ? }, {
> > - ? ? ? ? ? ? ? .peri_id = (u8)DMACH_UART2_TX,
> > - ? ? ? ? ? ? ? .rqtype = MEMTODEV,
> > - ? ? ? }, {
> > - ? ? ? ? ? ? ? .peri_id = (u8)DMACH_UART4_RX,
> > - ? ? ? ? ? ? ? .rqtype = DEVTOMEM,
> > - ? ? ? }, {
> > - ? ? ? ? ? ? ? .peri_id = (u8)DMACH_UART4_TX,
> > - ? ? ? ? ? ? ? .rqtype = MEMTODEV,
> > - ? ? ? }, {
> > - ? ? ? ? ? ? ? .peri_id = (u8)DMACH_SLIMBUS0_RX,
> > - ? ? ? ? ? ? ? .rqtype = DEVTOMEM,
> > - ? ? ? }, {
> > - ? ? ? ? ? ? ? .peri_id = (u8)DMACH_SLIMBUS0_TX,
> > - ? ? ? ? ? ? ? .rqtype = MEMTODEV,
> > - ? ? ? }, {
> > - ? ? ? ? ? ? ? .peri_id = (u8)DMACH_SLIMBUS2_RX,
> > - ? ? ? ? ? ? ? .rqtype = DEVTOMEM,
> > - ? ? ? }, {
> > - ? ? ? ? ? ? ? .peri_id = (u8)DMACH_SLIMBUS2_TX,
> > - ? ? ? ? ? ? ? .rqtype = MEMTODEV,
> > - ? ? ? }, {
> > - ? ? ? ? ? ? ? .peri_id = (u8)DMACH_SLIMBUS4_RX,
> > - ? ? ? ? ? ? ? .rqtype = DEVTOMEM,
> > - ? ? ? }, {
> > - ? ? ? ? ? ? ? .peri_id = (u8)DMACH_SLIMBUS4_TX,
> > - ? ? ? ? ? ? ? .rqtype = MEMTODEV,
> > - ? ? ? }, {
> > - ? ? ? ? ? ? ? .peri_id = (u8)DMACH_AC97_MICIN,
> > - ? ? ? ? ? ? ? .rqtype = DEVTOMEM,
> > - ? ? ? }, {
> > - ? ? ? ? ? ? ? .peri_id = (u8)DMACH_AC97_PCMIN,
> > - ? ? ? ? ? ? ? .rqtype = DEVTOMEM,
> > - ? ? ? }, {
> > - ? ? ? ? ? ? ? .peri_id = (u8)DMACH_AC97_PCMOUT,
> > - ? ? ? ? ? ? ? .rqtype = MEMTODEV,
> > - ? ? ? },
> > +u8 pdma0_peri[] = {
> > + ? ? ? DMACH_PCM0_RX,
> > + ? ? ? DMACH_PCM0_TX,
> > + ? ? ? DMACH_PCM2_RX,
> > + ? ? ? DMACH_PCM2_TX,
> > + ? ? ? DMACH_MSM_REQ0,
> > + ? ? ? DMACH_MSM_REQ2,
> > + ? ? ? DMACH_SPI0_RX,
> > + ? ? ? DMACH_SPI0_TX,
> > + ? ? ? DMACH_SPI2_RX,
> > + ? ? ? DMACH_SPI2_TX,
> > + ? ? ? DMACH_I2S0S_TX,
> > + ? ? ? DMACH_I2S0_RX,
> > + ? ? ? DMACH_I2S0_TX,
>
> As you have suggested, I have rechecked the platform data for all s5p
> platforms in this patchset. Here, DMACH_I2S2_RX (event id 13) and
> DMACH_I2S2_TX (event id 14) of DMAC[0] are missing as per the
> exynos4210 user manual. But these where missing in the original code
> as well which this patch modified. If possible, could you please let
> me know if DMACH_I2S2_RX and DMACH_I2S2_TX are indeed event id 13 and
> 14 in DMAC[0].

Yes, DMACH_I2S2_RX and DMACH_I2X2_TX are missed from my patch.
Can you modify it although you are inconvenient ?

Thanks..
Boojin

>
> I have rechecked the other s5p platform data for dmac (s5p64x0,
> s5pc100, s5pv210). Apart from the typo pointed out by Anca for
> s5pc100, there are no other issues.
>
> Thanks,
> Thomas.
>
> > + ? ? ? DMACH_UART0_RX,
> > + ? ? ? DMACH_UART0_TX,
> > + ? ? ? DMACH_UART2_RX,
> > + ? ? ? DMACH_UART2_TX,
> > + ? ? ? DMACH_UART4_RX,
> > + ? ? ? DMACH_UART4_TX,
> > + ? ? ? DMACH_SLIMBUS0_RX,
> > + ? ? ? DMACH_SLIMBUS0_TX,
> > + ? ? ? DMACH_SLIMBUS2_RX,
> > + ? ? ? DMACH_SLIMBUS2_TX,
> > + ? ? ? DMACH_SLIMBUS4_RX,
> > + ? ? ? DMACH_SLIMBUS4_TX,
> > + ? ? ? DMACH_AC97_MICIN,
> > + ? ? ? DMACH_AC97_PCMIN,
> > + ? ? ? DMACH_AC97_PCMOUT,
> > ?};
> >
> > ?struct dma_pl330_platdata exynos4_pdma0_pdata = {
> > ? ? ? ?.nr_valid_peri = ARRAY_SIZE(pdma0_peri),
> > - ? ? ? .peri = pdma0_peri,
> > + ? ? ? .peri_id = pdma0_peri,
> > ?};
> >
>
> [...]
> --
> To unsubscribe from this list: send the line "unsubscribe linux-
> samsung-soc" in
> the body of a message to majordomo at vger.kernel.org
> More majordomo info at  http://vger.kernel.org/majordomo-info.html

[PATCH v6 03/10] ARM: EXYNOS4: Modify platform data for pl330 driver

[Thomas Abraham]

Dear Boojin Kim,

2011/10/12 Boojin Kim <boojin.kim@samsung.com>:
> Thomas Abraham wrote:
>>
>> Dear Mr. Kim,
>>
>> On 10 October 2011 23:45, Thomas Abraham <thomas.abraham@linaro.org>
>> wrote:
>> > With the 'struct dma_pl330_peri' removed, the platfrom data for dma
>> > driver can be simplified to a simple list of peripheral request ids.
>> >
>> > Cc: Jassi Brar <jassisinghbrar@gmail.com>
>> > Cc: Boojin Kim <boojin.kim@samsung.com>
>> > Signed-off-by: Thomas Abraham <thomas.abraham@linaro.org>
>> > Acked-by: Kukjin Kim <kgene.kim@samsung.com>
>> > Acked-by: Grant Likely <grant.likely@secretlab.ca>
>> > ---
>> > ?arch/arm/mach-exynos4/dma.c | ?223 ++++++++++++---------------------
>> ----------
>> > ?1 files changed, 62 insertions(+), 161 deletions(-)
>> >
>> > diff --git a/arch/arm/mach-exynos4/dma.c b/arch/arm/mach-
>> exynos4/dma.c
>> > index 9667c61..c3c0d17 100644
>> > --- a/arch/arm/mach-exynos4/dma.c
>> > +++ b/arch/arm/mach-exynos4/dma.c
>> > @@ -35,95 +35,40 @@
>> >
>> > ?static u64 dma_dmamask = DMA_BIT_MASK(32);
>> >
>> > -struct dma_pl330_peri pdma0_peri[28] = {
>> > - ? ? ? {
>> > - ? ? ? ? ? ? ? .peri_id = (u8)DMACH_PCM0_RX,
>> > - ? ? ? ? ? ? ? .rqtype = DEVTOMEM,
>> > - ? ? ? }, {
>> > - ? ? ? ? ? ? ? .peri_id = (u8)DMACH_PCM0_TX,
>> > - ? ? ? ? ? ? ? .rqtype = MEMTODEV,
>> > - ? ? ? }, {
>> > - ? ? ? ? ? ? ? .peri_id = (u8)DMACH_PCM2_RX,
>> > - ? ? ? ? ? ? ? .rqtype = DEVTOMEM,
>> > - ? ? ? }, {
>> > - ? ? ? ? ? ? ? .peri_id = (u8)DMACH_PCM2_TX,
>> > - ? ? ? ? ? ? ? .rqtype = MEMTODEV,
>> > - ? ? ? }, {
>> > - ? ? ? ? ? ? ? .peri_id = (u8)DMACH_MSM_REQ0,
>> > - ? ? ? }, {
>> > - ? ? ? ? ? ? ? .peri_id = (u8)DMACH_MSM_REQ2,
>> > - ? ? ? }, {
>> > - ? ? ? ? ? ? ? .peri_id = (u8)DMACH_SPI0_RX,
>> > - ? ? ? ? ? ? ? .rqtype = DEVTOMEM,
>> > - ? ? ? }, {
>> > - ? ? ? ? ? ? ? .peri_id = (u8)DMACH_SPI0_TX,
>> > - ? ? ? ? ? ? ? .rqtype = MEMTODEV,
>> > - ? ? ? }, {
>> > - ? ? ? ? ? ? ? .peri_id = (u8)DMACH_SPI2_RX,
>> > - ? ? ? ? ? ? ? .rqtype = DEVTOMEM,
>> > - ? ? ? }, {
>> > - ? ? ? ? ? ? ? .peri_id = (u8)DMACH_SPI2_TX,
>> > - ? ? ? ? ? ? ? .rqtype = MEMTODEV,
>> > - ? ? ? }, {
>> > - ? ? ? ? ? ? ? .peri_id = (u8)DMACH_I2S0S_TX,
>> > - ? ? ? ? ? ? ? .rqtype = MEMTODEV,
>> > - ? ? ? }, {
>> > - ? ? ? ? ? ? ? .peri_id = (u8)DMACH_I2S0_RX,
>> > - ? ? ? ? ? ? ? .rqtype = DEVTOMEM,
>> > - ? ? ? }, {
>> > - ? ? ? ? ? ? ? .peri_id = (u8)DMACH_I2S0_TX,
>> > - ? ? ? ? ? ? ? .rqtype = MEMTODEV,
>> > - ? ? ? }, {
>> > - ? ? ? ? ? ? ? .peri_id = (u8)DMACH_UART0_RX,
>> > - ? ? ? ? ? ? ? .rqtype = DEVTOMEM,
>> > - ? ? ? }, {
>> > - ? ? ? ? ? ? ? .peri_id = (u8)DMACH_UART0_TX,
>> > - ? ? ? ? ? ? ? .rqtype = MEMTODEV,
>> > - ? ? ? }, {
>> > - ? ? ? ? ? ? ? .peri_id = (u8)DMACH_UART2_RX,
>> > - ? ? ? ? ? ? ? .rqtype = DEVTOMEM,
>> > - ? ? ? }, {
>> > - ? ? ? ? ? ? ? .peri_id = (u8)DMACH_UART2_TX,
>> > - ? ? ? ? ? ? ? .rqtype = MEMTODEV,
>> > - ? ? ? }, {
>> > - ? ? ? ? ? ? ? .peri_id = (u8)DMACH_UART4_RX,
>> > - ? ? ? ? ? ? ? .rqtype = DEVTOMEM,
>> > - ? ? ? }, {
>> > - ? ? ? ? ? ? ? .peri_id = (u8)DMACH_UART4_TX,
>> > - ? ? ? ? ? ? ? .rqtype = MEMTODEV,
>> > - ? ? ? }, {
>> > - ? ? ? ? ? ? ? .peri_id = (u8)DMACH_SLIMBUS0_RX,
>> > - ? ? ? ? ? ? ? .rqtype = DEVTOMEM,
>> > - ? ? ? }, {
>> > - ? ? ? ? ? ? ? .peri_id = (u8)DMACH_SLIMBUS0_TX,
>> > - ? ? ? ? ? ? ? .rqtype = MEMTODEV,
>> > - ? ? ? }, {
>> > - ? ? ? ? ? ? ? .peri_id = (u8)DMACH_SLIMBUS2_RX,
>> > - ? ? ? ? ? ? ? .rqtype = DEVTOMEM,
>> > - ? ? ? }, {
>> > - ? ? ? ? ? ? ? .peri_id = (u8)DMACH_SLIMBUS2_TX,
>> > - ? ? ? ? ? ? ? .rqtype = MEMTODEV,
>> > - ? ? ? }, {
>> > - ? ? ? ? ? ? ? .peri_id = (u8)DMACH_SLIMBUS4_RX,
>> > - ? ? ? ? ? ? ? .rqtype = DEVTOMEM,
>> > - ? ? ? }, {
>> > - ? ? ? ? ? ? ? .peri_id = (u8)DMACH_SLIMBUS4_TX,
>> > - ? ? ? ? ? ? ? .rqtype = MEMTODEV,
>> > - ? ? ? }, {
>> > - ? ? ? ? ? ? ? .peri_id = (u8)DMACH_AC97_MICIN,
>> > - ? ? ? ? ? ? ? .rqtype = DEVTOMEM,
>> > - ? ? ? }, {
>> > - ? ? ? ? ? ? ? .peri_id = (u8)DMACH_AC97_PCMIN,
>> > - ? ? ? ? ? ? ? .rqtype = DEVTOMEM,
>> > - ? ? ? }, {
>> > - ? ? ? ? ? ? ? .peri_id = (u8)DMACH_AC97_PCMOUT,
>> > - ? ? ? ? ? ? ? .rqtype = MEMTODEV,
>> > - ? ? ? },
>> > +u8 pdma0_peri[] = {
>> > + ? ? ? DMACH_PCM0_RX,
>> > + ? ? ? DMACH_PCM0_TX,
>> > + ? ? ? DMACH_PCM2_RX,
>> > + ? ? ? DMACH_PCM2_TX,
>> > + ? ? ? DMACH_MSM_REQ0,
>> > + ? ? ? DMACH_MSM_REQ2,
>> > + ? ? ? DMACH_SPI0_RX,
>> > + ? ? ? DMACH_SPI0_TX,
>> > + ? ? ? DMACH_SPI2_RX,
>> > + ? ? ? DMACH_SPI2_TX,
>> > + ? ? ? DMACH_I2S0S_TX,
>> > + ? ? ? DMACH_I2S0_RX,
>> > + ? ? ? DMACH_I2S0_TX,
>>
>> As you have suggested, I have rechecked the platform data for all s5p
>> platforms in this patchset. Here, DMACH_I2S2_RX (event id 13) and
>> DMACH_I2S2_TX (event id 14) of DMAC[0] are missing as per the
>> exynos4210 user manual. But these where missing in the original code
>> as well which this patch modified. If possible, could you please let
>> me know if DMACH_I2S2_RX and DMACH_I2S2_TX are indeed event id 13 and
>> 14 in DMAC[0].
>
> Yes, DMACH_I2S2_RX and DMACH_I2X2_TX are missed from my patch.
> Can you modify it although you are inconvenient ?

Thank you for letting me know about these event numbers.

Yes. I can modify this patch and s5pc100 patch for Anca's comment and
send these two updated patches after testing.

Thanks,
Thomas.

>
> Thanks..
> Boojin
>
>>
>> I have rechecked the other s5p platform data for dmac (s5p64x0,
>> s5pc100, s5pv210). Apart from the typo pointed out by Anca for
>> s5pc100, there are no other issues.
>>
>> Thanks,
>> Thomas.
>>
>> > + ? ? ? DMACH_UART0_RX,
>> > + ? ? ? DMACH_UART0_TX,
>> > + ? ? ? DMACH_UART2_RX,
>> > + ? ? ? DMACH_UART2_TX,
>> > + ? ? ? DMACH_UART4_RX,
>> > + ? ? ? DMACH_UART4_TX,
>> > + ? ? ? DMACH_SLIMBUS0_RX,
>> > + ? ? ? DMACH_SLIMBUS0_TX,
>> > + ? ? ? DMACH_SLIMBUS2_RX,
>> > + ? ? ? DMACH_SLIMBUS2_TX,
>> > + ? ? ? DMACH_SLIMBUS4_RX,
>> > + ? ? ? DMACH_SLIMBUS4_TX,
>> > + ? ? ? DMACH_AC97_MICIN,
>> > + ? ? ? DMACH_AC97_PCMIN,
>> > + ? ? ? DMACH_AC97_PCMOUT,
>> > ?};
>> >
>> > ?struct dma_pl330_platdata exynos4_pdma0_pdata = {
>> > ? ? ? ?.nr_valid_peri = ARRAY_SIZE(pdma0_peri),
>> > - ? ? ? .peri = pdma0_peri,
>> > + ? ? ? .peri_id = pdma0_peri,
>> > ?};
>> >
>>
>> [...]
>> --
>> To unsubscribe from this list: send the line "unsubscribe linux-
>> samsung-soc" in
>> the body of a message to majordomo at vger.kernel.org
>> More majordomo info at ?http://vger.kernel.org/majordomo-info.html
>
>
>

[PATCH v7 03/10] ARM: EXYNOS4: Modify platform data for pl330 driver

[Thomas Abraham]

With the 'struct dma_pl330_peri' removed, the platfrom data for dma
driver can be simplified to a simple list of peripheral request ids.

Cc: Jassi Brar <jassisinghbrar@gmail.com>
Cc: Boojin Kim <boojin.kim@samsung.com>
Signed-off-by: Thomas Abraham <thomas.abraham@linaro.org>
Acked-by: Kukjin Kim <kgene.kim@samsung.com>
Acked-by: Grant Likely <grant.likely@secretlab.ca>
Acked-by: Boojin Kim <boojin.kim@samsung.com>
---
 arch/arm/mach-exynos4/dma.c |  225 ++++++++++++-------------------------------
 1 files changed, 64 insertions(+), 161 deletions(-)

diff --git a/arch/arm/mach-exynos4/dma.c b/arch/arm/mach-exynos4/dma.c
index 9667c61..141093d 100644
--- a/arch/arm/mach-exynos4/dma.c
+++ b/arch/arm/mach-exynos4/dma.c
@@ -35,95 +35,42 @@
 
 static u64 dma_dmamask = DMA_BIT_MASK(32);
 
-struct dma_pl330_peri pdma0_peri[28] = {
-	{
-		.peri_id = (u8)DMACH_PCM0_RX,
-		.rqtype = DEVTOMEM,
-	}, {
-		.peri_id = (u8)DMACH_PCM0_TX,
-		.rqtype = MEMTODEV,
-	}, {
-		.peri_id = (u8)DMACH_PCM2_RX,
-		.rqtype = DEVTOMEM,
-	}, {
-		.peri_id = (u8)DMACH_PCM2_TX,
-		.rqtype = MEMTODEV,
-	}, {
-		.peri_id = (u8)DMACH_MSM_REQ0,
-	}, {
-		.peri_id = (u8)DMACH_MSM_REQ2,
-	}, {
-		.peri_id = (u8)DMACH_SPI0_RX,
-		.rqtype = DEVTOMEM,
-	}, {
-		.peri_id = (u8)DMACH_SPI0_TX,
-		.rqtype = MEMTODEV,
-	}, {
-		.peri_id = (u8)DMACH_SPI2_RX,
-		.rqtype = DEVTOMEM,
-	}, {
-		.peri_id = (u8)DMACH_SPI2_TX,
-		.rqtype = MEMTODEV,
-	}, {
-		.peri_id = (u8)DMACH_I2S0S_TX,
-		.rqtype = MEMTODEV,
-	}, {
-		.peri_id = (u8)DMACH_I2S0_RX,
-		.rqtype = DEVTOMEM,
-	}, {
-		.peri_id = (u8)DMACH_I2S0_TX,
-		.rqtype = MEMTODEV,
-	}, {
-		.peri_id = (u8)DMACH_UART0_RX,
-		.rqtype = DEVTOMEM,
-	}, {
-		.peri_id = (u8)DMACH_UART0_TX,
-		.rqtype = MEMTODEV,
-	}, {
-		.peri_id = (u8)DMACH_UART2_RX,
-		.rqtype = DEVTOMEM,
-	}, {
-		.peri_id = (u8)DMACH_UART2_TX,
-		.rqtype = MEMTODEV,
-	}, {
-		.peri_id = (u8)DMACH_UART4_RX,
-		.rqtype = DEVTOMEM,
-	}, {
-		.peri_id = (u8)DMACH_UART4_TX,
-		.rqtype = MEMTODEV,
-	}, {
-		.peri_id = (u8)DMACH_SLIMBUS0_RX,
-		.rqtype = DEVTOMEM,
-	}, {
-		.peri_id = (u8)DMACH_SLIMBUS0_TX,
-		.rqtype = MEMTODEV,
-	}, {
-		.peri_id = (u8)DMACH_SLIMBUS2_RX,
-		.rqtype = DEVTOMEM,
-	}, {
-		.peri_id = (u8)DMACH_SLIMBUS2_TX,
-		.rqtype = MEMTODEV,
-	}, {
-		.peri_id = (u8)DMACH_SLIMBUS4_RX,
-		.rqtype = DEVTOMEM,
-	}, {
-		.peri_id = (u8)DMACH_SLIMBUS4_TX,
-		.rqtype = MEMTODEV,
-	}, {
-		.peri_id = (u8)DMACH_AC97_MICIN,
-		.rqtype = DEVTOMEM,
-	}, {
-		.peri_id = (u8)DMACH_AC97_PCMIN,
-		.rqtype = DEVTOMEM,
-	}, {
-		.peri_id = (u8)DMACH_AC97_PCMOUT,
-		.rqtype = MEMTODEV,
-	},
+u8 pdma0_peri[] = {
+	DMACH_PCM0_RX,
+	DMACH_PCM0_TX,
+	DMACH_PCM2_RX,
+	DMACH_PCM2_TX,
+	DMACH_MSM_REQ0,
+	DMACH_MSM_REQ2,
+	DMACH_SPI0_RX,
+	DMACH_SPI0_TX,
+	DMACH_SPI2_RX,
+	DMACH_SPI2_TX,
+	DMACH_I2S0S_TX,
+	DMACH_I2S0_RX,
+	DMACH_I2S0_TX,
+	DMACH_I2S2_RX,
+	DMACH_I2S2_TX,
+	DMACH_UART0_RX,
+	DMACH_UART0_TX,
+	DMACH_UART2_RX,
+	DMACH_UART2_TX,
+	DMACH_UART4_RX,
+	DMACH_UART4_TX,
+	DMACH_SLIMBUS0_RX,
+	DMACH_SLIMBUS0_TX,
+	DMACH_SLIMBUS2_RX,
+	DMACH_SLIMBUS2_TX,
+	DMACH_SLIMBUS4_RX,
+	DMACH_SLIMBUS4_TX,
+	DMACH_AC97_MICIN,
+	DMACH_AC97_PCMIN,
+	DMACH_AC97_PCMOUT,
 };
 
 struct dma_pl330_platdata exynos4_pdma0_pdata = {
 	.nr_valid_peri = ARRAY_SIZE(pdma0_peri),
-	.peri = pdma0_peri,
+	.peri_id = pdma0_peri,
 };
 
 struct amba_device exynos4_device_pdma0 = {
@@ -142,86 +89,37 @@ struct amba_device exynos4_device_pdma0 = {
 	.periphid = 0x00041330,
 };
 
-struct dma_pl330_peri pdma1_peri[25] = {
-	{
-		.peri_id = (u8)DMACH_PCM0_RX,
-		.rqtype = DEVTOMEM,
-	}, {
-		.peri_id = (u8)DMACH_PCM0_TX,
-		.rqtype = MEMTODEV,
-	}, {
-		.peri_id = (u8)DMACH_PCM1_RX,
-		.rqtype = DEVTOMEM,
-	}, {
-		.peri_id = (u8)DMACH_PCM1_TX,
-		.rqtype = MEMTODEV,
-	}, {
-		.peri_id = (u8)DMACH_MSM_REQ1,
-	}, {
-		.peri_id = (u8)DMACH_MSM_REQ3,
-	}, {
-		.peri_id = (u8)DMACH_SPI1_RX,
-		.rqtype = DEVTOMEM,
-	}, {
-		.peri_id = (u8)DMACH_SPI1_TX,
-		.rqtype = MEMTODEV,
-	}, {
-		.peri_id = (u8)DMACH_I2S0S_TX,
-		.rqtype = MEMTODEV,
-	}, {
-		.peri_id = (u8)DMACH_I2S0_RX,
-		.rqtype = DEVTOMEM,
-	}, {
-		.peri_id = (u8)DMACH_I2S0_TX,
-		.rqtype = MEMTODEV,
-	}, {
-		.peri_id = (u8)DMACH_I2S1_RX,
-		.rqtype = DEVTOMEM,
-	}, {
-		.peri_id = (u8)DMACH_I2S1_TX,
-		.rqtype = MEMTODEV,
-	}, {
-		.peri_id = (u8)DMACH_UART0_RX,
-		.rqtype = DEVTOMEM,
-	}, {
-		.peri_id = (u8)DMACH_UART0_TX,
-		.rqtype = MEMTODEV,
-	}, {
-		.peri_id = (u8)DMACH_UART1_RX,
-		.rqtype = DEVTOMEM,
-	}, {
-		.peri_id = (u8)DMACH_UART1_TX,
-		.rqtype = MEMTODEV,
-	}, {
-		.peri_id = (u8)DMACH_UART3_RX,
-		.rqtype = DEVTOMEM,
-	}, {
-		.peri_id = (u8)DMACH_UART3_TX,
-		.rqtype = MEMTODEV,
-	}, {
-		.peri_id = (u8)DMACH_SLIMBUS1_RX,
-		.rqtype = DEVTOMEM,
-	}, {
-		.peri_id = (u8)DMACH_SLIMBUS1_TX,
-		.rqtype = MEMTODEV,
-	}, {
-		.peri_id = (u8)DMACH_SLIMBUS3_RX,
-		.rqtype = DEVTOMEM,
-	}, {
-		.peri_id = (u8)DMACH_SLIMBUS3_TX,
-		.rqtype = MEMTODEV,
-	}, {
-		.peri_id = (u8)DMACH_SLIMBUS5_RX,
-		.rqtype = DEVTOMEM,
-	}, {
-		.peri_id = (u8)DMACH_SLIMBUS5_TX,
-		.rqtype = MEMTODEV,
-	},
+u8 pdma1_peri[] = {
+	DMACH_PCM0_RX,
+	DMACH_PCM0_TX,
+	DMACH_PCM1_RX,
+	DMACH_PCM1_TX,
+	DMACH_MSM_REQ1,
+	DMACH_MSM_REQ3,
+	DMACH_SPI1_RX,
+	DMACH_SPI1_TX,
+	DMACH_I2S0S_TX,
+	DMACH_I2S0_RX,
+	DMACH_I2S0_TX,
+	DMACH_I2S1_RX,
+	DMACH_I2S1_TX,
+	DMACH_UART0_RX,
+	DMACH_UART0_TX,
+	DMACH_UART1_RX,
+	DMACH_UART1_TX,
+	DMACH_UART3_RX,
+	DMACH_UART3_TX,
+	DMACH_SLIMBUS1_RX,
+	DMACH_SLIMBUS1_TX,
+	DMACH_SLIMBUS3_RX,
+	DMACH_SLIMBUS3_TX,
+	DMACH_SLIMBUS5_RX,
+	DMACH_SLIMBUS5_TX,
 };
 
 struct dma_pl330_platdata exynos4_pdma1_pdata = {
 	.nr_valid_peri = ARRAY_SIZE(pdma1_peri),
-	.peri = pdma1_peri,
+	.peri_id = pdma1_peri,
 };
 
 struct amba_device exynos4_device_pdma1 = {
@@ -242,7 +140,12 @@ struct amba_device exynos4_device_pdma1 = {
 
 static int __init exynos4_dma_init(void)
 {
+	dma_cap_set(DMA_SLAVE, exynos4_pdma0_pdata.cap_mask);
+	dma_cap_set(DMA_CYCLIC, exynos4_pdma0_pdata.cap_mask);
 	amba_device_register(&exynos4_device_pdma0, &iomem_resource);
+
+	dma_cap_set(DMA_SLAVE, exynos4_pdma1_pdata.cap_mask);
+	dma_cap_set(DMA_CYCLIC, exynos4_pdma1_pdata.cap_mask);
 	amba_device_register(&exynos4_device_pdma1, &iomem_resource);
 
 	return 0;
-- 
1.6.6.rc2

[PATCH v7 09/10] ARM: S5PC100: Modify platform data for pl330 driver

[Thomas Abraham]

With the 'struct dma_pl330_peri' removed, the platfrom data for dma
driver can be simplified to a simple list of peripheral request ids.

Cc: Jassi Brar <jassisinghbrar@gmail.com>
Cc: Boojin Kim <boojin.kim@samsung.com>
Signed-off-by: Thomas Abraham <thomas.abraham@linaro.org>
Acked-by: Boojin Kim <boojin.kim@samsung.com>
---
 arch/arm/mach-s5pc100/dma.c |  247 ++++++++++++-------------------------------
 1 files changed, 69 insertions(+), 178 deletions(-)

diff --git a/arch/arm/mach-s5pc100/dma.c b/arch/arm/mach-s5pc100/dma.c
index 065a087..c841f4d 100644
--- a/arch/arm/mach-s5pc100/dma.c
+++ b/arch/arm/mach-s5pc100/dma.c
@@ -35,100 +35,42 @@
 
 static u64 dma_dmamask = DMA_BIT_MASK(32);
 
-struct dma_pl330_peri pdma0_peri[30] = {
-	{
-		.peri_id = (u8)DMACH_UART0_RX,
-		.rqtype = DEVTOMEM,
-	}, {
-		.peri_id = (u8)DMACH_UART0_TX,
-		.rqtype = MEMTODEV,
-	}, {
-		.peri_id = (u8)DMACH_UART1_RX,
-		.rqtype = DEVTOMEM,
-	}, {
-		.peri_id = (u8)DMACH_UART1_TX,
-		.rqtype = MEMTODEV,
-	}, {
-		.peri_id = (u8)DMACH_UART2_RX,
-		.rqtype = DEVTOMEM,
-	}, {
-		.peri_id = (u8)DMACH_UART2_TX,
-		.rqtype = MEMTODEV,
-	}, {
-		.peri_id = (u8)DMACH_UART3_RX,
-		.rqtype = DEVTOMEM,
-	}, {
-		.peri_id = (u8)DMACH_UART3_TX,
-		.rqtype = MEMTODEV,
-	}, {
-		.peri_id = DMACH_IRDA,
-	}, {
-		.peri_id = (u8)DMACH_I2S0_RX,
-		.rqtype = DEVTOMEM,
-	}, {
-		.peri_id = (u8)DMACH_I2S0_TX,
-		.rqtype = MEMTODEV,
-	}, {
-		.peri_id = (u8)DMACH_I2S0S_TX,
-		.rqtype = MEMTODEV,
-	}, {
-		.peri_id = (u8)DMACH_I2S1_RX,
-		.rqtype = DEVTOMEM,
-	}, {
-		.peri_id = (u8)DMACH_I2S1_TX,
-		.rqtype = MEMTODEV,
-	}, {
-		.peri_id = (u8)DMACH_I2S2_RX,
-		.rqtype = DEVTOMEM,
-	}, {
-		.peri_id = (u8)DMACH_I2S2_TX,
-		.rqtype = MEMTODEV,
-	}, {
-		.peri_id = (u8)DMACH_SPI0_RX,
-		.rqtype = DEVTOMEM,
-	}, {
-		.peri_id = (u8)DMACH_SPI0_TX,
-		.rqtype = MEMTODEV,
-	}, {
-		.peri_id = (u8)DMACH_SPI1_RX,
-		.rqtype = DEVTOMEM,
-	}, {
-		.peri_id = (u8)DMACH_SPI1_TX,
-		.rqtype = MEMTODEV,
-	}, {
-		.peri_id = (u8)DMACH_SPI2_RX,
-		.rqtype = DEVTOMEM,
-	}, {
-		.peri_id = (u8)DMACH_SPI2_TX,
-		.rqtype = MEMTODEV,
-	}, {
-		.peri_id = (u8)DMACH_AC97_MICIN,
-		.rqtype = DEVTOMEM,
-	}, {
-		.peri_id = (u8)DMACH_AC97_PCMIN,
-		.rqtype = DEVTOMEM,
-	}, {
-		.peri_id = (u8)DMACH_AC97_PCMOUT,
-		.rqtype = MEMTODEV,
-	}, {
-		.peri_id = (u8)DMACH_EXTERNAL,
-	}, {
-		.peri_id = (u8)DMACH_PWM,
-	}, {
-		.peri_id = (u8)DMACH_SPDIF,
-		.rqtype = MEMTODEV,
-	}, {
-		.peri_id = (u8)DMACH_HSI_RX,
-		.rqtype = DEVTOMEM,
-	}, {
-		.peri_id = (u8)DMACH_HSI_TX,
-		.rqtype = MEMTODEV,
-	},
+u8 pdma0_peri[] = {
+	DMACH_UART0_RX,
+	DMACH_UART0_TX,
+	DMACH_UART1_RX,
+	DMACH_UART1_TX,
+	DMACH_UART2_RX,
+	DMACH_UART2_TX,
+	DMACH_UART3_RX,
+	DMACH_UART3_TX,
+	DMACH_IRDA,
+	DMACH_I2S0_RX,
+	DMACH_I2S0_TX,
+	DMACH_I2S0S_TX,
+	DMACH_I2S1_RX,
+	DMACH_I2S1_TX,
+	DMACH_I2S2_RX,
+	DMACH_I2S2_TX,
+	DMACH_SPI0_RX,
+	DMACH_SPI0_TX,
+	DMACH_SPI1_RX,
+	DMACH_SPI1_TX,
+	DMACH_SPI2_RX,
+	DMACH_SPI2_TX,
+	DMACH_AC97_MICIN,
+	DMACH_AC97_PCMIN,
+	DMACH_AC97_PCMOUT,
+	DMACH_EXTERNAL,
+	DMACH_PWM,
+	DMACH_SPDIF,
+	DMACH_HSI_RX,
+	DMACH_HSI_TX,
 };
 
 struct dma_pl330_platdata s5pc100_pdma0_pdata = {
 	.nr_valid_peri = ARRAY_SIZE(pdma0_peri),
-	.peri = pdma0_peri,
+	.peri_id = pdma0_peri,
 };
 
 struct amba_device s5pc100_device_pdma0 = {
@@ -147,98 +89,42 @@ struct amba_device s5pc100_device_pdma0 = {
 	.periphid = 0x00041330,
 };
 
-struct dma_pl330_peri pdma1_peri[30] = {
-	{
-		.peri_id = (u8)DMACH_UART0_RX,
-		.rqtype = DEVTOMEM,
-	}, {
-		.peri_id = (u8)DMACH_UART0_TX,
-		.rqtype = MEMTODEV,
-	}, {
-		.peri_id = (u8)DMACH_UART1_RX,
-		.rqtype = DEVTOMEM,
-	}, {
-		.peri_id = (u8)DMACH_UART1_TX,
-		.rqtype = MEMTODEV,
-	}, {
-		.peri_id = (u8)DMACH_UART2_RX,
-		.rqtype = DEVTOMEM,
-	}, {
-		.peri_id = (u8)DMACH_UART2_TX,
-		.rqtype = MEMTODEV,
-	}, {
-		.peri_id = (u8)DMACH_UART3_RX,
-		.rqtype = DEVTOMEM,
-	}, {
-		.peri_id = (u8)DMACH_UART3_TX,
-		.rqtype = MEMTODEV,
-	}, {
-		.peri_id = DMACH_IRDA,
-	}, {
-		.peri_id = (u8)DMACH_I2S0_RX,
-		.rqtype = DEVTOMEM,
-	}, {
-		.peri_id = (u8)DMACH_I2S0_TX,
-		.rqtype = MEMTODEV,
-	}, {
-		.peri_id = (u8)DMACH_I2S0S_TX,
-		.rqtype = MEMTODEV,
-	}, {
-		.peri_id = (u8)DMACH_I2S1_RX,
-		.rqtype = DEVTOMEM,
-	}, {
-		.peri_id = (u8)DMACH_I2S1_TX,
-		.rqtype = MEMTODEV,
-	}, {
-		.peri_id = (u8)DMACH_I2S2_RX,
-		.rqtype = DEVTOMEM,
-	}, {
-		.peri_id = (u8)DMACH_I2S2_TX,
-		.rqtype = MEMTODEV,
-	}, {
-		.peri_id = (u8)DMACH_SPI0_RX,
-		.rqtype = DEVTOMEM,
-	}, {
-		.peri_id = (u8)DMACH_SPI0_TX,
-		.rqtype = MEMTODEV,
-	}, {
-		.peri_id = (u8)DMACH_SPI1_RX,
-		.rqtype = DEVTOMEM,
-	}, {
-		.peri_id = (u8)DMACH_SPI1_TX,
-		.rqtype = MEMTODEV,
-	}, {
-		.peri_id = (u8)DMACH_SPI2_RX,
-		.rqtype = DEVTOMEM,
-	}, {
-		.peri_id = (u8)DMACH_SPI2_TX,
-		.rqtype = MEMTODEV,
-	}, {
-		.peri_id = (u8)DMACH_PCM0_RX,
-		.rqtype = DEVTOMEM,
-	}, {
-		.peri_id = (u8)DMACH_PCM1_TX,
-		.rqtype = MEMTODEV,
-	}, {
-		.peri_id = (u8)DMACH_PCM1_RX,
-		.rqtype = DEVTOMEM,
-	}, {
-		.peri_id = (u8)DMACH_PCM1_TX,
-		.rqtype = MEMTODEV,
-	}, {
-		.peri_id = (u8)DMACH_MSM_REQ0,
-	}, {
-		.peri_id = (u8)DMACH_MSM_REQ1,
-	}, {
-		.peri_id = (u8)DMACH_MSM_REQ2,
-	}, {
-		.peri_id = (u8)DMACH_MSM_REQ3,
-	},
+u8 pdma1_peri[] = {
+	DMACH_UART0_RX,
+	DMACH_UART0_TX,
+	DMACH_UART1_RX,
+	DMACH_UART1_TX,
+	DMACH_UART2_RX,
+	DMACH_UART2_TX,
+	DMACH_UART3_RX,
+	DMACH_UART3_TX,
+	DMACH_IRDA,
+	DMACH_I2S0_RX,
+	DMACH_I2S0_TX,
+	DMACH_I2S0S_TX,
+	DMACH_I2S1_RX,
+	DMACH_I2S1_TX,
+	DMACH_I2S2_RX,
+	DMACH_I2S2_TX,
+	DMACH_SPI0_RX,
+	DMACH_SPI0_TX,
+	DMACH_SPI1_RX,
+	DMACH_SPI1_TX,
+	DMACH_SPI2_RX,
+	DMACH_SPI2_TX,
+	DMACH_PCM0_RX,
+	DMACH_PCM0_TX,
+	DMACH_PCM1_RX,
+	DMACH_PCM1_TX,
+	DMACH_MSM_REQ0,
+	DMACH_MSM_REQ1,
+	DMACH_MSM_REQ2,
+	DMACH_MSM_REQ3,
 };
 
 struct dma_pl330_platdata s5pc100_pdma1_pdata = {
 	.nr_valid_peri = ARRAY_SIZE(pdma1_peri),
-	.peri = pdma1_peri,
+	.peri_id = pdma1_peri,
 };
 
 struct amba_device s5pc100_device_pdma1 = {
@@ -259,7 +145,12 @@ struct amba_device s5pc100_device_pdma1 = {
 
 static int __init s5pc100_dma_init(void)
 {
+	dma_cap_set(DMA_SLAVE, s5pc100_pdma0_pdata.cap_mask);
+	dma_cap_set(DMA_CYCLIC, s5pc100_pdma0_pdata.cap_mask);
 	amba_device_register(&s5pc100_device_pdma0, &iomem_resource);
+
+	dma_cap_set(DMA_SLAVE, s5pc100_pdma1_pdata.cap_mask);
+	dma_cap_set(DMA_CYCLIC, s5pc100_pdma1_pdata.cap_mask);
 	amba_device_register(&s5pc100_device_pdma1, &iomem_resource);
 
 	return 0;
-- 
1.6.6.rc2