From: John Garry <john.garry@huawei.com>
To: Shaokun Zhang <zhangshaokun@hisilicon.com>,
<linux-arm-kernel@lists.infradead.org>
Cc: Mark Rutland <mark.rutland@arm.com>, Qi Liu <liuqi115@huawei.com>,
Will Deacon <will@kernel.org>,
Jonathan Cameron <Jonathan.Cameron@huawei.com>
Subject: Re: [PATCH 5/8] drivers/perf: hisi: Update DDRC PMU for programable counter
Date: Tue, 26 Jan 2021 12:33:27 +0000 [thread overview]
Message-ID: <06dadbf0-cf24-fd71-d4c4-1684df439e32@huawei.com> (raw)
In-Reply-To: <1609395576-32775-6-git-send-email-zhangshaokun@hisilicon.com>
On 31/12/2020 06:19, Shaokun Zhang wrote:
> DDRC PMU's events are useful for performance profiling, but the events
> are limited and counter is fixed. On HiSilicon Hip09 platform, PMU
> counters are the programable and more events are supported. Let's
programmable
> add the DDRC PMU v2 driver.
>
> Cc: Mark Rutland <mark.rutland@arm.com>
> Cc: Will Deacon <will@kernel.org>
> Cc: John Garry <john.garry@huawei.com>
> Cc: Jonathan Cameron <Jonathan.Cameron@huawei.com>
> Co-developed-by: Qi Liu <liuqi115@huawei.com>
> Signed-off-by: Qi Liu <liuqi115@huawei.com>
> Signed-off-by: Shaokun Zhang <zhangshaokun@hisilicon.com>
> ---
> drivers/perf/hisilicon/hisi_uncore_ddrc_pmu.c | 208 ++++++++++++++++++++++++--
> drivers/perf/hisilicon/hisi_uncore_pmu.h | 2 +
> 2 files changed, 197 insertions(+), 13 deletions(-)
>
generally looks ok, but ...
> }
> @@ -332,8 +506,16 @@ static int hisi_ddrc_pmu_probe(struct platform_device *pdev)
> return ret;
> }
>
> - name = devm_kasprintf(&pdev->dev, GFP_KERNEL, "hisi_sccl%u_ddrc%u",
> - ddrc_pmu->sccl_id, ddrc_pmu->index_id);
> + if (ddrc_pmu->identifier >= HISI_PMU_V2)
> + name = devm_kasprintf(&pdev->dev, GFP_KERNEL,
> + "hisi_sccl%u_ddrc%u_%u",
> + ddrc_pmu->sccl_id, ddrc_pmu->index_id,
> + ddrc_pmu->sub_id);
I don't think perf can support event aliasing in this format
(hisi_scclX_Y_Z), but I need to double-check.
> + else
> + name = devm_kasprintf(&pdev->dev, GFP_KERNEL,
> + "hisi_sccl%u_ddrc%u", ddrc_pmu->sccl_id,
> + ddrc_pmu->index_id);
> +
> ddrc_pmu->pmu = (struct pmu) {
> .name = name,
> .module = THIS_MODULE,
> @@ -346,7 +528,7 @@ static int hisi_ddrc_pmu_probe(struct platform_device *pdev)
> .start = hisi_uncore_pmu_start,
> .stop = hisi_uncore_pmu_stop,
> .read = hisi_uncore_pmu_read,
> - .attr_groups = hisi_ddrc_pmu_v1_attr_groups,
> + .attr_groups = ddrc_pmu->pmu_events.attr_groups,
> .capabilities = PERF_PMU_CAP_NO_EXCLUDE,
> };
>
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next prev parent reply other threads:[~2021-01-26 12:36 UTC|newest]
Thread overview: 24+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-12-31 6:19 [PATCH 0/8] Add support for HiSilicon Hip09 uncore PMU driver Shaokun Zhang
2020-12-31 6:19 ` [PATCH 1/8] drivers/perf: hisi: Refactor code for more uncore PMUs Shaokun Zhang
2020-12-31 6:19 ` [PATCH 2/8] drivers/perf: hisi: Add PMU version for uncore PMU drivers Shaokun Zhang
2021-01-26 11:46 ` John Garry
2021-01-27 7:56 ` Shaokun Zhang
2020-12-31 6:19 ` [PATCH 3/8] drivers/perf: hisi: Add new functions for L3C PMU Shaokun Zhang
2021-01-26 12:05 ` John Garry
2020-12-31 6:19 ` [PATCH 4/8] drivers/perf: hisi: Add new functions for HHA PMU Shaokun Zhang
2021-01-26 12:10 ` John Garry
2021-01-27 8:02 ` Shaokun Zhang
2020-12-31 6:19 ` [PATCH 5/8] drivers/perf: hisi: Update DDRC PMU for programable counter Shaokun Zhang
2021-01-26 12:33 ` John Garry [this message]
2021-01-26 15:56 ` John Garry
2021-01-27 8:16 ` Shaokun Zhang
2020-12-31 6:19 ` [PATCH 6/8] drivers/perf: hisi: Add support for HiSilicon SLLC PMU driver Shaokun Zhang
2021-01-26 12:30 ` John Garry
2021-01-27 8:26 ` Shaokun Zhang
2020-12-31 6:19 ` [PATCH 7/8] drivers/perf: hisi: Add support for HiSilicon PA " Shaokun Zhang
2021-01-26 12:45 ` John Garry
2021-01-27 8:41 ` Shaokun Zhang
2020-12-31 6:19 ` [PATCH 8/8] docs: perf: Add new description on HiSilicon uncore PMU v2 Shaokun Zhang
2021-01-22 6:03 ` [PATCH 0/8] Add support for HiSilicon Hip09 uncore PMU driver Shaokun Zhang
2021-02-02 18:48 ` Will Deacon
2021-02-03 1:46 ` Shaokun Zhang
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