From: jean-philippe.brucker@arm.com (Jean-Philippe Brucker)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH] iommu/arm-smmu-v3: sync the OVACKFLG to PRIQ consumer register
Date: Mon, 23 Jul 2018 15:08:18 +0100 [thread overview]
Message-ID: <07622bf1-161e-3cd2-eda5-334601d077d8@arm.com> (raw)
In-Reply-To: <1532350618-16486-1-git-send-email-zhangshaokun@hisilicon.com>
On 23/07/18 13:56, Shaokun Zhang wrote:
> From: Miao Zhong <zhongmiao@hisilicon.com>
>
> When PRI queue occurs overflow, driver should update the OVACKFLG to
> the PRIQ consumer register, otherwise subsequent PRI requests will not
> be processed.
Since the upstream driver doesn't enable PRI in endpoints, I'm not sure
this patch makes sense on its own, but it seems correct anyway. I had a
similar patch in my initial SVA RFC, but for some reason dropped it in
later versions (https://patchwork.kernel.org/patch/9594021/)
It's worth noting that the event queue doesn't have the same problem,
because the SMMU can record new events even if the overflow hasn't been
acknowledged.
Thanks,
Jean
next prev parent reply other threads:[~2018-07-23 14:08 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-07-23 12:56 [PATCH] iommu/arm-smmu-v3: sync the OVACKFLG to PRIQ consumer register Shaokun Zhang
2018-07-23 14:08 ` Jean-Philippe Brucker [this message]
2018-07-27 9:41 ` Zhangshaokun
2018-07-27 9:48 ` Will Deacon
2018-07-27 9:59 ` Zhangshaokun
[not found] <8CD08B4737CACA4ABE0228F45E441A916382021E@DGGEMM501-MBX.china.huawei.com>
2018-07-23 15:14 ` Jean-Philippe Brucker
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