From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id B7F70C25B5C for ; Tue, 7 May 2024 06:00:34 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:In-Reply-To:From:References:Cc:To: Subject:MIME-Version:Date:Message-ID:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=MnFg6B/6xGdOkSPtUSspCbtzL9A0mDKBh64Q7w5A9Ms=; b=iM/VOho8v9pBvs ZxijTLRRhsz08uS83aUg6/0sTxwSWh6u6pMq8Wlqds/SqOPUtVZwznzSx/1xkKnVuejV9f8Xk0TD6 TTWB6rijEkO+HH7jRgNytkFG77FyQlt/TMHCTsCZ4B110Oj3SGgq3VhfHAUngJdAmtEEprnOrzNFR BRnI22TIzk64/6OxbyPVGQiq9uI5SWhQFa6vel24MZJtx3B/kMUrjgaH9es3BO/PHEaIEtqAeALTA mxwGYgQiu0yjndDw5EIWCNezuMPVmLU55zZbr9c/zHLvAvhd/UJTMT9Y+t6h3v/sidJy6Nmp6ITVM AlJ5jJ5mzvaDNVufALhQ==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.97.1 #2 (Red Hat Linux)) id 1s4DsA-00000009lI2-3esn; Tue, 07 May 2024 06:00:18 +0000 Received: from foss.arm.com ([217.140.110.172]) by bombadil.infradead.org with esmtp (Exim 4.97.1 #2 (Red Hat Linux)) id 1s4Ds7-00000009lGU-2dEq for linux-arm-kernel@lists.infradead.org; Tue, 07 May 2024 06:00:17 +0000 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id DE3661042; Mon, 6 May 2024 23:00:40 -0700 (PDT) Received: from [10.163.37.41] (unknown [10.163.37.41]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 860323F587; Mon, 6 May 2024 23:00:06 -0700 (PDT) Message-ID: <0875aac2-61cb-484a-bd7e-043c208f53c1@arm.com> Date: Tue, 7 May 2024 11:30:07 +0530 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 11/17] coresight: Expose map argument in trace ID API Content-Language: en-US To: James Clark , linux-perf-users@vger.kernel.org, gankulkarni@os.amperecomputing.com, scclevenger@os.amperecomputing.com, coresight@lists.linaro.org, suzuki.poulose@arm.com, mike.leach@linaro.org Cc: Alexander Shishkin , Maxime Coquelin , Alexandre Torgue , Peter Zijlstra , Ingo Molnar , Arnaldo Carvalho de Melo , Namhyung Kim , Mark Rutland , Jiri Olsa , Ian Rogers , Adrian Hunter , John Garry , Will Deacon , Leo Yan , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-stm32@st-md-mailman.stormreply.com References: <20240429152207.479221-1-james.clark@arm.com> <20240429152207.479221-12-james.clark@arm.com> From: Anshuman Khandual In-Reply-To: <20240429152207.479221-12-james.clark@arm.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240506_230015_911248_FC186037 X-CRM114-Status: GOOD ( 24.06 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On 4/29/24 20:51, James Clark wrote: > The trace ID API is currently hard coded to always use the global map. > The functions that take the map as an argument aren't currently public. > Make them public so that Perf mode can pass in its own maps. At the > moment all usages are still hard coded to use the global map, but now > on the caller side. > > System ID functions are unchanged because they will always use the > default map. > > Signed-off-by: James Clark Reviewed-by: Anshuman Khandual > --- > .../hwtracing/coresight/coresight-etm-perf.c | 5 +++-- > .../coresight/coresight-etm3x-core.c | 5 +++-- > .../coresight/coresight-etm4x-core.c | 5 +++-- > .../hwtracing/coresight/coresight-trace-id.c | 22 +++++++------------ > .../hwtracing/coresight/coresight-trace-id.h | 9 +++++--- > 5 files changed, 23 insertions(+), 23 deletions(-) > > diff --git a/drivers/hwtracing/coresight/coresight-etm-perf.c b/drivers/hwtracing/coresight/coresight-etm-perf.c > index c0c60e6a1703..4afb9d29f355 100644 > --- a/drivers/hwtracing/coresight/coresight-etm-perf.c > +++ b/drivers/hwtracing/coresight/coresight-etm-perf.c > @@ -232,7 +232,7 @@ static void free_event_data(struct work_struct *work) > if (!(IS_ERR_OR_NULL(*ppath))) > coresight_release_path(*ppath); > *ppath = NULL; > - coresight_trace_id_put_cpu_id(cpu); > + coresight_trace_id_put_cpu_id(cpu, coresight_trace_id_map_default()); > } > > /* mark perf event as done for trace id allocator */ > @@ -401,7 +401,8 @@ static void *etm_setup_aux(struct perf_event *event, void **pages, > } > > /* ensure we can allocate a trace ID for this CPU */ > - trace_id = coresight_trace_id_get_cpu_id(cpu); > + trace_id = coresight_trace_id_get_cpu_id(cpu, > + coresight_trace_id_map_default()); > if (!IS_VALID_CS_TRACE_ID(trace_id)) { > cpumask_clear_cpu(cpu, mask); > coresight_release_path(path); > diff --git a/drivers/hwtracing/coresight/coresight-etm3x-core.c b/drivers/hwtracing/coresight/coresight-etm3x-core.c > index 9d5c1391ffb1..4149e7675ceb 100644 > --- a/drivers/hwtracing/coresight/coresight-etm3x-core.c > +++ b/drivers/hwtracing/coresight/coresight-etm3x-core.c > @@ -465,7 +465,8 @@ int etm_read_alloc_trace_id(struct etm_drvdata *drvdata) > * > * trace id function has its own lock > */ > - trace_id = coresight_trace_id_get_cpu_id(drvdata->cpu); > + trace_id = coresight_trace_id_get_cpu_id(drvdata->cpu, > + coresight_trace_id_map_default()); > if (IS_VALID_CS_TRACE_ID(trace_id)) > drvdata->traceid = (u8)trace_id; > else > @@ -477,7 +478,7 @@ int etm_read_alloc_trace_id(struct etm_drvdata *drvdata) > > void etm_release_trace_id(struct etm_drvdata *drvdata) > { > - coresight_trace_id_put_cpu_id(drvdata->cpu); > + coresight_trace_id_put_cpu_id(drvdata->cpu, coresight_trace_id_map_default()); > } > > static int etm_enable_perf(struct coresight_device *csdev, > diff --git a/drivers/hwtracing/coresight/coresight-etm4x-core.c b/drivers/hwtracing/coresight/coresight-etm4x-core.c > index a0bdfabddbc6..f32c8cd7742d 100644 > --- a/drivers/hwtracing/coresight/coresight-etm4x-core.c > +++ b/drivers/hwtracing/coresight/coresight-etm4x-core.c > @@ -241,7 +241,8 @@ int etm4_read_alloc_trace_id(struct etmv4_drvdata *drvdata) > * or return the one currently allocated. > * The trace id function has its own lock > */ > - trace_id = coresight_trace_id_get_cpu_id(drvdata->cpu); > + trace_id = coresight_trace_id_get_cpu_id(drvdata->cpu, > + coresight_trace_id_map_default()); > if (IS_VALID_CS_TRACE_ID(trace_id)) > drvdata->trcid = (u8)trace_id; > else > @@ -253,7 +254,7 @@ int etm4_read_alloc_trace_id(struct etmv4_drvdata *drvdata) > > void etm4_release_trace_id(struct etmv4_drvdata *drvdata) > { > - coresight_trace_id_put_cpu_id(drvdata->cpu); > + coresight_trace_id_put_cpu_id(drvdata->cpu, coresight_trace_id_map_default()); > } > > struct etm4_enable_arg { > diff --git a/drivers/hwtracing/coresight/coresight-trace-id.c b/drivers/hwtracing/coresight/coresight-trace-id.c > index 19005b5b4dc4..45ddd50d09a6 100644 > --- a/drivers/hwtracing/coresight/coresight-trace-id.c > +++ b/drivers/hwtracing/coresight/coresight-trace-id.c > @@ -12,7 +12,7 @@ > > #include "coresight-trace-id.h" > > -/* Default trace ID map. Used on systems that don't require per sink mappings */ > +/* Default trace ID map. Used in sysfs mode and for system sources */ > static struct coresight_trace_id_map id_map_default; > > /* maintain a record of the mapping of IDs and pending releases per cpu */ > @@ -152,7 +152,7 @@ static void coresight_trace_id_release_all_pending(void) > DUMP_ID_MAP(id_map); > } > > -static int coresight_trace_id_map_get_cpu_id(int cpu, struct coresight_trace_id_map *id_map) > +int coresight_trace_id_get_cpu_id(int cpu, struct coresight_trace_id_map *id_map) > { > unsigned long flags; > int id; > @@ -195,8 +195,9 @@ static int coresight_trace_id_map_get_cpu_id(int cpu, struct coresight_trace_id_ > DUMP_ID_MAP(id_map); > return id; > } > +EXPORT_SYMBOL_GPL(coresight_trace_id_get_cpu_id); > > -static void coresight_trace_id_map_put_cpu_id(int cpu, struct coresight_trace_id_map *id_map) > +void coresight_trace_id_put_cpu_id(int cpu, struct coresight_trace_id_map *id_map) > { > unsigned long flags; > int id; > @@ -222,6 +223,7 @@ static void coresight_trace_id_map_put_cpu_id(int cpu, struct coresight_trace_id > DUMP_ID_CPU(cpu, id); > DUMP_ID_MAP(id_map); > } > +EXPORT_SYMBOL_GPL(coresight_trace_id_put_cpu_id); > > static int coresight_trace_id_map_get_system_id(struct coresight_trace_id_map *id_map) > { > @@ -250,19 +252,11 @@ static void coresight_trace_id_map_put_system_id(struct coresight_trace_id_map * > DUMP_ID_MAP(id_map); > } > > -/* API functions */ > - > -int coresight_trace_id_get_cpu_id(int cpu) > -{ > - return coresight_trace_id_map_get_cpu_id(cpu, &id_map_default); > -} > -EXPORT_SYMBOL_GPL(coresight_trace_id_get_cpu_id); > - > -void coresight_trace_id_put_cpu_id(int cpu) > +struct coresight_trace_id_map *coresight_trace_id_map_default(void) > { > - coresight_trace_id_map_put_cpu_id(cpu, &id_map_default); > + return &id_map_default; > } > -EXPORT_SYMBOL_GPL(coresight_trace_id_put_cpu_id); > +EXPORT_SYMBOL_GPL(coresight_trace_id_map_default); > > int coresight_trace_id_read_cpu_id(int cpu) > { > diff --git a/drivers/hwtracing/coresight/coresight-trace-id.h b/drivers/hwtracing/coresight/coresight-trace-id.h > index 49438a96fcc6..54b9d8ed903b 100644 > --- a/drivers/hwtracing/coresight/coresight-trace-id.h > +++ b/drivers/hwtracing/coresight/coresight-trace-id.h > @@ -42,7 +42,10 @@ > #define IS_VALID_CS_TRACE_ID(id) \ > ((id > CORESIGHT_TRACE_ID_RES_0) && (id < CORESIGHT_TRACE_ID_RES_TOP)) > > -/* Allocate and release IDs for a single default trace ID map */ > +/** > + * Get the global map that's used by sysfs > + */ > +struct coresight_trace_id_map *coresight_trace_id_map_default(void); > > /** > * Read and optionally allocate a CoreSight trace ID and associate with a CPU. > @@ -57,7 +60,7 @@ > * > * return: CoreSight trace ID or -EINVAL if allocation impossible. > */ > -int coresight_trace_id_get_cpu_id(int cpu); > +int coresight_trace_id_get_cpu_id(int cpu, struct coresight_trace_id_map *id_map); > > /** > * Release an allocated trace ID associated with the CPU. > @@ -70,7 +73,7 @@ int coresight_trace_id_get_cpu_id(int cpu); > * > * @cpu: The CPU index to release the associated trace ID. > */ > -void coresight_trace_id_put_cpu_id(int cpu); > +void coresight_trace_id_put_cpu_id(int cpu, struct coresight_trace_id_map *id_map); > > /** > * Read the current allocated CoreSight Trace ID value for the CPU. _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel