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[188.155.176.92]) by smtp.gmail.com with ESMTPSA id wi17-20020a170906fd5100b006e8b945ab94sm5905360ejb.216.2022.04.19.13.48.25 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Tue, 19 Apr 2022 13:48:26 -0700 (PDT) Message-ID: <09339568-8901-991d-a3a4-1061fe5c90fa@linaro.org> Date: Tue, 19 Apr 2022 22:48:25 +0200 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:91.0) Gecko/20100101 Thunderbird/91.7.0 Subject: Re: Aw: Re: Re: [RFC/RFT 1/6] dt-bindings: phy: rockchip: add pcie3 phy Content-Language: en-US To: Frank Wunderlich Cc: Frank Wunderlich , linux-rockchip@lists.infradead.org, Kishon Vijay Abraham I , Vinod Koul , Rob Herring , Krzysztof Kozlowski , Heiko Stuebner , Lorenzo Pieralisi , =?UTF-8?Q?Krzysztof_Wilczy=c5=84ski?= , Bjorn Helgaas , Philipp Zabel , Johan Jonker , Peter Geis , Michael Riesch , linux-phy@lists.infradead.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-pci@vger.kernel.org References: <20220416135458.104048-1-linux@fw-web.de> <20220416135458.104048-2-linux@fw-web.de> <38e60bb2-123b-09cf-d6ef-3a07c6984108@linaro.org> From: Krzysztof Kozlowski In-Reply-To: X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220419_134831_423465_0BA6EBB2 X-CRM114-Status: GOOD ( 10.80 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On 19/04/2022 22:36, Frank Wunderlich wrote: >> Just use default as I wrote above. > > so like this? > > rockchip,pcie30-phymode: > $ref: '/schemas/types.yaml#/definitions/uint32' > description: | > set the phy-mode for enabling bifurcation > bit0: bifurcation for port 0 > bit1: bifurcation for port 1 > bit2: aggregation > constants are defined in the dt-bindings/phy/phy-rockchip-pcie3.h > minimum: 0x0 > maximum: 0x4 > default: 0x4 Yes. Best regards, Krzysztof _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel