From: Shuai Xue <xueshuai@linux.alibaba.com>
To: Nicolin Chen <nicolinc@nvidia.com>,
jgg@nvidia.com, will@kernel.org, robin.murphy@arm.com
Cc: joro@8bytes.org, linux-arm-kernel@lists.infradead.org,
iommu@lists.linux.dev, linux-kernel@vger.kernel.org,
skolothumtho@nvidia.com, praan@google.com
Subject: Re: [PATCH rc v2 3/4] iommu/arm-smmu-v3: Ignore STE EATS when computing the update sequence
Date: Mon, 8 Dec 2025 10:33:40 +0800 [thread overview]
Message-ID: <0b277ac2-e454-47b8-a592-d9f57936c3fb@linux.alibaba.com> (raw)
In-Reply-To: <b3586cb03317fb2362e936e4d303566851b506d4.1765140287.git.nicolinc@nvidia.com>
在 2025/12/8 04:49, Nicolin Chen 写道:
> From: Jason Gunthorpe <jgg@nvidia.com>
>
> If a VM wants to toggle EATS off at the same time as changing the CFG, the
> hypervisor will see EATS change to 0 and insert a V=0 breaking update into
> the STE even though the VM did not ask for that.
>
> In bare metal, EATS is ignored by CFG=ABORT/BYPASS, which is why this does
> not cause a problem until we have nested where CFG is always a variation of
> S2 trans that does use EATS.
>
> Relax the rules for EATS sequencing, we don't need it to be exact because
> the enclosing code will always disable ATS at the PCI device if we are
> changing EATS. This ensures there are no ATS transactions that can race
> with an EATS change so we don't need to carefully sequence these bits.
>
> Fixes: 1e8be08d1c91 ("iommu/arm-smmu-v3: Support IOMMU_DOMAIN_NESTED")
> Cc: stable@vger.kernel.org
> Signed-off-by: Jason Gunthorpe <jgg@nvidia.com>
> Signed-off-by: Nicolin Chen <nicolinc@nvidia.com>
> ---
> drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c | 9 +++++++++
> 1 file changed, 9 insertions(+)
>
> diff --git a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c
> index 3e161d8298d9..72ba41591fdb 100644
> --- a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c
> +++ b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c
> @@ -1095,6 +1095,15 @@ void arm_smmu_get_ste_ignored(__le64 *ignored_bits)
> * fault records even when MEV == 0.
> */
> ignored_bits[1] |= cpu_to_le64(STRTAB_STE_1_MEV);
> +
> + /*
> + * EATS is used to reject and control the ATS behavior of the device. If
> + * we are changing it away from 0 then we already trust the device to
> + * use ATS properly and we have sequenced the device's ATS enable in PCI
> + * config space to prevent it from issuing ATS while we are changing
> + * EATS.
> + */
> + ignored_bits[1] |= cpu_to_le64(STRTAB_STE_1_EATS);
> }
> EXPORT_SYMBOL_IF_KUNIT(arm_smmu_get_ste_ignored);
>
Reviewed-by: Shuai Xue <xueshuai@linux.alibaba.com>
Thanks.
Shuai
next prev parent reply other threads:[~2025-12-08 2:33 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-12-07 20:49 [PATCH rc v2 0/4] iommu/arm-smmu-v3: Fix hitless STE update in nesting cases Nicolin Chen
2025-12-07 20:49 ` [PATCH rc v2 1/4] iommu/arm-smmu-v3: Add ignored bits to fix STE update sequence Nicolin Chen
2025-12-08 2:33 ` Shuai Xue
2025-12-07 20:49 ` [PATCH rc v2 2/4] iommu/arm-smmu-v3: Ignore STE MEV when computing the " Nicolin Chen
2025-12-08 2:33 ` Shuai Xue
2025-12-07 20:49 ` [PATCH rc v2 3/4] iommu/arm-smmu-v3: Ignore STE EATS " Nicolin Chen
2025-12-08 2:33 ` Shuai Xue [this message]
2025-12-07 20:49 ` [PATCH rc v2 4/4] iommu/arm-smmu-v3-test: Add nested s1bypass/s1dssbypass coverage Nicolin Chen
2025-12-08 3:43 ` Shuai Xue
2025-12-09 21:04 ` Nicolin Chen
2025-12-10 1:53 ` Shuai Xue
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